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1 /*
2  * i.MX6 Video Data Order Adapter (VDOA)
3  *
4  * Copyright (C) 2014 Philipp Zabel
5  * Copyright (C) 2016 Pengutronix, Michael Tretter <kernel@pengutronix.de>
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License
9  * version 2, as published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  */
16 
17 #include <linux/clk.h>
18 #include <linux/device.h>
19 #include <linux/interrupt.h>
20 #include <linux/module.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/platform_device.h>
23 #include <linux/videodev2.h>
24 #include <linux/slab.h>
25 
26 #include "imx-vdoa.h"
27 
28 #define VDOA_NAME "imx-vdoa"
29 
30 #define VDOAC		0x00
31 #define VDOASRR		0x04
32 #define VDOAIE		0x08
33 #define VDOAIST		0x0c
34 #define VDOAFP		0x10
35 #define VDOAIEBA00	0x14
36 #define VDOAIEBA01	0x18
37 #define VDOAIEBA02	0x1c
38 #define VDOAIEBA10	0x20
39 #define VDOAIEBA11	0x24
40 #define VDOAIEBA12	0x28
41 #define VDOASL		0x2c
42 #define VDOAIUBO	0x30
43 #define VDOAVEBA0	0x34
44 #define VDOAVEBA1	0x38
45 #define VDOAVEBA2	0x3c
46 #define VDOAVUBO	0x40
47 #define VDOASR		0x44
48 
49 #define VDOAC_ISEL		BIT(6)
50 #define VDOAC_PFS		BIT(5)
51 #define VDOAC_SO		BIT(4)
52 #define VDOAC_SYNC		BIT(3)
53 #define VDOAC_NF		BIT(2)
54 #define VDOAC_BNDM_MASK		0x3
55 #define VDOAC_BAND_HEIGHT_8	0x0
56 #define VDOAC_BAND_HEIGHT_16	0x1
57 #define VDOAC_BAND_HEIGHT_32	0x2
58 
59 #define VDOASRR_START		BIT(1)
60 #define VDOASRR_SWRST		BIT(0)
61 
62 #define VDOAIE_EITERR		BIT(1)
63 #define VDOAIE_EIEOT		BIT(0)
64 
65 #define VDOAIST_TERR		BIT(1)
66 #define VDOAIST_EOT		BIT(0)
67 
68 #define VDOAFP_FH_MASK		(0x1fff << 16)
69 #define VDOAFP_FW_MASK		(0x3fff)
70 
71 #define VDOASL_VSLY_MASK	(0x3fff << 16)
72 #define VDOASL_ISLY_MASK	(0x7fff)
73 
74 #define VDOASR_ERRW		BIT(4)
75 #define VDOASR_EOB		BIT(3)
76 #define VDOASR_CURRENT_FRAME	(0x3 << 1)
77 #define VDOASR_CURRENT_BUFFER	BIT(1)
78 
79 enum {
80 	V4L2_M2M_SRC = 0,
81 	V4L2_M2M_DST = 1,
82 };
83 
84 struct vdoa_data {
85 	struct vdoa_ctx		*curr_ctx;
86 	struct device		*dev;
87 	struct clk		*vdoa_clk;
88 	void __iomem		*regs;
89 	int			irq;
90 };
91 
92 struct vdoa_q_data {
93 	unsigned int	width;
94 	unsigned int	height;
95 	unsigned int	bytesperline;
96 	unsigned int	sizeimage;
97 	u32		pixelformat;
98 };
99 
100 struct vdoa_ctx {
101 	struct vdoa_data	*vdoa;
102 	struct completion	completion;
103 	struct vdoa_q_data	q_data[2];
104 	unsigned int		submitted_job;
105 	unsigned int		completed_job;
106 };
107 
vdoa_irq_handler(int irq,void * data)108 static irqreturn_t vdoa_irq_handler(int irq, void *data)
109 {
110 	struct vdoa_data *vdoa = data;
111 	struct vdoa_ctx *curr_ctx;
112 	u32 val;
113 
114 	/* Disable interrupts */
115 	writel(0, vdoa->regs + VDOAIE);
116 
117 	curr_ctx = vdoa->curr_ctx;
118 	if (!curr_ctx) {
119 		dev_warn(vdoa->dev,
120 			"Instance released before the end of transaction\n");
121 		return IRQ_HANDLED;
122 	}
123 
124 	val = readl(vdoa->regs + VDOAIST);
125 	writel(val, vdoa->regs + VDOAIST);
126 	if (val & VDOAIST_TERR) {
127 		val = readl(vdoa->regs + VDOASR) & VDOASR_ERRW;
128 		dev_err(vdoa->dev, "AXI %s error\n", val ? "write" : "read");
129 	} else if (!(val & VDOAIST_EOT)) {
130 		dev_warn(vdoa->dev, "Spurious interrupt\n");
131 	}
132 	curr_ctx->completed_job++;
133 	complete(&curr_ctx->completion);
134 
135 	return IRQ_HANDLED;
136 }
137 
vdoa_wait_for_completion(struct vdoa_ctx * ctx)138 int vdoa_wait_for_completion(struct vdoa_ctx *ctx)
139 {
140 	struct vdoa_data *vdoa = ctx->vdoa;
141 
142 	if (ctx->submitted_job == ctx->completed_job)
143 		return 0;
144 
145 	if (!wait_for_completion_timeout(&ctx->completion,
146 					 msecs_to_jiffies(300))) {
147 		dev_err(vdoa->dev,
148 			"Timeout waiting for transfer result\n");
149 		return -ETIMEDOUT;
150 	}
151 
152 	return 0;
153 }
154 EXPORT_SYMBOL(vdoa_wait_for_completion);
155 
vdoa_device_run(struct vdoa_ctx * ctx,dma_addr_t dst,dma_addr_t src)156 void vdoa_device_run(struct vdoa_ctx *ctx, dma_addr_t dst, dma_addr_t src)
157 {
158 	struct vdoa_q_data *src_q_data, *dst_q_data;
159 	struct vdoa_data *vdoa = ctx->vdoa;
160 	u32 val;
161 
162 	if (vdoa->curr_ctx)
163 		vdoa_wait_for_completion(vdoa->curr_ctx);
164 
165 	vdoa->curr_ctx = ctx;
166 
167 	reinit_completion(&ctx->completion);
168 	ctx->submitted_job++;
169 
170 	src_q_data = &ctx->q_data[V4L2_M2M_SRC];
171 	dst_q_data = &ctx->q_data[V4L2_M2M_DST];
172 
173 	/* Progressive, no sync, 1 frame per run */
174 	if (dst_q_data->pixelformat == V4L2_PIX_FMT_YUYV)
175 		val = VDOAC_PFS;
176 	else
177 		val = 0;
178 	writel(val, vdoa->regs + VDOAC);
179 
180 	writel(dst_q_data->height << 16 | dst_q_data->width,
181 	       vdoa->regs + VDOAFP);
182 
183 	val = dst;
184 	writel(val, vdoa->regs + VDOAIEBA00);
185 
186 	writel(src_q_data->bytesperline << 16 | dst_q_data->bytesperline,
187 	       vdoa->regs + VDOASL);
188 
189 	if (dst_q_data->pixelformat == V4L2_PIX_FMT_NV12 ||
190 	    dst_q_data->pixelformat == V4L2_PIX_FMT_NV21)
191 		val = dst_q_data->bytesperline * dst_q_data->height;
192 	else
193 		val = 0;
194 	writel(val, vdoa->regs + VDOAIUBO);
195 
196 	val = src;
197 	writel(val, vdoa->regs + VDOAVEBA0);
198 	val = round_up(src_q_data->bytesperline * src_q_data->height, 4096);
199 	writel(val, vdoa->regs + VDOAVUBO);
200 
201 	/* Enable interrupts and start transfer */
202 	writel(VDOAIE_EITERR | VDOAIE_EIEOT, vdoa->regs + VDOAIE);
203 	writel(VDOASRR_START, vdoa->regs + VDOASRR);
204 }
205 EXPORT_SYMBOL(vdoa_device_run);
206 
vdoa_context_create(struct vdoa_data * vdoa)207 struct vdoa_ctx *vdoa_context_create(struct vdoa_data *vdoa)
208 {
209 	struct vdoa_ctx *ctx;
210 	int err;
211 
212 	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
213 	if (!ctx)
214 		return NULL;
215 
216 	err = clk_prepare_enable(vdoa->vdoa_clk);
217 	if (err) {
218 		kfree(ctx);
219 		return NULL;
220 	}
221 
222 	init_completion(&ctx->completion);
223 	ctx->vdoa = vdoa;
224 
225 	return ctx;
226 }
227 EXPORT_SYMBOL(vdoa_context_create);
228 
vdoa_context_destroy(struct vdoa_ctx * ctx)229 void vdoa_context_destroy(struct vdoa_ctx *ctx)
230 {
231 	struct vdoa_data *vdoa = ctx->vdoa;
232 
233 	if (vdoa->curr_ctx == ctx) {
234 		vdoa_wait_for_completion(vdoa->curr_ctx);
235 		vdoa->curr_ctx = NULL;
236 	}
237 
238 	clk_disable_unprepare(vdoa->vdoa_clk);
239 	kfree(ctx);
240 }
241 EXPORT_SYMBOL(vdoa_context_destroy);
242 
vdoa_context_configure(struct vdoa_ctx * ctx,unsigned int width,unsigned int height,u32 pixelformat)243 int vdoa_context_configure(struct vdoa_ctx *ctx,
244 			   unsigned int width, unsigned int height,
245 			   u32 pixelformat)
246 {
247 	struct vdoa_q_data *src_q_data;
248 	struct vdoa_q_data *dst_q_data;
249 
250 	if (width < 16 || width  > 8192 || width % 16 != 0 ||
251 	    height < 16 || height > 4096 || height % 16 != 0)
252 		return -EINVAL;
253 
254 	if (pixelformat != V4L2_PIX_FMT_YUYV &&
255 	    pixelformat != V4L2_PIX_FMT_NV12)
256 		return -EINVAL;
257 
258 	/* If no context is passed, only check if the format is valid */
259 	if (!ctx)
260 		return 0;
261 
262 	src_q_data = &ctx->q_data[V4L2_M2M_SRC];
263 	dst_q_data = &ctx->q_data[V4L2_M2M_DST];
264 
265 	src_q_data->width = width;
266 	src_q_data->height = height;
267 	src_q_data->bytesperline = width;
268 	src_q_data->sizeimage =
269 		round_up(src_q_data->bytesperline * height, 4096) +
270 		src_q_data->bytesperline * height / 2;
271 
272 	dst_q_data->width = width;
273 	dst_q_data->height = height;
274 	dst_q_data->pixelformat = pixelformat;
275 	switch (pixelformat) {
276 	case V4L2_PIX_FMT_YUYV:
277 		dst_q_data->bytesperline = width * 2;
278 		dst_q_data->sizeimage = dst_q_data->bytesperline * height;
279 		break;
280 	case V4L2_PIX_FMT_NV12:
281 	default:
282 		dst_q_data->bytesperline = width;
283 		dst_q_data->sizeimage =
284 			dst_q_data->bytesperline * height * 3 / 2;
285 		break;
286 	}
287 
288 	return 0;
289 }
290 EXPORT_SYMBOL(vdoa_context_configure);
291 
vdoa_probe(struct platform_device * pdev)292 static int vdoa_probe(struct platform_device *pdev)
293 {
294 	struct vdoa_data *vdoa;
295 	struct resource *res;
296 
297 	dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
298 
299 	vdoa = devm_kzalloc(&pdev->dev, sizeof(*vdoa), GFP_KERNEL);
300 	if (!vdoa)
301 		return -ENOMEM;
302 
303 	vdoa->dev = &pdev->dev;
304 
305 	vdoa->vdoa_clk = devm_clk_get(vdoa->dev, NULL);
306 	if (IS_ERR(vdoa->vdoa_clk)) {
307 		dev_err(vdoa->dev, "Failed to get clock\n");
308 		return PTR_ERR(vdoa->vdoa_clk);
309 	}
310 
311 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
312 	vdoa->regs = devm_ioremap_resource(vdoa->dev, res);
313 	if (IS_ERR(vdoa->regs))
314 		return PTR_ERR(vdoa->regs);
315 
316 	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
317 	if (!res)
318 		return -EINVAL;
319 	vdoa->irq = devm_request_threaded_irq(&pdev->dev, res->start, NULL,
320 					vdoa_irq_handler, IRQF_ONESHOT,
321 					"vdoa", vdoa);
322 	if (vdoa->irq < 0) {
323 		dev_err(vdoa->dev, "Failed to get irq\n");
324 		return vdoa->irq;
325 	}
326 
327 	platform_set_drvdata(pdev, vdoa);
328 
329 	return 0;
330 }
331 
vdoa_remove(struct platform_device * pdev)332 static int vdoa_remove(struct platform_device *pdev)
333 {
334 	return 0;
335 }
336 
337 static const struct of_device_id vdoa_dt_ids[] = {
338 	{ .compatible = "fsl,imx6q-vdoa" },
339 	{}
340 };
341 MODULE_DEVICE_TABLE(of, vdoa_dt_ids);
342 
343 static struct platform_driver vdoa_driver = {
344 	.probe		= vdoa_probe,
345 	.remove		= vdoa_remove,
346 	.driver		= {
347 		.name	= VDOA_NAME,
348 		.of_match_table = vdoa_dt_ids,
349 	},
350 };
351 
352 module_platform_driver(vdoa_driver);
353 
354 MODULE_DESCRIPTION("Video Data Order Adapter");
355 MODULE_AUTHOR("Philipp Zabel <philipp.zabel@gmail.com>");
356 MODULE_ALIAS("platform:imx-vdoa");
357 MODULE_LICENSE("GPL");
358