1 /*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
43 */
44
45 #include <asm/cacheflush.h>
46
47 #include <linux/clk.h>
48 #include <linux/clkdev.h>
49 #include <linux/delay.h>
50 #include <linux/device.h>
51 #include <linux/dma-mapping.h>
52 #include <linux/i2c.h>
53 #include <linux/interrupt.h>
54 #include <linux/mfd/syscon.h>
55 #include <linux/module.h>
56 #include <linux/omap-iommu.h>
57 #include <linux/platform_device.h>
58 #include <linux/property.h>
59 #include <linux/regulator/consumer.h>
60 #include <linux/slab.h>
61 #include <linux/sched.h>
62 #include <linux/vmalloc.h>
63
64 #include <asm/dma-iommu.h>
65
66 #include <media/v4l2-common.h>
67 #include <media/v4l2-fwnode.h>
68 #include <media/v4l2-device.h>
69 #include <media/v4l2-mc.h>
70
71 #include "isp.h"
72 #include "ispreg.h"
73 #include "ispccdc.h"
74 #include "isppreview.h"
75 #include "ispresizer.h"
76 #include "ispcsi2.h"
77 #include "ispccp2.h"
78 #include "isph3a.h"
79 #include "isphist.h"
80
81 static unsigned int autoidle;
82 module_param(autoidle, int, 0444);
83 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
84
85 static void isp_save_ctx(struct isp_device *isp);
86
87 static void isp_restore_ctx(struct isp_device *isp);
88
89 static const struct isp_res_mapping isp_res_maps[] = {
90 {
91 .isp_rev = ISP_REVISION_2_0,
92 .offset = {
93 /* first MMIO area */
94 0x0000, /* base, len 0x0070 */
95 0x0400, /* ccp2, len 0x01f0 */
96 0x0600, /* ccdc, len 0x00a8 */
97 0x0a00, /* hist, len 0x0048 */
98 0x0c00, /* h3a, len 0x0060 */
99 0x0e00, /* preview, len 0x00a0 */
100 0x1000, /* resizer, len 0x00ac */
101 0x1200, /* sbl, len 0x00fc */
102 /* second MMIO area */
103 0x0000, /* csi2a, len 0x0170 */
104 0x0170, /* csiphy2, len 0x000c */
105 },
106 .phy_type = ISP_PHY_TYPE_3430,
107 },
108 {
109 .isp_rev = ISP_REVISION_15_0,
110 .offset = {
111 /* first MMIO area */
112 0x0000, /* base, len 0x0070 */
113 0x0400, /* ccp2, len 0x01f0 */
114 0x0600, /* ccdc, len 0x00a8 */
115 0x0a00, /* hist, len 0x0048 */
116 0x0c00, /* h3a, len 0x0060 */
117 0x0e00, /* preview, len 0x00a0 */
118 0x1000, /* resizer, len 0x00ac */
119 0x1200, /* sbl, len 0x00fc */
120 /* second MMIO area */
121 0x0000, /* csi2a, len 0x0170 (1st area) */
122 0x0170, /* csiphy2, len 0x000c */
123 0x01c0, /* csi2a, len 0x0040 (2nd area) */
124 0x0400, /* csi2c, len 0x0170 (1st area) */
125 0x0570, /* csiphy1, len 0x000c */
126 0x05c0, /* csi2c, len 0x0040 (2nd area) */
127 },
128 .phy_type = ISP_PHY_TYPE_3630,
129 },
130 };
131
132 /* Structure for saving/restoring ISP module registers */
133 static struct isp_reg isp_reg_list[] = {
134 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
135 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
136 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
137 {0, ISP_TOK_TERM, 0}
138 };
139
140 /*
141 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
142 * @isp: OMAP3 ISP device
143 *
144 * In order to force posting of pending writes, we need to write and
145 * readback the same register, in this case the revision register.
146 *
147 * See this link for reference:
148 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
149 */
omap3isp_flush(struct isp_device * isp)150 void omap3isp_flush(struct isp_device *isp)
151 {
152 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
153 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
154 }
155
156 /* -----------------------------------------------------------------------------
157 * XCLK
158 */
159
160 #define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
161
isp_xclk_update(struct isp_xclk * xclk,u32 divider)162 static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
163 {
164 switch (xclk->id) {
165 case ISP_XCLK_A:
166 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
167 ISPTCTRL_CTRL_DIVA_MASK,
168 divider << ISPTCTRL_CTRL_DIVA_SHIFT);
169 break;
170 case ISP_XCLK_B:
171 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
172 ISPTCTRL_CTRL_DIVB_MASK,
173 divider << ISPTCTRL_CTRL_DIVB_SHIFT);
174 break;
175 }
176 }
177
isp_xclk_prepare(struct clk_hw * hw)178 static int isp_xclk_prepare(struct clk_hw *hw)
179 {
180 struct isp_xclk *xclk = to_isp_xclk(hw);
181
182 omap3isp_get(xclk->isp);
183
184 return 0;
185 }
186
isp_xclk_unprepare(struct clk_hw * hw)187 static void isp_xclk_unprepare(struct clk_hw *hw)
188 {
189 struct isp_xclk *xclk = to_isp_xclk(hw);
190
191 omap3isp_put(xclk->isp);
192 }
193
isp_xclk_enable(struct clk_hw * hw)194 static int isp_xclk_enable(struct clk_hw *hw)
195 {
196 struct isp_xclk *xclk = to_isp_xclk(hw);
197 unsigned long flags;
198
199 spin_lock_irqsave(&xclk->lock, flags);
200 isp_xclk_update(xclk, xclk->divider);
201 xclk->enabled = true;
202 spin_unlock_irqrestore(&xclk->lock, flags);
203
204 return 0;
205 }
206
isp_xclk_disable(struct clk_hw * hw)207 static void isp_xclk_disable(struct clk_hw *hw)
208 {
209 struct isp_xclk *xclk = to_isp_xclk(hw);
210 unsigned long flags;
211
212 spin_lock_irqsave(&xclk->lock, flags);
213 isp_xclk_update(xclk, 0);
214 xclk->enabled = false;
215 spin_unlock_irqrestore(&xclk->lock, flags);
216 }
217
isp_xclk_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)218 static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
219 unsigned long parent_rate)
220 {
221 struct isp_xclk *xclk = to_isp_xclk(hw);
222
223 return parent_rate / xclk->divider;
224 }
225
isp_xclk_calc_divider(unsigned long * rate,unsigned long parent_rate)226 static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
227 {
228 u32 divider;
229
230 if (*rate >= parent_rate) {
231 *rate = parent_rate;
232 return ISPTCTRL_CTRL_DIV_BYPASS;
233 }
234
235 if (*rate == 0)
236 *rate = 1;
237
238 divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
239 if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
240 divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
241
242 *rate = parent_rate / divider;
243 return divider;
244 }
245
isp_xclk_round_rate(struct clk_hw * hw,unsigned long rate,unsigned long * parent_rate)246 static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
247 unsigned long *parent_rate)
248 {
249 isp_xclk_calc_divider(&rate, *parent_rate);
250 return rate;
251 }
252
isp_xclk_set_rate(struct clk_hw * hw,unsigned long rate,unsigned long parent_rate)253 static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
254 unsigned long parent_rate)
255 {
256 struct isp_xclk *xclk = to_isp_xclk(hw);
257 unsigned long flags;
258 u32 divider;
259
260 divider = isp_xclk_calc_divider(&rate, parent_rate);
261
262 spin_lock_irqsave(&xclk->lock, flags);
263
264 xclk->divider = divider;
265 if (xclk->enabled)
266 isp_xclk_update(xclk, divider);
267
268 spin_unlock_irqrestore(&xclk->lock, flags);
269
270 dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
271 __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
272 return 0;
273 }
274
275 static const struct clk_ops isp_xclk_ops = {
276 .prepare = isp_xclk_prepare,
277 .unprepare = isp_xclk_unprepare,
278 .enable = isp_xclk_enable,
279 .disable = isp_xclk_disable,
280 .recalc_rate = isp_xclk_recalc_rate,
281 .round_rate = isp_xclk_round_rate,
282 .set_rate = isp_xclk_set_rate,
283 };
284
285 static const char *isp_xclk_parent_name = "cam_mclk";
286
287 static const struct clk_init_data isp_xclk_init_data = {
288 .name = "cam_xclk",
289 .ops = &isp_xclk_ops,
290 .parent_names = &isp_xclk_parent_name,
291 .num_parents = 1,
292 };
293
isp_xclk_src_get(struct of_phandle_args * clkspec,void * data)294 static struct clk *isp_xclk_src_get(struct of_phandle_args *clkspec, void *data)
295 {
296 unsigned int idx = clkspec->args[0];
297 struct isp_device *isp = data;
298
299 if (idx >= ARRAY_SIZE(isp->xclks))
300 return ERR_PTR(-ENOENT);
301
302 return isp->xclks[idx].clk;
303 }
304
isp_xclk_init(struct isp_device * isp)305 static int isp_xclk_init(struct isp_device *isp)
306 {
307 struct device_node *np = isp->dev->of_node;
308 struct clk_init_data init = { 0 };
309 unsigned int i;
310
311 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
312 isp->xclks[i].clk = ERR_PTR(-EINVAL);
313
314 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
315 struct isp_xclk *xclk = &isp->xclks[i];
316
317 xclk->isp = isp;
318 xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
319 xclk->divider = 1;
320 spin_lock_init(&xclk->lock);
321
322 init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
323 init.ops = &isp_xclk_ops;
324 init.parent_names = &isp_xclk_parent_name;
325 init.num_parents = 1;
326
327 xclk->hw.init = &init;
328 /*
329 * The first argument is NULL in order to avoid circular
330 * reference, as this driver takes reference on the
331 * sensor subdevice modules and the sensors would take
332 * reference on this module through clk_get().
333 */
334 xclk->clk = clk_register(NULL, &xclk->hw);
335 if (IS_ERR(xclk->clk))
336 return PTR_ERR(xclk->clk);
337 }
338
339 if (np)
340 of_clk_add_provider(np, isp_xclk_src_get, isp);
341
342 return 0;
343 }
344
isp_xclk_cleanup(struct isp_device * isp)345 static void isp_xclk_cleanup(struct isp_device *isp)
346 {
347 struct device_node *np = isp->dev->of_node;
348 unsigned int i;
349
350 if (np)
351 of_clk_del_provider(np);
352
353 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
354 struct isp_xclk *xclk = &isp->xclks[i];
355
356 if (!IS_ERR(xclk->clk))
357 clk_unregister(xclk->clk);
358 }
359 }
360
361 /* -----------------------------------------------------------------------------
362 * Interrupts
363 */
364
365 /*
366 * isp_enable_interrupts - Enable ISP interrupts.
367 * @isp: OMAP3 ISP device
368 */
isp_enable_interrupts(struct isp_device * isp)369 static void isp_enable_interrupts(struct isp_device *isp)
370 {
371 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
372 | IRQ0ENABLE_CSIB_IRQ
373 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
374 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
375 | IRQ0ENABLE_CCDC_VD0_IRQ
376 | IRQ0ENABLE_CCDC_VD1_IRQ
377 | IRQ0ENABLE_HS_VS_IRQ
378 | IRQ0ENABLE_HIST_DONE_IRQ
379 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
380 | IRQ0ENABLE_H3A_AF_DONE_IRQ
381 | IRQ0ENABLE_PRV_DONE_IRQ
382 | IRQ0ENABLE_RSZ_DONE_IRQ;
383
384 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
385 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
386 }
387
388 /*
389 * isp_disable_interrupts - Disable ISP interrupts.
390 * @isp: OMAP3 ISP device
391 */
isp_disable_interrupts(struct isp_device * isp)392 static void isp_disable_interrupts(struct isp_device *isp)
393 {
394 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
395 }
396
397 /*
398 * isp_core_init - ISP core settings
399 * @isp: OMAP3 ISP device
400 * @idle: Consider idle state.
401 *
402 * Set the power settings for the ISP and SBL bus and configure the HS/VS
403 * interrupt source.
404 *
405 * We need to configure the HS/VS interrupt source before interrupts get
406 * enabled, as the sensor might be free-running and the ISP default setting
407 * (HS edge) would put an unnecessary burden on the CPU.
408 */
isp_core_init(struct isp_device * isp,int idle)409 static void isp_core_init(struct isp_device *isp, int idle)
410 {
411 isp_reg_writel(isp,
412 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
413 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
414 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
415 ((isp->revision == ISP_REVISION_15_0) ?
416 ISP_SYSCONFIG_AUTOIDLE : 0),
417 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
418
419 isp_reg_writel(isp,
420 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
421 ISPCTRL_SYNC_DETECT_VSRISE,
422 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
423 }
424
425 /*
426 * Configure the bridge and lane shifter. Valid inputs are
427 *
428 * CCDC_INPUT_PARALLEL: Parallel interface
429 * CCDC_INPUT_CSI2A: CSI2a receiver
430 * CCDC_INPUT_CCP2B: CCP2b receiver
431 * CCDC_INPUT_CSI2C: CSI2c receiver
432 *
433 * The bridge and lane shifter are configured according to the selected input
434 * and the ISP platform data.
435 */
omap3isp_configure_bridge(struct isp_device * isp,enum ccdc_input_entity input,const struct isp_parallel_cfg * parcfg,unsigned int shift,unsigned int bridge)436 void omap3isp_configure_bridge(struct isp_device *isp,
437 enum ccdc_input_entity input,
438 const struct isp_parallel_cfg *parcfg,
439 unsigned int shift, unsigned int bridge)
440 {
441 u32 ispctrl_val;
442
443 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
444 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
445 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
446 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
447 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
448 ispctrl_val |= bridge;
449
450 switch (input) {
451 case CCDC_INPUT_PARALLEL:
452 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
453 ispctrl_val |= parcfg->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
454 shift += parcfg->data_lane_shift;
455 break;
456
457 case CCDC_INPUT_CSI2A:
458 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
459 break;
460
461 case CCDC_INPUT_CCP2B:
462 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
463 break;
464
465 case CCDC_INPUT_CSI2C:
466 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
467 break;
468
469 default:
470 return;
471 }
472
473 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
474
475 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
476 }
477
omap3isp_hist_dma_done(struct isp_device * isp)478 void omap3isp_hist_dma_done(struct isp_device *isp)
479 {
480 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
481 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
482 /* Histogram cannot be enabled in this frame anymore */
483 atomic_set(&isp->isp_hist.buf_err, 1);
484 dev_dbg(isp->dev,
485 "hist: Out of synchronization with CCDC. Ignoring next buffer.\n");
486 }
487 }
488
isp_isr_dbg(struct isp_device * isp,u32 irqstatus)489 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
490 {
491 static const char *name[] = {
492 "CSIA_IRQ",
493 "res1",
494 "res2",
495 "CSIB_LCM_IRQ",
496 "CSIB_IRQ",
497 "res5",
498 "res6",
499 "res7",
500 "CCDC_VD0_IRQ",
501 "CCDC_VD1_IRQ",
502 "CCDC_VD2_IRQ",
503 "CCDC_ERR_IRQ",
504 "H3A_AF_DONE_IRQ",
505 "H3A_AWB_DONE_IRQ",
506 "res14",
507 "res15",
508 "HIST_DONE_IRQ",
509 "CCDC_LSC_DONE",
510 "CCDC_LSC_PREFETCH_COMPLETED",
511 "CCDC_LSC_PREFETCH_ERROR",
512 "PRV_DONE_IRQ",
513 "CBUFF_IRQ",
514 "res22",
515 "res23",
516 "RSZ_DONE_IRQ",
517 "OVF_IRQ",
518 "res26",
519 "res27",
520 "MMU_ERR_IRQ",
521 "OCP_ERR_IRQ",
522 "SEC_ERR_IRQ",
523 "HS_VS_IRQ",
524 };
525 int i;
526
527 dev_dbg(isp->dev, "ISP IRQ: ");
528
529 for (i = 0; i < ARRAY_SIZE(name); i++) {
530 if ((1 << i) & irqstatus)
531 printk(KERN_CONT "%s ", name[i]);
532 }
533 printk(KERN_CONT "\n");
534 }
535
isp_isr_sbl(struct isp_device * isp)536 static void isp_isr_sbl(struct isp_device *isp)
537 {
538 struct device *dev = isp->dev;
539 struct isp_pipeline *pipe;
540 u32 sbl_pcr;
541
542 /*
543 * Handle shared buffer logic overflows for video buffers.
544 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
545 */
546 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
547 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
548 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
549
550 if (sbl_pcr)
551 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
552
553 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
554 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
555 if (pipe != NULL)
556 pipe->error = true;
557 }
558
559 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
560 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
561 if (pipe != NULL)
562 pipe->error = true;
563 }
564
565 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
566 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
567 if (pipe != NULL)
568 pipe->error = true;
569 }
570
571 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
572 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
573 if (pipe != NULL)
574 pipe->error = true;
575 }
576
577 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
578 | ISPSBL_PCR_RSZ2_WBL_OVF
579 | ISPSBL_PCR_RSZ3_WBL_OVF
580 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
581 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
582 if (pipe != NULL)
583 pipe->error = true;
584 }
585
586 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
587 omap3isp_stat_sbl_overflow(&isp->isp_af);
588
589 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
590 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
591 }
592
593 /*
594 * isp_isr - Interrupt Service Routine for Camera ISP module.
595 * @irq: Not used currently.
596 * @_isp: Pointer to the OMAP3 ISP device
597 *
598 * Handles the corresponding callback if plugged in.
599 */
isp_isr(int irq,void * _isp)600 static irqreturn_t isp_isr(int irq, void *_isp)
601 {
602 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
603 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
604 IRQ0STATUS_CCDC_VD0_IRQ |
605 IRQ0STATUS_CCDC_VD1_IRQ |
606 IRQ0STATUS_HS_VS_IRQ;
607 struct isp_device *isp = _isp;
608 u32 irqstatus;
609
610 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
611 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
612
613 isp_isr_sbl(isp);
614
615 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
616 omap3isp_csi2_isr(&isp->isp_csi2a);
617
618 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
619 omap3isp_ccp2_isr(&isp->isp_ccp2);
620
621 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
622 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
623 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
624 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
625 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
626 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
627 omap3isp_stat_isr_frame_sync(&isp->isp_af);
628 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
629 }
630
631 if (irqstatus & ccdc_events)
632 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
633
634 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
635 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
636 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
637 omap3isp_preview_isr(&isp->isp_prev);
638 }
639
640 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
641 omap3isp_resizer_isr(&isp->isp_res);
642
643 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
644 omap3isp_stat_isr(&isp->isp_aewb);
645
646 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
647 omap3isp_stat_isr(&isp->isp_af);
648
649 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
650 omap3isp_stat_isr(&isp->isp_hist);
651
652 omap3isp_flush(isp);
653
654 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
655 isp_isr_dbg(isp, irqstatus);
656 #endif
657
658 return IRQ_HANDLED;
659 }
660
661 static const struct media_device_ops isp_media_ops = {
662 .link_notify = v4l2_pipeline_link_notify,
663 };
664
665 /* -----------------------------------------------------------------------------
666 * Pipeline stream management
667 */
668
669 /*
670 * isp_pipeline_enable - Enable streaming on a pipeline
671 * @pipe: ISP pipeline
672 * @mode: Stream mode (single shot or continuous)
673 *
674 * Walk the entities chain starting at the pipeline output video node and start
675 * all modules in the chain in the given mode.
676 *
677 * Return 0 if successful, or the return value of the failed video::s_stream
678 * operation otherwise.
679 */
isp_pipeline_enable(struct isp_pipeline * pipe,enum isp_pipeline_stream_state mode)680 static int isp_pipeline_enable(struct isp_pipeline *pipe,
681 enum isp_pipeline_stream_state mode)
682 {
683 struct isp_device *isp = pipe->output->isp;
684 struct media_entity *entity;
685 struct media_pad *pad;
686 struct v4l2_subdev *subdev;
687 unsigned long flags;
688 int ret;
689
690 /* Refuse to start streaming if an entity included in the pipeline has
691 * crashed. This check must be performed before the loop below to avoid
692 * starting entities if the pipeline won't start anyway (those entities
693 * would then likely fail to stop, making the problem worse).
694 */
695 if (media_entity_enum_intersects(&pipe->ent_enum, &isp->crashed))
696 return -EIO;
697
698 spin_lock_irqsave(&pipe->lock, flags);
699 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
700 spin_unlock_irqrestore(&pipe->lock, flags);
701
702 pipe->do_propagation = false;
703
704 entity = &pipe->output->video.entity;
705 while (1) {
706 pad = &entity->pads[0];
707 if (!(pad->flags & MEDIA_PAD_FL_SINK))
708 break;
709
710 pad = media_entity_remote_pad(pad);
711 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
712 break;
713
714 entity = pad->entity;
715 subdev = media_entity_to_v4l2_subdev(entity);
716
717 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
718 if (ret < 0 && ret != -ENOIOCTLCMD)
719 return ret;
720
721 if (subdev == &isp->isp_ccdc.subdev) {
722 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
723 s_stream, mode);
724 v4l2_subdev_call(&isp->isp_af.subdev, video,
725 s_stream, mode);
726 v4l2_subdev_call(&isp->isp_hist.subdev, video,
727 s_stream, mode);
728 pipe->do_propagation = true;
729 }
730
731 /* Stop at the first external sub-device. */
732 if (subdev->dev != isp->dev)
733 break;
734 }
735
736 return 0;
737 }
738
isp_pipeline_wait_resizer(struct isp_device * isp)739 static int isp_pipeline_wait_resizer(struct isp_device *isp)
740 {
741 return omap3isp_resizer_busy(&isp->isp_res);
742 }
743
isp_pipeline_wait_preview(struct isp_device * isp)744 static int isp_pipeline_wait_preview(struct isp_device *isp)
745 {
746 return omap3isp_preview_busy(&isp->isp_prev);
747 }
748
isp_pipeline_wait_ccdc(struct isp_device * isp)749 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
750 {
751 return omap3isp_stat_busy(&isp->isp_af)
752 || omap3isp_stat_busy(&isp->isp_aewb)
753 || omap3isp_stat_busy(&isp->isp_hist)
754 || omap3isp_ccdc_busy(&isp->isp_ccdc);
755 }
756
757 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
758
isp_pipeline_wait(struct isp_device * isp,int (* busy)(struct isp_device * isp))759 static int isp_pipeline_wait(struct isp_device *isp,
760 int(*busy)(struct isp_device *isp))
761 {
762 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
763
764 while (!time_after(jiffies, timeout)) {
765 if (!busy(isp))
766 return 0;
767 }
768
769 return 1;
770 }
771
772 /*
773 * isp_pipeline_disable - Disable streaming on a pipeline
774 * @pipe: ISP pipeline
775 *
776 * Walk the entities chain starting at the pipeline output video node and stop
777 * all modules in the chain. Wait synchronously for the modules to be stopped if
778 * necessary.
779 *
780 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
781 * can't be stopped (in which case a software reset of the ISP is probably
782 * necessary).
783 */
isp_pipeline_disable(struct isp_pipeline * pipe)784 static int isp_pipeline_disable(struct isp_pipeline *pipe)
785 {
786 struct isp_device *isp = pipe->output->isp;
787 struct media_entity *entity;
788 struct media_pad *pad;
789 struct v4l2_subdev *subdev;
790 int failure = 0;
791 int ret;
792
793 /*
794 * We need to stop all the modules after CCDC first or they'll
795 * never stop since they may not get a full frame from CCDC.
796 */
797 entity = &pipe->output->video.entity;
798 while (1) {
799 pad = &entity->pads[0];
800 if (!(pad->flags & MEDIA_PAD_FL_SINK))
801 break;
802
803 pad = media_entity_remote_pad(pad);
804 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
805 break;
806
807 entity = pad->entity;
808 subdev = media_entity_to_v4l2_subdev(entity);
809
810 if (subdev == &isp->isp_ccdc.subdev) {
811 v4l2_subdev_call(&isp->isp_aewb.subdev,
812 video, s_stream, 0);
813 v4l2_subdev_call(&isp->isp_af.subdev,
814 video, s_stream, 0);
815 v4l2_subdev_call(&isp->isp_hist.subdev,
816 video, s_stream, 0);
817 }
818
819 ret = v4l2_subdev_call(subdev, video, s_stream, 0);
820
821 if (subdev == &isp->isp_res.subdev)
822 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
823 else if (subdev == &isp->isp_prev.subdev)
824 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview);
825 else if (subdev == &isp->isp_ccdc.subdev)
826 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
827
828 /* Handle stop failures. An entity that fails to stop can
829 * usually just be restarted. Flag the stop failure nonetheless
830 * to trigger an ISP reset the next time the device is released,
831 * just in case.
832 *
833 * The preview engine is a special case. A failure to stop can
834 * mean a hardware crash. When that happens the preview engine
835 * won't respond to read/write operations on the L4 bus anymore,
836 * resulting in a bus fault and a kernel oops next time it gets
837 * accessed. Mark it as crashed to prevent pipelines including
838 * it from being started.
839 */
840 if (ret) {
841 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
842 isp->stop_failure = true;
843 if (subdev == &isp->isp_prev.subdev)
844 media_entity_enum_set(&isp->crashed,
845 &subdev->entity);
846 failure = -ETIMEDOUT;
847 }
848
849 /* Stop at the first external sub-device. */
850 if (subdev->dev != isp->dev)
851 break;
852 }
853
854 return failure;
855 }
856
857 /*
858 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
859 * @pipe: ISP pipeline
860 * @state: Stream state (stopped, single shot or continuous)
861 *
862 * Set the pipeline to the given stream state. Pipelines can be started in
863 * single-shot or continuous mode.
864 *
865 * Return 0 if successful, or the return value of the failed video::s_stream
866 * operation otherwise. The pipeline state is not updated when the operation
867 * fails, except when stopping the pipeline.
868 */
omap3isp_pipeline_set_stream(struct isp_pipeline * pipe,enum isp_pipeline_stream_state state)869 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
870 enum isp_pipeline_stream_state state)
871 {
872 int ret;
873
874 if (state == ISP_PIPELINE_STREAM_STOPPED)
875 ret = isp_pipeline_disable(pipe);
876 else
877 ret = isp_pipeline_enable(pipe, state);
878
879 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
880 pipe->stream_state = state;
881
882 return ret;
883 }
884
885 /*
886 * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
887 * @pipe: ISP pipeline
888 *
889 * Cancelling a stream mark all buffers on all video nodes in the pipeline as
890 * erroneous and makes sure no new buffer can be queued. This function is called
891 * when a fatal error that prevents any further operation on the pipeline
892 * occurs.
893 */
omap3isp_pipeline_cancel_stream(struct isp_pipeline * pipe)894 void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
895 {
896 if (pipe->input)
897 omap3isp_video_cancel_stream(pipe->input);
898 if (pipe->output)
899 omap3isp_video_cancel_stream(pipe->output);
900 }
901
902 /*
903 * isp_pipeline_resume - Resume streaming on a pipeline
904 * @pipe: ISP pipeline
905 *
906 * Resume video output and input and re-enable pipeline.
907 */
isp_pipeline_resume(struct isp_pipeline * pipe)908 static void isp_pipeline_resume(struct isp_pipeline *pipe)
909 {
910 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
911
912 omap3isp_video_resume(pipe->output, !singleshot);
913 if (singleshot)
914 omap3isp_video_resume(pipe->input, 0);
915 isp_pipeline_enable(pipe, pipe->stream_state);
916 }
917
918 /*
919 * isp_pipeline_suspend - Suspend streaming on a pipeline
920 * @pipe: ISP pipeline
921 *
922 * Suspend pipeline.
923 */
isp_pipeline_suspend(struct isp_pipeline * pipe)924 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
925 {
926 isp_pipeline_disable(pipe);
927 }
928
929 /*
930 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
931 * video node
932 * @me: ISP module's media entity
933 *
934 * Returns 1 if the entity has an enabled link to the output video node or 0
935 * otherwise. It's true only while pipeline can have no more than one output
936 * node.
937 */
isp_pipeline_is_last(struct media_entity * me)938 static int isp_pipeline_is_last(struct media_entity *me)
939 {
940 struct isp_pipeline *pipe;
941 struct media_pad *pad;
942
943 if (!me->pipe)
944 return 0;
945 pipe = to_isp_pipeline(me);
946 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
947 return 0;
948 pad = media_entity_remote_pad(&pipe->output->pad);
949 return pad->entity == me;
950 }
951
952 /*
953 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
954 * @me: ISP module's media entity
955 *
956 * Suspend the whole pipeline if module's entity has an enabled link to the
957 * output video node. It works only while pipeline can have no more than one
958 * output node.
959 */
isp_suspend_module_pipeline(struct media_entity * me)960 static void isp_suspend_module_pipeline(struct media_entity *me)
961 {
962 if (isp_pipeline_is_last(me))
963 isp_pipeline_suspend(to_isp_pipeline(me));
964 }
965
966 /*
967 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
968 * @me: ISP module's media entity
969 *
970 * Resume the whole pipeline if module's entity has an enabled link to the
971 * output video node. It works only while pipeline can have no more than one
972 * output node.
973 */
isp_resume_module_pipeline(struct media_entity * me)974 static void isp_resume_module_pipeline(struct media_entity *me)
975 {
976 if (isp_pipeline_is_last(me))
977 isp_pipeline_resume(to_isp_pipeline(me));
978 }
979
980 /*
981 * isp_suspend_modules - Suspend ISP submodules.
982 * @isp: OMAP3 ISP device
983 *
984 * Returns 0 if suspend left in idle state all the submodules properly,
985 * or returns 1 if a general Reset is required to suspend the submodules.
986 */
isp_suspend_modules(struct isp_device * isp)987 static int isp_suspend_modules(struct isp_device *isp)
988 {
989 unsigned long timeout;
990
991 omap3isp_stat_suspend(&isp->isp_aewb);
992 omap3isp_stat_suspend(&isp->isp_af);
993 omap3isp_stat_suspend(&isp->isp_hist);
994 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
995 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
996 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
997 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
998 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
999
1000 timeout = jiffies + ISP_STOP_TIMEOUT;
1001 while (omap3isp_stat_busy(&isp->isp_af)
1002 || omap3isp_stat_busy(&isp->isp_aewb)
1003 || omap3isp_stat_busy(&isp->isp_hist)
1004 || omap3isp_preview_busy(&isp->isp_prev)
1005 || omap3isp_resizer_busy(&isp->isp_res)
1006 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1007 if (time_after(jiffies, timeout)) {
1008 dev_info(isp->dev, "can't stop modules.\n");
1009 return 1;
1010 }
1011 msleep(1);
1012 }
1013
1014 return 0;
1015 }
1016
1017 /*
1018 * isp_resume_modules - Resume ISP submodules.
1019 * @isp: OMAP3 ISP device
1020 */
isp_resume_modules(struct isp_device * isp)1021 static void isp_resume_modules(struct isp_device *isp)
1022 {
1023 omap3isp_stat_resume(&isp->isp_aewb);
1024 omap3isp_stat_resume(&isp->isp_af);
1025 omap3isp_stat_resume(&isp->isp_hist);
1026 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1027 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1028 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1029 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1030 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1031 }
1032
1033 /*
1034 * isp_reset - Reset ISP with a timeout wait for idle.
1035 * @isp: OMAP3 ISP device
1036 */
isp_reset(struct isp_device * isp)1037 static int isp_reset(struct isp_device *isp)
1038 {
1039 unsigned long timeout = 0;
1040
1041 isp_reg_writel(isp,
1042 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1043 | ISP_SYSCONFIG_SOFTRESET,
1044 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1045 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1046 ISP_SYSSTATUS) & 0x1)) {
1047 if (timeout++ > 10000) {
1048 dev_alert(isp->dev, "cannot reset ISP\n");
1049 return -ETIMEDOUT;
1050 }
1051 udelay(1);
1052 }
1053
1054 isp->stop_failure = false;
1055 media_entity_enum_zero(&isp->crashed);
1056 return 0;
1057 }
1058
1059 /*
1060 * isp_save_context - Saves the values of the ISP module registers.
1061 * @isp: OMAP3 ISP device
1062 * @reg_list: Structure containing pairs of register address and value to
1063 * modify on OMAP.
1064 */
1065 static void
isp_save_context(struct isp_device * isp,struct isp_reg * reg_list)1066 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1067 {
1068 struct isp_reg *next = reg_list;
1069
1070 for (; next->reg != ISP_TOK_TERM; next++)
1071 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1072 }
1073
1074 /*
1075 * isp_restore_context - Restores the values of the ISP module registers.
1076 * @isp: OMAP3 ISP device
1077 * @reg_list: Structure containing pairs of register address and value to
1078 * modify on OMAP.
1079 */
1080 static void
isp_restore_context(struct isp_device * isp,struct isp_reg * reg_list)1081 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1082 {
1083 struct isp_reg *next = reg_list;
1084
1085 for (; next->reg != ISP_TOK_TERM; next++)
1086 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1087 }
1088
1089 /*
1090 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1091 * @isp: OMAP3 ISP device
1092 *
1093 * Routine for saving the context of each module in the ISP.
1094 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1095 */
isp_save_ctx(struct isp_device * isp)1096 static void isp_save_ctx(struct isp_device *isp)
1097 {
1098 isp_save_context(isp, isp_reg_list);
1099 omap_iommu_save_ctx(isp->dev);
1100 }
1101
1102 /*
1103 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1104 * @isp: OMAP3 ISP device
1105 *
1106 * Routine for restoring the context of each module in the ISP.
1107 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1108 */
isp_restore_ctx(struct isp_device * isp)1109 static void isp_restore_ctx(struct isp_device *isp)
1110 {
1111 isp_restore_context(isp, isp_reg_list);
1112 omap_iommu_restore_ctx(isp->dev);
1113 omap3isp_ccdc_restore_context(isp);
1114 omap3isp_preview_restore_context(isp);
1115 }
1116
1117 /* -----------------------------------------------------------------------------
1118 * SBL resources management
1119 */
1120 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1121 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1122 OMAP3_ISP_SBL_PREVIEW_READ | \
1123 OMAP3_ISP_SBL_RESIZER_READ)
1124 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1125 OMAP3_ISP_SBL_CSI2A_WRITE | \
1126 OMAP3_ISP_SBL_CSI2C_WRITE | \
1127 OMAP3_ISP_SBL_CCDC_WRITE | \
1128 OMAP3_ISP_SBL_PREVIEW_WRITE)
1129
omap3isp_sbl_enable(struct isp_device * isp,enum isp_sbl_resource res)1130 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1131 {
1132 u32 sbl = 0;
1133
1134 isp->sbl_resources |= res;
1135
1136 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1137 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1138
1139 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1140 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1141
1142 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1143 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1144
1145 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1146 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1147
1148 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1149 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1150
1151 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1152 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1153
1154 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1155 }
1156
omap3isp_sbl_disable(struct isp_device * isp,enum isp_sbl_resource res)1157 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1158 {
1159 u32 sbl = 0;
1160
1161 isp->sbl_resources &= ~res;
1162
1163 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1164 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1165
1166 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1167 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1168
1169 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1170 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1171
1172 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1173 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1174
1175 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1176 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1177
1178 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1179 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1180
1181 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1182 }
1183
1184 /*
1185 * isp_module_sync_idle - Helper to sync module with its idle state
1186 * @me: ISP submodule's media entity
1187 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1188 * @stopping: flag which tells module wants to stop
1189 *
1190 * This function checks if ISP submodule needs to wait for next interrupt. If
1191 * yes, makes the caller to sleep while waiting for such event.
1192 */
omap3isp_module_sync_idle(struct media_entity * me,wait_queue_head_t * wait,atomic_t * stopping)1193 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1194 atomic_t *stopping)
1195 {
1196 struct isp_pipeline *pipe = to_isp_pipeline(me);
1197
1198 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1199 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1200 !isp_pipeline_ready(pipe)))
1201 return 0;
1202
1203 /*
1204 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1205 * scenario. We'll call it here to avoid race conditions.
1206 */
1207 atomic_set(stopping, 1);
1208 smp_mb();
1209
1210 /*
1211 * If module is the last one, it's writing to memory. In this case,
1212 * it's necessary to check if the module is already paused due to
1213 * DMA queue underrun or if it has to wait for next interrupt to be
1214 * idle.
1215 * If it isn't the last one, the function won't sleep but *stopping
1216 * will still be set to warn next submodule caller's interrupt the
1217 * module wants to be idle.
1218 */
1219 if (isp_pipeline_is_last(me)) {
1220 struct isp_video *video = pipe->output;
1221 unsigned long flags;
1222 spin_lock_irqsave(&video->irqlock, flags);
1223 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1224 spin_unlock_irqrestore(&video->irqlock, flags);
1225 atomic_set(stopping, 0);
1226 smp_mb();
1227 return 0;
1228 }
1229 spin_unlock_irqrestore(&video->irqlock, flags);
1230 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1231 msecs_to_jiffies(1000))) {
1232 atomic_set(stopping, 0);
1233 smp_mb();
1234 return -ETIMEDOUT;
1235 }
1236 }
1237
1238 return 0;
1239 }
1240
1241 /*
1242 * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
1243 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1244 * @stopping: flag which tells module wants to stop
1245 *
1246 * This function checks if ISP submodule was stopping. In case of yes, it
1247 * notices the caller by setting stopping to 0 and waking up the wait queue.
1248 * Returns 1 if it was stopping or 0 otherwise.
1249 */
omap3isp_module_sync_is_stopping(wait_queue_head_t * wait,atomic_t * stopping)1250 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1251 atomic_t *stopping)
1252 {
1253 if (atomic_cmpxchg(stopping, 1, 0)) {
1254 wake_up(wait);
1255 return 1;
1256 }
1257
1258 return 0;
1259 }
1260
1261 /* --------------------------------------------------------------------------
1262 * Clock management
1263 */
1264
1265 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1266 ISPCTRL_HIST_CLK_EN | \
1267 ISPCTRL_RSZ_CLK_EN | \
1268 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1269 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1270
__isp_subclk_update(struct isp_device * isp)1271 static void __isp_subclk_update(struct isp_device *isp)
1272 {
1273 u32 clk = 0;
1274
1275 /* AEWB and AF share the same clock. */
1276 if (isp->subclk_resources &
1277 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
1278 clk |= ISPCTRL_H3A_CLK_EN;
1279
1280 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1281 clk |= ISPCTRL_HIST_CLK_EN;
1282
1283 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1284 clk |= ISPCTRL_RSZ_CLK_EN;
1285
1286 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1287 * RAM as well.
1288 */
1289 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1290 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1291
1292 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1293 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1294
1295 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1296 ISPCTRL_CLKS_MASK, clk);
1297 }
1298
omap3isp_subclk_enable(struct isp_device * isp,enum isp_subclk_resource res)1299 void omap3isp_subclk_enable(struct isp_device *isp,
1300 enum isp_subclk_resource res)
1301 {
1302 isp->subclk_resources |= res;
1303
1304 __isp_subclk_update(isp);
1305 }
1306
omap3isp_subclk_disable(struct isp_device * isp,enum isp_subclk_resource res)1307 void omap3isp_subclk_disable(struct isp_device *isp,
1308 enum isp_subclk_resource res)
1309 {
1310 isp->subclk_resources &= ~res;
1311
1312 __isp_subclk_update(isp);
1313 }
1314
1315 /*
1316 * isp_enable_clocks - Enable ISP clocks
1317 * @isp: OMAP3 ISP device
1318 *
1319 * Return 0 if successful, or clk_prepare_enable return value if any of them
1320 * fails.
1321 */
isp_enable_clocks(struct isp_device * isp)1322 static int isp_enable_clocks(struct isp_device *isp)
1323 {
1324 int r;
1325 unsigned long rate;
1326
1327 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
1328 if (r) {
1329 dev_err(isp->dev, "failed to enable cam_ick clock\n");
1330 goto out_clk_enable_ick;
1331 }
1332 r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
1333 if (r) {
1334 dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
1335 goto out_clk_enable_mclk;
1336 }
1337 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1338 if (r) {
1339 dev_err(isp->dev, "failed to enable cam_mclk clock\n");
1340 goto out_clk_enable_mclk;
1341 }
1342 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1343 if (rate != CM_CAM_MCLK_HZ)
1344 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1345 " expected : %d\n"
1346 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1347 r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1348 if (r) {
1349 dev_err(isp->dev, "failed to enable csi2_fck clock\n");
1350 goto out_clk_enable_csi2_fclk;
1351 }
1352 return 0;
1353
1354 out_clk_enable_csi2_fclk:
1355 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1356 out_clk_enable_mclk:
1357 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1358 out_clk_enable_ick:
1359 return r;
1360 }
1361
1362 /*
1363 * isp_disable_clocks - Disable ISP clocks
1364 * @isp: OMAP3 ISP device
1365 */
isp_disable_clocks(struct isp_device * isp)1366 static void isp_disable_clocks(struct isp_device *isp)
1367 {
1368 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1369 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1370 clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
1371 }
1372
1373 static const char *isp_clocks[] = {
1374 "cam_ick",
1375 "cam_mclk",
1376 "csi2_96m_fck",
1377 "l3_ick",
1378 };
1379
isp_get_clocks(struct isp_device * isp)1380 static int isp_get_clocks(struct isp_device *isp)
1381 {
1382 struct clk *clk;
1383 unsigned int i;
1384
1385 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1386 clk = devm_clk_get(isp->dev, isp_clocks[i]);
1387 if (IS_ERR(clk)) {
1388 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1389 return PTR_ERR(clk);
1390 }
1391
1392 isp->clock[i] = clk;
1393 }
1394
1395 return 0;
1396 }
1397
1398 /*
1399 * omap3isp_get - Acquire the ISP resource.
1400 *
1401 * Initializes the clocks for the first acquire.
1402 *
1403 * Increment the reference count on the ISP. If the first reference is taken,
1404 * enable clocks and power-up all submodules.
1405 *
1406 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1407 */
__omap3isp_get(struct isp_device * isp,bool irq)1408 static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
1409 {
1410 struct isp_device *__isp = isp;
1411
1412 if (isp == NULL)
1413 return NULL;
1414
1415 mutex_lock(&isp->isp_mutex);
1416 if (isp->ref_count > 0)
1417 goto out;
1418
1419 if (isp_enable_clocks(isp) < 0) {
1420 __isp = NULL;
1421 goto out;
1422 }
1423
1424 /* We don't want to restore context before saving it! */
1425 if (isp->has_context)
1426 isp_restore_ctx(isp);
1427
1428 if (irq)
1429 isp_enable_interrupts(isp);
1430
1431 out:
1432 if (__isp != NULL)
1433 isp->ref_count++;
1434 mutex_unlock(&isp->isp_mutex);
1435
1436 return __isp;
1437 }
1438
omap3isp_get(struct isp_device * isp)1439 struct isp_device *omap3isp_get(struct isp_device *isp)
1440 {
1441 return __omap3isp_get(isp, true);
1442 }
1443
1444 /*
1445 * omap3isp_put - Release the ISP
1446 *
1447 * Decrement the reference count on the ISP. If the last reference is released,
1448 * power-down all submodules, disable clocks and free temporary buffers.
1449 */
__omap3isp_put(struct isp_device * isp,bool save_ctx)1450 static void __omap3isp_put(struct isp_device *isp, bool save_ctx)
1451 {
1452 if (isp == NULL)
1453 return;
1454
1455 mutex_lock(&isp->isp_mutex);
1456 BUG_ON(isp->ref_count == 0);
1457 if (--isp->ref_count == 0) {
1458 isp_disable_interrupts(isp);
1459 if (save_ctx) {
1460 isp_save_ctx(isp);
1461 isp->has_context = 1;
1462 }
1463 /* Reset the ISP if an entity has failed to stop. This is the
1464 * only way to recover from such conditions.
1465 */
1466 if (!media_entity_enum_empty(&isp->crashed) ||
1467 isp->stop_failure)
1468 isp_reset(isp);
1469 isp_disable_clocks(isp);
1470 }
1471 mutex_unlock(&isp->isp_mutex);
1472 }
1473
omap3isp_put(struct isp_device * isp)1474 void omap3isp_put(struct isp_device *isp)
1475 {
1476 __omap3isp_put(isp, true);
1477 }
1478
1479 /* --------------------------------------------------------------------------
1480 * Platform device driver
1481 */
1482
1483 /*
1484 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1485 * @isp: OMAP3 ISP device
1486 */
1487 #define ISP_PRINT_REGISTER(isp, name)\
1488 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1489 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1490 #define SBL_PRINT_REGISTER(isp, name)\
1491 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1492 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1493
omap3isp_print_status(struct isp_device * isp)1494 void omap3isp_print_status(struct isp_device *isp)
1495 {
1496 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1497
1498 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1499 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1500 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1501 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1502 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1503 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1504 ISP_PRINT_REGISTER(isp, CTRL);
1505 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1506 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1507 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1508 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1509 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1510 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1511 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1512 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1513
1514 SBL_PRINT_REGISTER(isp, PCR);
1515 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1516
1517 dev_dbg(isp->dev, "--------------------------------------------\n");
1518 }
1519
1520 #ifdef CONFIG_PM
1521
1522 /*
1523 * Power management support.
1524 *
1525 * As the ISP can't properly handle an input video stream interruption on a non
1526 * frame boundary, the ISP pipelines need to be stopped before sensors get
1527 * suspended. However, as suspending the sensors can require a running clock,
1528 * which can be provided by the ISP, the ISP can't be completely suspended
1529 * before the sensor.
1530 *
1531 * To solve this problem power management support is split into prepare/complete
1532 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1533 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1534 * resume(), and the the pipelines are restarted in complete().
1535 *
1536 * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
1537 * yet.
1538 */
isp_pm_prepare(struct device * dev)1539 static int isp_pm_prepare(struct device *dev)
1540 {
1541 struct isp_device *isp = dev_get_drvdata(dev);
1542 int reset;
1543
1544 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1545
1546 if (isp->ref_count == 0)
1547 return 0;
1548
1549 reset = isp_suspend_modules(isp);
1550 isp_disable_interrupts(isp);
1551 isp_save_ctx(isp);
1552 if (reset)
1553 isp_reset(isp);
1554
1555 return 0;
1556 }
1557
isp_pm_suspend(struct device * dev)1558 static int isp_pm_suspend(struct device *dev)
1559 {
1560 struct isp_device *isp = dev_get_drvdata(dev);
1561
1562 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1563
1564 if (isp->ref_count)
1565 isp_disable_clocks(isp);
1566
1567 return 0;
1568 }
1569
isp_pm_resume(struct device * dev)1570 static int isp_pm_resume(struct device *dev)
1571 {
1572 struct isp_device *isp = dev_get_drvdata(dev);
1573
1574 if (isp->ref_count == 0)
1575 return 0;
1576
1577 return isp_enable_clocks(isp);
1578 }
1579
isp_pm_complete(struct device * dev)1580 static void isp_pm_complete(struct device *dev)
1581 {
1582 struct isp_device *isp = dev_get_drvdata(dev);
1583
1584 if (isp->ref_count == 0)
1585 return;
1586
1587 isp_restore_ctx(isp);
1588 isp_enable_interrupts(isp);
1589 isp_resume_modules(isp);
1590 }
1591
1592 #else
1593
1594 #define isp_pm_prepare NULL
1595 #define isp_pm_suspend NULL
1596 #define isp_pm_resume NULL
1597 #define isp_pm_complete NULL
1598
1599 #endif /* CONFIG_PM */
1600
isp_unregister_entities(struct isp_device * isp)1601 static void isp_unregister_entities(struct isp_device *isp)
1602 {
1603 media_device_unregister(&isp->media_dev);
1604
1605 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1606 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1607 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1608 omap3isp_preview_unregister_entities(&isp->isp_prev);
1609 omap3isp_resizer_unregister_entities(&isp->isp_res);
1610 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1611 omap3isp_stat_unregister_entities(&isp->isp_af);
1612 omap3isp_stat_unregister_entities(&isp->isp_hist);
1613
1614 v4l2_device_unregister(&isp->v4l2_dev);
1615 media_device_cleanup(&isp->media_dev);
1616 }
1617
isp_link_entity(struct isp_device * isp,struct media_entity * entity,enum isp_interface_type interface)1618 static int isp_link_entity(
1619 struct isp_device *isp, struct media_entity *entity,
1620 enum isp_interface_type interface)
1621 {
1622 struct media_entity *input;
1623 unsigned int flags;
1624 unsigned int pad;
1625 unsigned int i;
1626
1627 /* Connect the sensor to the correct interface module.
1628 * Parallel sensors are connected directly to the CCDC, while
1629 * serial sensors are connected to the CSI2a, CCP2b or CSI2c
1630 * receiver through CSIPHY1 or CSIPHY2.
1631 */
1632 switch (interface) {
1633 case ISP_INTERFACE_PARALLEL:
1634 input = &isp->isp_ccdc.subdev.entity;
1635 pad = CCDC_PAD_SINK;
1636 flags = 0;
1637 break;
1638
1639 case ISP_INTERFACE_CSI2A_PHY2:
1640 input = &isp->isp_csi2a.subdev.entity;
1641 pad = CSI2_PAD_SINK;
1642 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1643 break;
1644
1645 case ISP_INTERFACE_CCP2B_PHY1:
1646 case ISP_INTERFACE_CCP2B_PHY2:
1647 input = &isp->isp_ccp2.subdev.entity;
1648 pad = CCP2_PAD_SINK;
1649 flags = 0;
1650 break;
1651
1652 case ISP_INTERFACE_CSI2C_PHY1:
1653 input = &isp->isp_csi2c.subdev.entity;
1654 pad = CSI2_PAD_SINK;
1655 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1656 break;
1657
1658 default:
1659 dev_err(isp->dev, "%s: invalid interface type %u\n", __func__,
1660 interface);
1661 return -EINVAL;
1662 }
1663
1664 /*
1665 * Not all interfaces are available on all revisions of the
1666 * ISP. The sub-devices of those interfaces aren't initialised
1667 * in such a case. Check this by ensuring the num_pads is
1668 * non-zero.
1669 */
1670 if (!input->num_pads) {
1671 dev_err(isp->dev, "%s: invalid input %u\n", entity->name,
1672 interface);
1673 return -EINVAL;
1674 }
1675
1676 for (i = 0; i < entity->num_pads; i++) {
1677 if (entity->pads[i].flags & MEDIA_PAD_FL_SOURCE)
1678 break;
1679 }
1680 if (i == entity->num_pads) {
1681 dev_err(isp->dev, "%s: no source pad in external entity\n",
1682 __func__);
1683 return -EINVAL;
1684 }
1685
1686 return media_create_pad_link(entity, i, input, pad, flags);
1687 }
1688
isp_register_entities(struct isp_device * isp)1689 static int isp_register_entities(struct isp_device *isp)
1690 {
1691 int ret;
1692
1693 isp->media_dev.dev = isp->dev;
1694 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1695 sizeof(isp->media_dev.model));
1696 isp->media_dev.hw_revision = isp->revision;
1697 isp->media_dev.ops = &isp_media_ops;
1698 media_device_init(&isp->media_dev);
1699
1700 isp->v4l2_dev.mdev = &isp->media_dev;
1701 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1702 if (ret < 0) {
1703 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
1704 __func__, ret);
1705 goto done;
1706 }
1707
1708 /* Register internal entities */
1709 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1710 if (ret < 0)
1711 goto done;
1712
1713 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1714 if (ret < 0)
1715 goto done;
1716
1717 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1718 if (ret < 0)
1719 goto done;
1720
1721 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1722 &isp->v4l2_dev);
1723 if (ret < 0)
1724 goto done;
1725
1726 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1727 if (ret < 0)
1728 goto done;
1729
1730 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1731 if (ret < 0)
1732 goto done;
1733
1734 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1735 if (ret < 0)
1736 goto done;
1737
1738 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1739 if (ret < 0)
1740 goto done;
1741
1742 done:
1743 if (ret < 0)
1744 isp_unregister_entities(isp);
1745
1746 return ret;
1747 }
1748
1749 /*
1750 * isp_create_links() - Create links for internal and external ISP entities
1751 * @isp : Pointer to ISP device
1752 *
1753 * This function creates all links between ISP internal and external entities.
1754 *
1755 * Return: A negative error code on failure or zero on success. Possible error
1756 * codes are those returned by media_create_pad_link().
1757 */
isp_create_links(struct isp_device * isp)1758 static int isp_create_links(struct isp_device *isp)
1759 {
1760 int ret;
1761
1762 /* Create links between entities and video nodes. */
1763 ret = media_create_pad_link(
1764 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1765 &isp->isp_csi2a.video_out.video.entity, 0, 0);
1766 if (ret < 0)
1767 return ret;
1768
1769 ret = media_create_pad_link(
1770 &isp->isp_ccp2.video_in.video.entity, 0,
1771 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SINK, 0);
1772 if (ret < 0)
1773 return ret;
1774
1775 ret = media_create_pad_link(
1776 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1777 &isp->isp_ccdc.video_out.video.entity, 0, 0);
1778 if (ret < 0)
1779 return ret;
1780
1781 ret = media_create_pad_link(
1782 &isp->isp_prev.video_in.video.entity, 0,
1783 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1784 if (ret < 0)
1785 return ret;
1786
1787 ret = media_create_pad_link(
1788 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1789 &isp->isp_prev.video_out.video.entity, 0, 0);
1790 if (ret < 0)
1791 return ret;
1792
1793 ret = media_create_pad_link(
1794 &isp->isp_res.video_in.video.entity, 0,
1795 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1796 if (ret < 0)
1797 return ret;
1798
1799 ret = media_create_pad_link(
1800 &isp->isp_res.subdev.entity, RESZ_PAD_SOURCE,
1801 &isp->isp_res.video_out.video.entity, 0, 0);
1802
1803 if (ret < 0)
1804 return ret;
1805
1806 /* Create links between entities. */
1807 ret = media_create_pad_link(
1808 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1809 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1810 if (ret < 0)
1811 return ret;
1812
1813 ret = media_create_pad_link(
1814 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1815 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1816 if (ret < 0)
1817 return ret;
1818
1819 ret = media_create_pad_link(
1820 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1821 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1822 if (ret < 0)
1823 return ret;
1824
1825 ret = media_create_pad_link(
1826 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1827 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1828 if (ret < 0)
1829 return ret;
1830
1831 ret = media_create_pad_link(
1832 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1833 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1834 if (ret < 0)
1835 return ret;
1836
1837 ret = media_create_pad_link(
1838 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1839 &isp->isp_aewb.subdev.entity, 0,
1840 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1841 if (ret < 0)
1842 return ret;
1843
1844 ret = media_create_pad_link(
1845 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1846 &isp->isp_af.subdev.entity, 0,
1847 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1848 if (ret < 0)
1849 return ret;
1850
1851 ret = media_create_pad_link(
1852 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1853 &isp->isp_hist.subdev.entity, 0,
1854 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1855 if (ret < 0)
1856 return ret;
1857
1858 return 0;
1859 }
1860
isp_cleanup_modules(struct isp_device * isp)1861 static void isp_cleanup_modules(struct isp_device *isp)
1862 {
1863 omap3isp_h3a_aewb_cleanup(isp);
1864 omap3isp_h3a_af_cleanup(isp);
1865 omap3isp_hist_cleanup(isp);
1866 omap3isp_resizer_cleanup(isp);
1867 omap3isp_preview_cleanup(isp);
1868 omap3isp_ccdc_cleanup(isp);
1869 omap3isp_ccp2_cleanup(isp);
1870 omap3isp_csi2_cleanup(isp);
1871 omap3isp_csiphy_cleanup(isp);
1872 }
1873
isp_initialize_modules(struct isp_device * isp)1874 static int isp_initialize_modules(struct isp_device *isp)
1875 {
1876 int ret;
1877
1878 ret = omap3isp_csiphy_init(isp);
1879 if (ret < 0) {
1880 dev_err(isp->dev, "CSI PHY initialization failed\n");
1881 return ret;
1882 }
1883
1884 ret = omap3isp_csi2_init(isp);
1885 if (ret < 0) {
1886 dev_err(isp->dev, "CSI2 initialization failed\n");
1887 goto error_csi2;
1888 }
1889
1890 ret = omap3isp_ccp2_init(isp);
1891 if (ret < 0) {
1892 if (ret != -EPROBE_DEFER)
1893 dev_err(isp->dev, "CCP2 initialization failed\n");
1894 goto error_ccp2;
1895 }
1896
1897 ret = omap3isp_ccdc_init(isp);
1898 if (ret < 0) {
1899 dev_err(isp->dev, "CCDC initialization failed\n");
1900 goto error_ccdc;
1901 }
1902
1903 ret = omap3isp_preview_init(isp);
1904 if (ret < 0) {
1905 dev_err(isp->dev, "Preview initialization failed\n");
1906 goto error_preview;
1907 }
1908
1909 ret = omap3isp_resizer_init(isp);
1910 if (ret < 0) {
1911 dev_err(isp->dev, "Resizer initialization failed\n");
1912 goto error_resizer;
1913 }
1914
1915 ret = omap3isp_hist_init(isp);
1916 if (ret < 0) {
1917 dev_err(isp->dev, "Histogram initialization failed\n");
1918 goto error_hist;
1919 }
1920
1921 ret = omap3isp_h3a_aewb_init(isp);
1922 if (ret < 0) {
1923 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1924 goto error_h3a_aewb;
1925 }
1926
1927 ret = omap3isp_h3a_af_init(isp);
1928 if (ret < 0) {
1929 dev_err(isp->dev, "H3A AF initialization failed\n");
1930 goto error_h3a_af;
1931 }
1932
1933 return 0;
1934
1935 error_h3a_af:
1936 omap3isp_h3a_aewb_cleanup(isp);
1937 error_h3a_aewb:
1938 omap3isp_hist_cleanup(isp);
1939 error_hist:
1940 omap3isp_resizer_cleanup(isp);
1941 error_resizer:
1942 omap3isp_preview_cleanup(isp);
1943 error_preview:
1944 omap3isp_ccdc_cleanup(isp);
1945 error_ccdc:
1946 omap3isp_ccp2_cleanup(isp);
1947 error_ccp2:
1948 omap3isp_csi2_cleanup(isp);
1949 error_csi2:
1950 omap3isp_csiphy_cleanup(isp);
1951
1952 return ret;
1953 }
1954
isp_detach_iommu(struct isp_device * isp)1955 static void isp_detach_iommu(struct isp_device *isp)
1956 {
1957 arm_iommu_detach_device(isp->dev);
1958 arm_iommu_release_mapping(isp->mapping);
1959 isp->mapping = NULL;
1960 }
1961
isp_attach_iommu(struct isp_device * isp)1962 static int isp_attach_iommu(struct isp_device *isp)
1963 {
1964 struct dma_iommu_mapping *mapping;
1965 int ret;
1966
1967 /*
1968 * Create the ARM mapping, used by the ARM DMA mapping core to allocate
1969 * VAs. This will allocate a corresponding IOMMU domain.
1970 */
1971 mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
1972 if (IS_ERR(mapping)) {
1973 dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
1974 return PTR_ERR(mapping);
1975 }
1976
1977 isp->mapping = mapping;
1978
1979 /* Attach the ARM VA mapping to the device. */
1980 ret = arm_iommu_attach_device(isp->dev, mapping);
1981 if (ret < 0) {
1982 dev_err(isp->dev, "failed to attach device to VA mapping\n");
1983 goto error;
1984 }
1985
1986 return 0;
1987
1988 error:
1989 arm_iommu_release_mapping(isp->mapping);
1990 isp->mapping = NULL;
1991 return ret;
1992 }
1993
1994 /*
1995 * isp_remove - Remove ISP platform device
1996 * @pdev: Pointer to ISP platform device
1997 *
1998 * Always returns 0.
1999 */
isp_remove(struct platform_device * pdev)2000 static int isp_remove(struct platform_device *pdev)
2001 {
2002 struct isp_device *isp = platform_get_drvdata(pdev);
2003
2004 v4l2_async_notifier_unregister(&isp->notifier);
2005 isp_unregister_entities(isp);
2006 isp_cleanup_modules(isp);
2007 isp_xclk_cleanup(isp);
2008
2009 __omap3isp_get(isp, false);
2010 isp_detach_iommu(isp);
2011 __omap3isp_put(isp, false);
2012
2013 media_entity_enum_cleanup(&isp->crashed);
2014
2015 return 0;
2016 }
2017
2018 enum isp_of_phy {
2019 ISP_OF_PHY_PARALLEL = 0,
2020 ISP_OF_PHY_CSIPHY1,
2021 ISP_OF_PHY_CSIPHY2,
2022 };
2023
isp_fwnode_parse(struct device * dev,struct fwnode_handle * fwnode,struct isp_async_subdev * isd)2024 static int isp_fwnode_parse(struct device *dev, struct fwnode_handle *fwnode,
2025 struct isp_async_subdev *isd)
2026 {
2027 struct isp_bus_cfg *buscfg = &isd->bus;
2028 struct v4l2_fwnode_endpoint vep;
2029 unsigned int i;
2030 int ret;
2031 bool csi1 = false;
2032
2033 ret = v4l2_fwnode_endpoint_parse(fwnode, &vep);
2034 if (ret)
2035 return ret;
2036
2037 dev_dbg(dev, "parsing endpoint %pOF, interface %u\n",
2038 to_of_node(fwnode), vep.base.port);
2039
2040 switch (vep.base.port) {
2041 case ISP_OF_PHY_PARALLEL:
2042 buscfg->interface = ISP_INTERFACE_PARALLEL;
2043 buscfg->bus.parallel.data_lane_shift =
2044 vep.bus.parallel.data_shift;
2045 buscfg->bus.parallel.clk_pol =
2046 !!(vep.bus.parallel.flags
2047 & V4L2_MBUS_PCLK_SAMPLE_FALLING);
2048 buscfg->bus.parallel.hs_pol =
2049 !!(vep.bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW);
2050 buscfg->bus.parallel.vs_pol =
2051 !!(vep.bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW);
2052 buscfg->bus.parallel.fld_pol =
2053 !!(vep.bus.parallel.flags & V4L2_MBUS_FIELD_EVEN_LOW);
2054 buscfg->bus.parallel.data_pol =
2055 !!(vep.bus.parallel.flags & V4L2_MBUS_DATA_ACTIVE_LOW);
2056 buscfg->bus.parallel.bt656 = vep.bus_type == V4L2_MBUS_BT656;
2057 break;
2058
2059 case ISP_OF_PHY_CSIPHY1:
2060 case ISP_OF_PHY_CSIPHY2:
2061 switch (vep.bus_type) {
2062 case V4L2_MBUS_CCP2:
2063 case V4L2_MBUS_CSI1:
2064 dev_dbg(dev, "CSI-1/CCP-2 configuration\n");
2065 csi1 = true;
2066 break;
2067 case V4L2_MBUS_CSI2:
2068 dev_dbg(dev, "CSI-2 configuration\n");
2069 csi1 = false;
2070 break;
2071 default:
2072 dev_err(dev, "unsupported bus type %u\n",
2073 vep.bus_type);
2074 return -EINVAL;
2075 }
2076
2077 switch (vep.base.port) {
2078 case ISP_OF_PHY_CSIPHY1:
2079 if (csi1)
2080 buscfg->interface = ISP_INTERFACE_CCP2B_PHY1;
2081 else
2082 buscfg->interface = ISP_INTERFACE_CSI2C_PHY1;
2083 break;
2084 case ISP_OF_PHY_CSIPHY2:
2085 if (csi1)
2086 buscfg->interface = ISP_INTERFACE_CCP2B_PHY2;
2087 else
2088 buscfg->interface = ISP_INTERFACE_CSI2A_PHY2;
2089 break;
2090 }
2091 if (csi1) {
2092 buscfg->bus.ccp2.lanecfg.clk.pos =
2093 vep.bus.mipi_csi1.clock_lane;
2094 buscfg->bus.ccp2.lanecfg.clk.pol =
2095 vep.bus.mipi_csi1.lane_polarity[0];
2096 dev_dbg(dev, "clock lane polarity %u, pos %u\n",
2097 buscfg->bus.ccp2.lanecfg.clk.pol,
2098 buscfg->bus.ccp2.lanecfg.clk.pos);
2099
2100 buscfg->bus.ccp2.lanecfg.data[0].pos =
2101 vep.bus.mipi_csi1.data_lane;
2102 buscfg->bus.ccp2.lanecfg.data[0].pol =
2103 vep.bus.mipi_csi1.lane_polarity[1];
2104
2105 dev_dbg(dev, "data lane polarity %u, pos %u\n",
2106 buscfg->bus.ccp2.lanecfg.data[0].pol,
2107 buscfg->bus.ccp2.lanecfg.data[0].pos);
2108
2109 buscfg->bus.ccp2.strobe_clk_pol =
2110 vep.bus.mipi_csi1.clock_inv;
2111 buscfg->bus.ccp2.phy_layer = vep.bus.mipi_csi1.strobe;
2112 buscfg->bus.ccp2.ccp2_mode =
2113 vep.bus_type == V4L2_MBUS_CCP2;
2114 buscfg->bus.ccp2.vp_clk_pol = 1;
2115
2116 buscfg->bus.ccp2.crc = 1;
2117 } else {
2118 buscfg->bus.csi2.lanecfg.clk.pos =
2119 vep.bus.mipi_csi2.clock_lane;
2120 buscfg->bus.csi2.lanecfg.clk.pol =
2121 vep.bus.mipi_csi2.lane_polarities[0];
2122 dev_dbg(dev, "clock lane polarity %u, pos %u\n",
2123 buscfg->bus.csi2.lanecfg.clk.pol,
2124 buscfg->bus.csi2.lanecfg.clk.pos);
2125
2126 buscfg->bus.csi2.num_data_lanes =
2127 vep.bus.mipi_csi2.num_data_lanes;
2128
2129 for (i = 0; i < buscfg->bus.csi2.num_data_lanes; i++) {
2130 buscfg->bus.csi2.lanecfg.data[i].pos =
2131 vep.bus.mipi_csi2.data_lanes[i];
2132 buscfg->bus.csi2.lanecfg.data[i].pol =
2133 vep.bus.mipi_csi2.lane_polarities[i + 1];
2134 dev_dbg(dev,
2135 "data lane %u polarity %u, pos %u\n", i,
2136 buscfg->bus.csi2.lanecfg.data[i].pol,
2137 buscfg->bus.csi2.lanecfg.data[i].pos);
2138 }
2139 /*
2140 * FIXME: now we assume the CRC is always there.
2141 * Implement a way to obtain this information from the
2142 * sensor. Frame descriptors, perhaps?
2143 */
2144 buscfg->bus.csi2.crc = 1;
2145 }
2146 break;
2147
2148 default:
2149 dev_warn(dev, "%pOF: invalid interface %u\n",
2150 to_of_node(fwnode), vep.base.port);
2151 return -EINVAL;
2152 }
2153
2154 return 0;
2155 }
2156
isp_fwnodes_parse(struct device * dev,struct v4l2_async_notifier * notifier)2157 static int isp_fwnodes_parse(struct device *dev,
2158 struct v4l2_async_notifier *notifier)
2159 {
2160 struct fwnode_handle *fwnode = NULL;
2161
2162 notifier->subdevs = devm_kcalloc(
2163 dev, ISP_MAX_SUBDEVS, sizeof(*notifier->subdevs), GFP_KERNEL);
2164 if (!notifier->subdevs)
2165 return -ENOMEM;
2166
2167 while (notifier->num_subdevs < ISP_MAX_SUBDEVS &&
2168 (fwnode = fwnode_graph_get_next_endpoint(
2169 of_fwnode_handle(dev->of_node), fwnode))) {
2170 struct isp_async_subdev *isd;
2171
2172 isd = devm_kzalloc(dev, sizeof(*isd), GFP_KERNEL);
2173 if (!isd)
2174 goto error;
2175
2176 if (isp_fwnode_parse(dev, fwnode, isd)) {
2177 devm_kfree(dev, isd);
2178 continue;
2179 }
2180
2181 notifier->subdevs[notifier->num_subdevs] = &isd->asd;
2182
2183 isd->asd.match.fwnode.fwnode =
2184 fwnode_graph_get_remote_port_parent(fwnode);
2185 if (!isd->asd.match.fwnode.fwnode) {
2186 dev_warn(dev, "bad remote port parent\n");
2187 goto error;
2188 }
2189
2190 isd->asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
2191 notifier->num_subdevs++;
2192 }
2193
2194 return notifier->num_subdevs;
2195
2196 error:
2197 fwnode_handle_put(fwnode);
2198 return -EINVAL;
2199 }
2200
isp_subdev_notifier_complete(struct v4l2_async_notifier * async)2201 static int isp_subdev_notifier_complete(struct v4l2_async_notifier *async)
2202 {
2203 struct isp_device *isp = container_of(async, struct isp_device,
2204 notifier);
2205 struct v4l2_device *v4l2_dev = &isp->v4l2_dev;
2206 struct v4l2_subdev *sd;
2207 int ret;
2208
2209 ret = media_entity_enum_init(&isp->crashed, &isp->media_dev);
2210 if (ret)
2211 return ret;
2212
2213 list_for_each_entry(sd, &v4l2_dev->subdevs, list) {
2214 if (!sd->asd)
2215 continue;
2216
2217 ret = isp_link_entity(isp, &sd->entity,
2218 v4l2_subdev_to_bus_cfg(sd)->interface);
2219 if (ret < 0)
2220 return ret;
2221 }
2222
2223 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
2224 if (ret < 0)
2225 return ret;
2226
2227 return media_device_register(&isp->media_dev);
2228 }
2229
2230 /*
2231 * isp_probe - Probe ISP platform device
2232 * @pdev: Pointer to ISP platform device
2233 *
2234 * Returns 0 if successful,
2235 * -ENOMEM if no memory available,
2236 * -ENODEV if no platform device resources found
2237 * or no space for remapping registers,
2238 * -EINVAL if couldn't install ISR,
2239 * or clk_get return error value.
2240 */
isp_probe(struct platform_device * pdev)2241 static int isp_probe(struct platform_device *pdev)
2242 {
2243 struct isp_device *isp;
2244 struct resource *mem;
2245 int ret;
2246 int i, m;
2247
2248 isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
2249 if (!isp) {
2250 dev_err(&pdev->dev, "could not allocate memory\n");
2251 return -ENOMEM;
2252 }
2253
2254 ret = fwnode_property_read_u32(of_fwnode_handle(pdev->dev.of_node),
2255 "ti,phy-type", &isp->phy_type);
2256 if (ret)
2257 return ret;
2258
2259 isp->syscon = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
2260 "syscon");
2261 if (IS_ERR(isp->syscon))
2262 return PTR_ERR(isp->syscon);
2263
2264 ret = of_property_read_u32_index(pdev->dev.of_node,
2265 "syscon", 1, &isp->syscon_offset);
2266 if (ret)
2267 return ret;
2268
2269 ret = isp_fwnodes_parse(&pdev->dev, &isp->notifier);
2270 if (ret < 0)
2271 return ret;
2272
2273 isp->autoidle = autoidle;
2274
2275 mutex_init(&isp->isp_mutex);
2276 spin_lock_init(&isp->stat_lock);
2277
2278 isp->dev = &pdev->dev;
2279 isp->ref_count = 0;
2280
2281 ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
2282 if (ret)
2283 goto error;
2284
2285 platform_set_drvdata(pdev, isp);
2286
2287 /* Regulators */
2288 isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy1");
2289 isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy2");
2290
2291 /* Clocks
2292 *
2293 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2294 * manually to read the revision before calling __omap3isp_get().
2295 *
2296 * Start by mapping the ISP MMIO area, which is in two pieces.
2297 * The ISP IOMMU is in between. Map both now, and fill in the
2298 * ISP revision specific portions a little later in the
2299 * function.
2300 */
2301 for (i = 0; i < 2; i++) {
2302 unsigned int map_idx = i ? OMAP3_ISP_IOMEM_CSI2A_REGS1 : 0;
2303
2304 mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
2305 isp->mmio_base[map_idx] =
2306 devm_ioremap_resource(isp->dev, mem);
2307 if (IS_ERR(isp->mmio_base[map_idx]))
2308 return PTR_ERR(isp->mmio_base[map_idx]);
2309 }
2310
2311 ret = isp_get_clocks(isp);
2312 if (ret < 0)
2313 goto error;
2314
2315 ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
2316 if (ret < 0)
2317 goto error;
2318
2319 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2320 dev_info(isp->dev, "Revision %d.%d found\n",
2321 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2322
2323 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
2324
2325 if (__omap3isp_get(isp, false) == NULL) {
2326 ret = -ENODEV;
2327 goto error;
2328 }
2329
2330 ret = isp_reset(isp);
2331 if (ret < 0)
2332 goto error_isp;
2333
2334 ret = isp_xclk_init(isp);
2335 if (ret < 0)
2336 goto error_isp;
2337
2338 /* Memory resources */
2339 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2340 if (isp->revision == isp_res_maps[m].isp_rev)
2341 break;
2342
2343 if (m == ARRAY_SIZE(isp_res_maps)) {
2344 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2345 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2346 ret = -ENODEV;
2347 goto error_isp;
2348 }
2349
2350 for (i = 1; i < OMAP3_ISP_IOMEM_CSI2A_REGS1; i++)
2351 isp->mmio_base[i] =
2352 isp->mmio_base[0] + isp_res_maps[m].offset[i];
2353
2354 for (i = OMAP3_ISP_IOMEM_CSIPHY2; i < OMAP3_ISP_IOMEM_LAST; i++)
2355 isp->mmio_base[i] =
2356 isp->mmio_base[OMAP3_ISP_IOMEM_CSI2A_REGS1]
2357 + isp_res_maps[m].offset[i];
2358
2359 isp->mmio_hist_base_phys =
2360 mem->start + isp_res_maps[m].offset[OMAP3_ISP_IOMEM_HIST];
2361
2362 /* IOMMU */
2363 ret = isp_attach_iommu(isp);
2364 if (ret < 0) {
2365 dev_err(&pdev->dev, "unable to attach to IOMMU\n");
2366 goto error_isp;
2367 }
2368
2369 /* Interrupt */
2370 ret = platform_get_irq(pdev, 0);
2371 if (ret <= 0) {
2372 dev_err(isp->dev, "No IRQ resource\n");
2373 ret = -ENODEV;
2374 goto error_iommu;
2375 }
2376 isp->irq_num = ret;
2377
2378 if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
2379 "OMAP3 ISP", isp)) {
2380 dev_err(isp->dev, "Unable to request IRQ\n");
2381 ret = -EINVAL;
2382 goto error_iommu;
2383 }
2384
2385 /* Entities */
2386 ret = isp_initialize_modules(isp);
2387 if (ret < 0)
2388 goto error_iommu;
2389
2390 ret = isp_register_entities(isp);
2391 if (ret < 0)
2392 goto error_modules;
2393
2394 ret = isp_create_links(isp);
2395 if (ret < 0)
2396 goto error_register_entities;
2397
2398 isp->notifier.complete = isp_subdev_notifier_complete;
2399
2400 ret = v4l2_async_notifier_register(&isp->v4l2_dev, &isp->notifier);
2401 if (ret)
2402 goto error_register_entities;
2403
2404 isp_core_init(isp, 1);
2405 omap3isp_put(isp);
2406
2407 return 0;
2408
2409 error_register_entities:
2410 isp_unregister_entities(isp);
2411 error_modules:
2412 isp_cleanup_modules(isp);
2413 error_iommu:
2414 isp_detach_iommu(isp);
2415 error_isp:
2416 isp_xclk_cleanup(isp);
2417 __omap3isp_put(isp, false);
2418 error:
2419 mutex_destroy(&isp->isp_mutex);
2420
2421 return ret;
2422 }
2423
2424 static const struct dev_pm_ops omap3isp_pm_ops = {
2425 .prepare = isp_pm_prepare,
2426 .suspend = isp_pm_suspend,
2427 .resume = isp_pm_resume,
2428 .complete = isp_pm_complete,
2429 };
2430
2431 static struct platform_device_id omap3isp_id_table[] = {
2432 { "omap3isp", 0 },
2433 { },
2434 };
2435 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2436
2437 static const struct of_device_id omap3isp_of_table[] = {
2438 { .compatible = "ti,omap3-isp" },
2439 { },
2440 };
2441 MODULE_DEVICE_TABLE(of, omap3isp_of_table);
2442
2443 static struct platform_driver omap3isp_driver = {
2444 .probe = isp_probe,
2445 .remove = isp_remove,
2446 .id_table = omap3isp_id_table,
2447 .driver = {
2448 .name = "omap3isp",
2449 .pm = &omap3isp_pm_ops,
2450 .of_match_table = omap3isp_of_table,
2451 },
2452 };
2453
2454 module_platform_driver(omap3isp_driver);
2455
2456 MODULE_AUTHOR("Nokia Corporation");
2457 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2458 MODULE_LICENSE("GPL");
2459 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);
2460