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1 /**
2  *
3  * GSPCA sub driver for W996[78]CF JPEG USB Dual Mode Camera Chip.
4  *
5  * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
6  *
7  * This module is adapted from the in kernel v4l1 w9968cf driver:
8  *
9  * Copyright (C) 2002-2004 by Luca Risolia <luca.risolia@studio.unibo.it>
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or
14  * any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  */
22 
23 /* Note this is not a stand alone driver, it gets included in ov519.c, this
24    is a bit of a hack, but it needs the driver code for a lot of different
25    ov sensors which is already present in ov519.c (the old v4l1 driver used
26    the ovchipcam framework). When we have the time we really should move
27    the sensor drivers to v4l2 sub drivers, and properly split of this
28    driver from ov519.c */
29 
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31 
32 #define W9968CF_I2C_BUS_DELAY    4 /* delay in us for I2C bit r/w operations */
33 
34 #define Y_QUANTABLE (&sd->jpeg_hdr[JPEG_QT0_OFFSET])
35 #define UV_QUANTABLE (&sd->jpeg_hdr[JPEG_QT1_OFFSET])
36 
37 static const struct v4l2_pix_format w9968cf_vga_mode[] = {
38 	{160, 120, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE,
39 		.bytesperline = 160 * 2,
40 		.sizeimage = 160 * 120 * 2,
41 		.colorspace = V4L2_COLORSPACE_JPEG},
42 	{176, 144, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE,
43 		.bytesperline = 176 * 2,
44 		.sizeimage = 176 * 144 * 2,
45 		.colorspace = V4L2_COLORSPACE_JPEG},
46 	{320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
47 		.bytesperline = 320 * 2,
48 		.sizeimage = 320 * 240 * 2,
49 		.colorspace = V4L2_COLORSPACE_JPEG},
50 	{352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
51 		.bytesperline = 352 * 2,
52 		.sizeimage = 352 * 288 * 2,
53 		.colorspace = V4L2_COLORSPACE_JPEG},
54 	{640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
55 		.bytesperline = 640 * 2,
56 		.sizeimage = 640 * 480 * 2,
57 		.colorspace = V4L2_COLORSPACE_JPEG},
58 };
59 
60 static void reg_w(struct sd *sd, u16 index, u16 value);
61 
62 /*--------------------------------------------------------------------------
63   Write 64-bit data to the fast serial bus registers.
64   Return 0 on success, -1 otherwise.
65   --------------------------------------------------------------------------*/
w9968cf_write_fsb(struct sd * sd,u16 * data)66 static void w9968cf_write_fsb(struct sd *sd, u16* data)
67 {
68 	struct usb_device *udev = sd->gspca_dev.dev;
69 	u16 value;
70 	int ret;
71 
72 	if (sd->gspca_dev.usb_err < 0)
73 		return;
74 
75 	value = *data++;
76 	memcpy(sd->gspca_dev.usb_buf, data, 6);
77 
78 	/* Avoid things going to fast for the bridge with a xhci host */
79 	udelay(150);
80 	ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0,
81 			      USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE,
82 			      value, 0x06, sd->gspca_dev.usb_buf, 6, 500);
83 	if (ret < 0) {
84 		pr_err("Write FSB registers failed (%d)\n", ret);
85 		sd->gspca_dev.usb_err = ret;
86 	}
87 }
88 
89 /*--------------------------------------------------------------------------
90   Write data to the serial bus control register.
91   Return 0 on success, a negative number otherwise.
92   --------------------------------------------------------------------------*/
w9968cf_write_sb(struct sd * sd,u16 value)93 static void w9968cf_write_sb(struct sd *sd, u16 value)
94 {
95 	int ret;
96 
97 	if (sd->gspca_dev.usb_err < 0)
98 		return;
99 
100 	/* Avoid things going to fast for the bridge with a xhci host */
101 	udelay(150);
102 
103 	/* We don't use reg_w here, as that would cause all writes when
104 	   bitbanging i2c to be logged, making the logs impossible to read */
105 	ret = usb_control_msg(sd->gspca_dev.dev,
106 		usb_sndctrlpipe(sd->gspca_dev.dev, 0),
107 		0,
108 		USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
109 		value, 0x01, NULL, 0, 500);
110 
111 	udelay(W9968CF_I2C_BUS_DELAY);
112 
113 	if (ret < 0) {
114 		pr_err("Write SB reg [01] %04x failed\n", value);
115 		sd->gspca_dev.usb_err = ret;
116 	}
117 }
118 
119 /*--------------------------------------------------------------------------
120   Read data from the serial bus control register.
121   Return 0 on success, a negative number otherwise.
122   --------------------------------------------------------------------------*/
w9968cf_read_sb(struct sd * sd)123 static int w9968cf_read_sb(struct sd *sd)
124 {
125 	int ret;
126 
127 	if (sd->gspca_dev.usb_err < 0)
128 		return -1;
129 
130 	/* Avoid things going to fast for the bridge with a xhci host */
131 	udelay(150);
132 
133 	/* We don't use reg_r here, as the w9968cf is special and has 16
134 	   bit registers instead of 8 bit */
135 	ret = usb_control_msg(sd->gspca_dev.dev,
136 			usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
137 			1,
138 			USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
139 			0, 0x01, sd->gspca_dev.usb_buf, 2, 500);
140 	if (ret >= 0) {
141 		ret = sd->gspca_dev.usb_buf[0] |
142 		      (sd->gspca_dev.usb_buf[1] << 8);
143 	} else {
144 		pr_err("Read SB reg [01] failed\n");
145 		sd->gspca_dev.usb_err = ret;
146 		/*
147 		 * Make sure the buffer is zeroed to avoid uninitialized
148 		 * values.
149 		 */
150 		memset(sd->gspca_dev.usb_buf, 0, 2);
151 	}
152 
153 	udelay(W9968CF_I2C_BUS_DELAY);
154 
155 	return ret;
156 }
157 
158 /*--------------------------------------------------------------------------
159   Upload quantization tables for the JPEG compression.
160   This function is called by w9968cf_start_transfer().
161   Return 0 on success, a negative number otherwise.
162   --------------------------------------------------------------------------*/
w9968cf_upload_quantizationtables(struct sd * sd)163 static void w9968cf_upload_quantizationtables(struct sd *sd)
164 {
165 	u16 a, b;
166 	int i, j;
167 
168 	reg_w(sd, 0x39, 0x0010); /* JPEG clock enable */
169 
170 	for (i = 0, j = 0; i < 32; i++, j += 2) {
171 		a = Y_QUANTABLE[j] | ((unsigned)(Y_QUANTABLE[j + 1]) << 8);
172 		b = UV_QUANTABLE[j] | ((unsigned)(UV_QUANTABLE[j + 1]) << 8);
173 		reg_w(sd, 0x40 + i, a);
174 		reg_w(sd, 0x60 + i, b);
175 	}
176 	reg_w(sd, 0x39, 0x0012); /* JPEG encoder enable */
177 }
178 
179 /****************************************************************************
180  * Low-level I2C I/O functions.                                             *
181  * The adapter supports the following I2C transfer functions:               *
182  * i2c_adap_fastwrite_byte_data() (at 400 kHz bit frequency only)           *
183  * i2c_adap_read_byte_data()                                                *
184  * i2c_adap_read_byte()                                                     *
185  ****************************************************************************/
186 
w9968cf_smbus_start(struct sd * sd)187 static void w9968cf_smbus_start(struct sd *sd)
188 {
189 	w9968cf_write_sb(sd, 0x0011); /* SDE=1, SDA=0, SCL=1 */
190 	w9968cf_write_sb(sd, 0x0010); /* SDE=1, SDA=0, SCL=0 */
191 }
192 
w9968cf_smbus_stop(struct sd * sd)193 static void w9968cf_smbus_stop(struct sd *sd)
194 {
195 	w9968cf_write_sb(sd, 0x0010); /* SDE=1, SDA=0, SCL=0 */
196 	w9968cf_write_sb(sd, 0x0011); /* SDE=1, SDA=0, SCL=1 */
197 	w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
198 }
199 
w9968cf_smbus_write_byte(struct sd * sd,u8 v)200 static void w9968cf_smbus_write_byte(struct sd *sd, u8 v)
201 {
202 	u8 bit;
203 	int sda;
204 
205 	for (bit = 0 ; bit < 8 ; bit++) {
206 		sda = (v & 0x80) ? 2 : 0;
207 		v <<= 1;
208 		/* SDE=1, SDA=sda, SCL=0 */
209 		w9968cf_write_sb(sd, 0x10 | sda);
210 		/* SDE=1, SDA=sda, SCL=1 */
211 		w9968cf_write_sb(sd, 0x11 | sda);
212 		/* SDE=1, SDA=sda, SCL=0 */
213 		w9968cf_write_sb(sd, 0x10 | sda);
214 	}
215 }
216 
w9968cf_smbus_read_byte(struct sd * sd,u8 * v)217 static void w9968cf_smbus_read_byte(struct sd *sd, u8 *v)
218 {
219 	u8 bit;
220 
221 	/* No need to ensure SDA is high as we are always called after
222 	   read_ack which ends with SDA high */
223 	*v = 0;
224 	for (bit = 0 ; bit < 8 ; bit++) {
225 		*v <<= 1;
226 		/* SDE=1, SDA=1, SCL=1 */
227 		w9968cf_write_sb(sd, 0x0013);
228 		*v |= (w9968cf_read_sb(sd) & 0x0008) ? 1 : 0;
229 		/* SDE=1, SDA=1, SCL=0 */
230 		w9968cf_write_sb(sd, 0x0012);
231 	}
232 }
233 
w9968cf_smbus_write_nack(struct sd * sd)234 static void w9968cf_smbus_write_nack(struct sd *sd)
235 {
236 	/* No need to ensure SDA is high as we are always called after
237 	   read_byte which ends with SDA high */
238 	w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
239 	w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
240 }
241 
w9968cf_smbus_read_ack(struct sd * sd)242 static void w9968cf_smbus_read_ack(struct sd *sd)
243 {
244 	struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
245 	int sda;
246 
247 	/* Ensure SDA is high before raising clock to avoid a spurious stop */
248 	w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
249 	w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
250 	sda = w9968cf_read_sb(sd);
251 	w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
252 	if (sda >= 0 && (sda & 0x08)) {
253 		PDEBUG(D_USBI, "Did not receive i2c ACK");
254 		sd->gspca_dev.usb_err = -EIO;
255 	}
256 }
257 
258 /* SMBus protocol: S Addr Wr [A] Subaddr [A] Value [A] P */
w9968cf_i2c_w(struct sd * sd,u8 reg,u8 value)259 static void w9968cf_i2c_w(struct sd *sd, u8 reg, u8 value)
260 {
261 	struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
262 	u16* data = (u16 *)sd->gspca_dev.usb_buf;
263 
264 	data[0] = 0x082f | ((sd->sensor_addr & 0x80) ? 0x1500 : 0x0);
265 	data[0] |= (sd->sensor_addr & 0x40) ? 0x4000 : 0x0;
266 	data[1] = 0x2082 | ((sd->sensor_addr & 0x40) ? 0x0005 : 0x0);
267 	data[1] |= (sd->sensor_addr & 0x20) ? 0x0150 : 0x0;
268 	data[1] |= (sd->sensor_addr & 0x10) ? 0x5400 : 0x0;
269 	data[2] = 0x8208 | ((sd->sensor_addr & 0x08) ? 0x0015 : 0x0);
270 	data[2] |= (sd->sensor_addr & 0x04) ? 0x0540 : 0x0;
271 	data[2] |= (sd->sensor_addr & 0x02) ? 0x5000 : 0x0;
272 	data[3] = 0x1d20 | ((sd->sensor_addr & 0x02) ? 0x0001 : 0x0);
273 	data[3] |= (sd->sensor_addr & 0x01) ? 0x0054 : 0x0;
274 
275 	w9968cf_write_fsb(sd, data);
276 
277 	data[0] = 0x8208 | ((reg & 0x80) ? 0x0015 : 0x0);
278 	data[0] |= (reg & 0x40) ? 0x0540 : 0x0;
279 	data[0] |= (reg & 0x20) ? 0x5000 : 0x0;
280 	data[1] = 0x0820 | ((reg & 0x20) ? 0x0001 : 0x0);
281 	data[1] |= (reg & 0x10) ? 0x0054 : 0x0;
282 	data[1] |= (reg & 0x08) ? 0x1500 : 0x0;
283 	data[1] |= (reg & 0x04) ? 0x4000 : 0x0;
284 	data[2] = 0x2082 | ((reg & 0x04) ? 0x0005 : 0x0);
285 	data[2] |= (reg & 0x02) ? 0x0150 : 0x0;
286 	data[2] |= (reg & 0x01) ? 0x5400 : 0x0;
287 	data[3] = 0x001d;
288 
289 	w9968cf_write_fsb(sd, data);
290 
291 	data[0] = 0x8208 | ((value & 0x80) ? 0x0015 : 0x0);
292 	data[0] |= (value & 0x40) ? 0x0540 : 0x0;
293 	data[0] |= (value & 0x20) ? 0x5000 : 0x0;
294 	data[1] = 0x0820 | ((value & 0x20) ? 0x0001 : 0x0);
295 	data[1] |= (value & 0x10) ? 0x0054 : 0x0;
296 	data[1] |= (value & 0x08) ? 0x1500 : 0x0;
297 	data[1] |= (value & 0x04) ? 0x4000 : 0x0;
298 	data[2] = 0x2082 | ((value & 0x04) ? 0x0005 : 0x0);
299 	data[2] |= (value & 0x02) ? 0x0150 : 0x0;
300 	data[2] |= (value & 0x01) ? 0x5400 : 0x0;
301 	data[3] = 0xfe1d;
302 
303 	w9968cf_write_fsb(sd, data);
304 
305 	PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
306 }
307 
308 /* SMBus protocol: S Addr Wr [A] Subaddr [A] P S Addr+1 Rd [A] [Value] NA P */
w9968cf_i2c_r(struct sd * sd,u8 reg)309 static int w9968cf_i2c_r(struct sd *sd, u8 reg)
310 {
311 	struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
312 	int ret = 0;
313 	u8 value;
314 
315 	/* Fast serial bus data control disable */
316 	w9968cf_write_sb(sd, 0x0013); /* don't change ! */
317 
318 	w9968cf_smbus_start(sd);
319 	w9968cf_smbus_write_byte(sd, sd->sensor_addr);
320 	w9968cf_smbus_read_ack(sd);
321 	w9968cf_smbus_write_byte(sd, reg);
322 	w9968cf_smbus_read_ack(sd);
323 	w9968cf_smbus_stop(sd);
324 	w9968cf_smbus_start(sd);
325 	w9968cf_smbus_write_byte(sd, sd->sensor_addr + 1);
326 	w9968cf_smbus_read_ack(sd);
327 	w9968cf_smbus_read_byte(sd, &value);
328 	/* signal we don't want to read anymore, the v4l1 driver used to
329 	   send an ack here which is very wrong! (and then fixed
330 	   the issues this gave by retrying reads) */
331 	w9968cf_smbus_write_nack(sd);
332 	w9968cf_smbus_stop(sd);
333 
334 	/* Fast serial bus data control re-enable */
335 	w9968cf_write_sb(sd, 0x0030);
336 
337 	if (sd->gspca_dev.usb_err >= 0) {
338 		ret = value;
339 		PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
340 	} else
341 		PERR("i2c read [0x%02x] failed", reg);
342 
343 	return ret;
344 }
345 
346 /*--------------------------------------------------------------------------
347   Turn on the LED on some webcams. A beep should be heard too.
348   Return 0 on success, a negative number otherwise.
349   --------------------------------------------------------------------------*/
w9968cf_configure(struct sd * sd)350 static void w9968cf_configure(struct sd *sd)
351 {
352 	reg_w(sd, 0x00, 0xff00); /* power-down */
353 	reg_w(sd, 0x00, 0xbf17); /* reset everything */
354 	reg_w(sd, 0x00, 0xbf10); /* normal operation */
355 	reg_w(sd, 0x01, 0x0010); /* serial bus, SDS high */
356 	reg_w(sd, 0x01, 0x0000); /* serial bus, SDS low */
357 	reg_w(sd, 0x01, 0x0010); /* ..high 'beep-beep' */
358 	reg_w(sd, 0x01, 0x0030); /* Set sda scl to FSB mode */
359 
360 	sd->stopped = 1;
361 }
362 
w9968cf_init(struct sd * sd)363 static void w9968cf_init(struct sd *sd)
364 {
365 	unsigned long hw_bufsize = sd->sif ? (352 * 288 * 2) : (640 * 480 * 2),
366 		      y0 = 0x0000,
367 		      u0 = y0 + hw_bufsize / 2,
368 		      v0 = u0 + hw_bufsize / 4,
369 		      y1 = v0 + hw_bufsize / 4,
370 		      u1 = y1 + hw_bufsize / 2,
371 		      v1 = u1 + hw_bufsize / 4;
372 
373 	reg_w(sd, 0x00, 0xff00); /* power off */
374 	reg_w(sd, 0x00, 0xbf10); /* power on */
375 
376 	reg_w(sd, 0x03, 0x405d); /* DRAM timings */
377 	reg_w(sd, 0x04, 0x0030); /* SDRAM timings */
378 
379 	reg_w(sd, 0x20, y0 & 0xffff); /* Y buf.0, low */
380 	reg_w(sd, 0x21, y0 >> 16);    /* Y buf.0, high */
381 	reg_w(sd, 0x24, u0 & 0xffff); /* U buf.0, low */
382 	reg_w(sd, 0x25, u0 >> 16);    /* U buf.0, high */
383 	reg_w(sd, 0x28, v0 & 0xffff); /* V buf.0, low */
384 	reg_w(sd, 0x29, v0 >> 16);    /* V buf.0, high */
385 
386 	reg_w(sd, 0x22, y1 & 0xffff); /* Y buf.1, low */
387 	reg_w(sd, 0x23, y1 >> 16);    /* Y buf.1, high */
388 	reg_w(sd, 0x26, u1 & 0xffff); /* U buf.1, low */
389 	reg_w(sd, 0x27, u1 >> 16);    /* U buf.1, high */
390 	reg_w(sd, 0x2a, v1 & 0xffff); /* V buf.1, low */
391 	reg_w(sd, 0x2b, v1 >> 16);    /* V buf.1, high */
392 
393 	reg_w(sd, 0x32, y1 & 0xffff); /* JPEG buf 0 low */
394 	reg_w(sd, 0x33, y1 >> 16);    /* JPEG buf 0 high */
395 
396 	reg_w(sd, 0x34, y1 & 0xffff); /* JPEG buf 1 low */
397 	reg_w(sd, 0x35, y1 >> 16);    /* JPEG bug 1 high */
398 
399 	reg_w(sd, 0x36, 0x0000);/* JPEG restart interval */
400 	reg_w(sd, 0x37, 0x0804);/*JPEG VLE FIFO threshold*/
401 	reg_w(sd, 0x38, 0x0000);/* disable hw up-scaling */
402 	reg_w(sd, 0x3f, 0x0000); /* JPEG/MCTL test data */
403 }
404 
w9968cf_set_crop_window(struct sd * sd)405 static void w9968cf_set_crop_window(struct sd *sd)
406 {
407 	int start_cropx, start_cropy,  x, y, fw, fh, cw, ch,
408 	    max_width, max_height;
409 
410 	if (sd->sif) {
411 		max_width  = 352;
412 		max_height = 288;
413 	} else {
414 		max_width  = 640;
415 		max_height = 480;
416 	}
417 
418 	if (sd->sensor == SEN_OV7620) {
419 		/*
420 		 * Sigh, this is dependend on the clock / framerate changes
421 		 * made by the frequency control, sick.
422 		 *
423 		 * Note we cannot use v4l2_ctrl_g_ctrl here, as we get called
424 		 * from ov519.c:setfreq() with the ctrl lock held!
425 		 */
426 		if (sd->freq->val == 1) {
427 			start_cropx = 277;
428 			start_cropy = 37;
429 		} else {
430 			start_cropx = 105;
431 			start_cropy = 37;
432 		}
433 	} else {
434 		start_cropx = 320;
435 		start_cropy = 35;
436 	}
437 
438 	/* Work around to avoid FP arithmetics */
439 	#define SC(x) ((x) << 10)
440 
441 	/* Scaling factors */
442 	fw = SC(sd->gspca_dev.pixfmt.width) / max_width;
443 	fh = SC(sd->gspca_dev.pixfmt.height) / max_height;
444 
445 	cw = (fw >= fh) ? max_width : SC(sd->gspca_dev.pixfmt.width) / fh;
446 	ch = (fw >= fh) ? SC(sd->gspca_dev.pixfmt.height) / fw : max_height;
447 
448 	sd->sensor_width = max_width;
449 	sd->sensor_height = max_height;
450 
451 	x = (max_width - cw) / 2;
452 	y = (max_height - ch) / 2;
453 
454 	reg_w(sd, 0x10, start_cropx + x);
455 	reg_w(sd, 0x11, start_cropy + y);
456 	reg_w(sd, 0x12, start_cropx + x + cw);
457 	reg_w(sd, 0x13, start_cropy + y + ch);
458 }
459 
w9968cf_mode_init_regs(struct sd * sd)460 static void w9968cf_mode_init_regs(struct sd *sd)
461 {
462 	int val, vs_polarity, hs_polarity;
463 
464 	w9968cf_set_crop_window(sd);
465 
466 	reg_w(sd, 0x14, sd->gspca_dev.pixfmt.width);
467 	reg_w(sd, 0x15, sd->gspca_dev.pixfmt.height);
468 
469 	/* JPEG width & height */
470 	reg_w(sd, 0x30, sd->gspca_dev.pixfmt.width);
471 	reg_w(sd, 0x31, sd->gspca_dev.pixfmt.height);
472 
473 	/* Y & UV frame buffer strides (in WORD) */
474 	if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat ==
475 	    V4L2_PIX_FMT_JPEG) {
476 		reg_w(sd, 0x2c, sd->gspca_dev.pixfmt.width / 2);
477 		reg_w(sd, 0x2d, sd->gspca_dev.pixfmt.width / 4);
478 	} else
479 		reg_w(sd, 0x2c, sd->gspca_dev.pixfmt.width);
480 
481 	reg_w(sd, 0x00, 0xbf17); /* reset everything */
482 	reg_w(sd, 0x00, 0xbf10); /* normal operation */
483 
484 	/* Transfer size in WORDS (for UYVY format only) */
485 	val = sd->gspca_dev.pixfmt.width * sd->gspca_dev.pixfmt.height;
486 	reg_w(sd, 0x3d, val & 0xffff); /* low bits */
487 	reg_w(sd, 0x3e, val >> 16);    /* high bits */
488 
489 	if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat ==
490 	    V4L2_PIX_FMT_JPEG) {
491 		/* We may get called multiple times (usb isoc bw negotiat.) */
492 		jpeg_define(sd->jpeg_hdr, sd->gspca_dev.pixfmt.height,
493 			    sd->gspca_dev.pixfmt.width, 0x22); /* JPEG 420 */
494 		jpeg_set_qual(sd->jpeg_hdr, v4l2_ctrl_g_ctrl(sd->jpegqual));
495 		w9968cf_upload_quantizationtables(sd);
496 		v4l2_ctrl_grab(sd->jpegqual, true);
497 	}
498 
499 	/* Video Capture Control Register */
500 	if (sd->sensor == SEN_OV7620) {
501 		/* Seems to work around a bug in the image sensor */
502 		vs_polarity = 1;
503 		hs_polarity = 1;
504 	} else {
505 		vs_polarity = 1;
506 		hs_polarity = 0;
507 	}
508 
509 	val = (vs_polarity << 12) | (hs_polarity << 11);
510 
511 	/* NOTE: We may not have enough memory to do double buffering while
512 	   doing compression (amount of memory differs per model cam).
513 	   So we use the second image buffer also as jpeg stream buffer
514 	   (see w9968cf_init), and disable double buffering. */
515 	if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat ==
516 	    V4L2_PIX_FMT_JPEG) {
517 		/* val |= 0x0002; YUV422P */
518 		val |= 0x0003; /* YUV420P */
519 	} else
520 		val |= 0x0080; /* Enable HW double buffering */
521 
522 	/* val |= 0x0020; enable clamping */
523 	/* val |= 0x0008; enable (1-2-1) filter */
524 	/* val |= 0x000c; enable (2-3-6-3-2) filter */
525 
526 	val |= 0x8000; /* capt. enable */
527 
528 	reg_w(sd, 0x16, val);
529 
530 	sd->gspca_dev.empty_packet = 0;
531 }
532 
w9968cf_stop0(struct sd * sd)533 static void w9968cf_stop0(struct sd *sd)
534 {
535 	v4l2_ctrl_grab(sd->jpegqual, false);
536 	reg_w(sd, 0x39, 0x0000); /* disable JPEG encoder */
537 	reg_w(sd, 0x16, 0x0000); /* stop video capture */
538 }
539 
540 /* The w9968cf docs say that a 0 sized packet means EOF (and also SOF
541    for the next frame). This seems to simply not be true when operating
542    in JPEG mode, in this case there may be empty packets within the
543    frame. So in JPEG mode use the JPEG SOI marker to detect SOF.
544 
545    Note to make things even more interesting the w9968cf sends *PLANAR* jpeg,
546    to be precise it sends: SOI, SOF, DRI, SOS, Y-data, SOS, U-data, SOS,
547    V-data, EOI. */
w9968cf_pkt_scan(struct gspca_dev * gspca_dev,u8 * data,int len)548 static void w9968cf_pkt_scan(struct gspca_dev *gspca_dev,
549 			u8 *data,			/* isoc packet */
550 			int len)			/* iso packet length */
551 {
552 	struct sd *sd = (struct sd *) gspca_dev;
553 
554 	if (w9968cf_vga_mode[gspca_dev->curr_mode].pixelformat ==
555 	    V4L2_PIX_FMT_JPEG) {
556 		if (len >= 2 &&
557 		    data[0] == 0xff &&
558 		    data[1] == 0xd8) {
559 			gspca_frame_add(gspca_dev, LAST_PACKET,
560 					NULL, 0);
561 			gspca_frame_add(gspca_dev, FIRST_PACKET,
562 					sd->jpeg_hdr, JPEG_HDR_SZ);
563 			/* Strip the ff d8, our own header (which adds
564 			   huffman and quantization tables) already has this */
565 			len -= 2;
566 			data += 2;
567 		}
568 	} else {
569 		/* In UYVY mode an empty packet signals EOF */
570 		if (gspca_dev->empty_packet) {
571 			gspca_frame_add(gspca_dev, LAST_PACKET,
572 						NULL, 0);
573 			gspca_frame_add(gspca_dev, FIRST_PACKET,
574 					NULL, 0);
575 			gspca_dev->empty_packet = 0;
576 		}
577 	}
578 	gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
579 }
580