1 /*
2 * at24.c - handle most I2C EEPROMs
3 *
4 * Copyright (C) 2005-2007 David Brownell
5 * Copyright (C) 2008 Wolfram Sang, Pengutronix
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/mutex.h>
18 #include <linux/mod_devicetable.h>
19 #include <linux/log2.h>
20 #include <linux/bitops.h>
21 #include <linux/jiffies.h>
22 #include <linux/property.h>
23 #include <linux/acpi.h>
24 #include <linux/i2c.h>
25 #include <linux/nvmem-provider.h>
26 #include <linux/platform_data/at24.h>
27
28 /*
29 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
30 * Differences between different vendor product lines (like Atmel AT24C or
31 * MicroChip 24LC, etc) won't much matter for typical read/write access.
32 * There are also I2C RAM chips, likewise interchangeable. One example
33 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
34 *
35 * However, misconfiguration can lose data. "Set 16-bit memory address"
36 * to a part with 8-bit addressing will overwrite data. Writing with too
37 * big a page size also loses data. And it's not safe to assume that the
38 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
39 * uses 0x51, for just one example.
40 *
41 * Accordingly, explicit board-specific configuration data should be used
42 * in almost all cases. (One partial exception is an SMBus used to access
43 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
44 *
45 * So this driver uses "new style" I2C driver binding, expecting to be
46 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
47 * similar kernel-resident tables; or, configuration data coming from
48 * a bootloader.
49 *
50 * Other than binding model, current differences from "eeprom" driver are
51 * that this one handles write access and isn't restricted to 24c02 devices.
52 * It also handles larger devices (32 kbit and up) with two-byte addresses,
53 * which won't work on pure SMBus systems.
54 */
55
56 struct at24_data {
57 struct at24_platform_data chip;
58 int use_smbus;
59 int use_smbus_write;
60
61 ssize_t (*read_func)(struct at24_data *, char *, unsigned int, size_t);
62 ssize_t (*write_func)(struct at24_data *,
63 const char *, unsigned int, size_t);
64
65 /*
66 * Lock protects against activities from other Linux tasks,
67 * but not from changes by other I2C masters.
68 */
69 struct mutex lock;
70
71 u8 *writebuf;
72 unsigned write_max;
73 unsigned num_addresses;
74
75 struct nvmem_config nvmem_config;
76 struct nvmem_device *nvmem;
77
78 /*
79 * Some chips tie up multiple I2C addresses; dummy devices reserve
80 * them for us, and we'll use them with SMBus calls.
81 */
82 struct i2c_client *client[];
83 };
84
85 /*
86 * This parameter is to help this driver avoid blocking other drivers out
87 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
88 * clock, one 256 byte read takes about 1/43 second which is excessive;
89 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
90 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
91 *
92 * This value is forced to be a power of two so that writes align on pages.
93 */
94 static unsigned io_limit = 128;
95 module_param(io_limit, uint, 0);
96 MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)");
97
98 /*
99 * Specs often allow 5 msec for a page write, sometimes 20 msec;
100 * it's important to recover from write timeouts.
101 */
102 static unsigned write_timeout = 25;
103 module_param(write_timeout, uint, 0);
104 MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)");
105
106 #define AT24_SIZE_BYTELEN 5
107 #define AT24_SIZE_FLAGS 8
108
109 #define AT24_BITMASK(x) (BIT(x) - 1)
110
111 /* create non-zero magic value for given eeprom parameters */
112 #define AT24_DEVICE_MAGIC(_len, _flags) \
113 ((1 << AT24_SIZE_FLAGS | (_flags)) \
114 << AT24_SIZE_BYTELEN | ilog2(_len))
115
116 static const struct i2c_device_id at24_ids[] = {
117 /* needs 8 addresses as A0-A2 are ignored */
118 { "24c00", AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) },
119 /* old variants can't be handled with this generic entry! */
120 { "24c01", AT24_DEVICE_MAGIC(1024 / 8, 0) },
121 { "24cs01", AT24_DEVICE_MAGIC(16,
122 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
123 { "24c02", AT24_DEVICE_MAGIC(2048 / 8, 0) },
124 { "24cs02", AT24_DEVICE_MAGIC(16,
125 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
126 { "24mac402", AT24_DEVICE_MAGIC(48 / 8,
127 AT24_FLAG_MAC | AT24_FLAG_READONLY) },
128 { "24mac602", AT24_DEVICE_MAGIC(64 / 8,
129 AT24_FLAG_MAC | AT24_FLAG_READONLY) },
130 /* spd is a 24c02 in memory DIMMs */
131 { "spd", AT24_DEVICE_MAGIC(2048 / 8,
132 AT24_FLAG_READONLY | AT24_FLAG_IRUGO) },
133 { "24c04", AT24_DEVICE_MAGIC(4096 / 8, 0) },
134 { "24cs04", AT24_DEVICE_MAGIC(16,
135 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
136 /* 24rf08 quirk is handled at i2c-core */
137 { "24c08", AT24_DEVICE_MAGIC(8192 / 8, 0) },
138 { "24cs08", AT24_DEVICE_MAGIC(16,
139 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
140 { "24c16", AT24_DEVICE_MAGIC(16384 / 8, 0) },
141 { "24cs16", AT24_DEVICE_MAGIC(16,
142 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
143 { "24c32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) },
144 { "24cs32", AT24_DEVICE_MAGIC(16,
145 AT24_FLAG_ADDR16 |
146 AT24_FLAG_SERIAL |
147 AT24_FLAG_READONLY) },
148 { "24c64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) },
149 { "24cs64", AT24_DEVICE_MAGIC(16,
150 AT24_FLAG_ADDR16 |
151 AT24_FLAG_SERIAL |
152 AT24_FLAG_READONLY) },
153 { "24c128", AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) },
154 { "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) },
155 { "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) },
156 { "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) },
157 { "24c2048", AT24_DEVICE_MAGIC(2097152 / 8, AT24_FLAG_ADDR16) },
158 { "at24", 0 },
159 { /* END OF LIST */ }
160 };
161 MODULE_DEVICE_TABLE(i2c, at24_ids);
162
163 static const struct acpi_device_id at24_acpi_ids[] = {
164 { "INT3499", AT24_DEVICE_MAGIC(8192 / 8, 0) },
165 { }
166 };
167 MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
168
169 /*-------------------------------------------------------------------------*/
170
171 /*
172 * This routine supports chips which consume multiple I2C addresses. It
173 * computes the addressing information to be used for a given r/w request.
174 * Assumes that sanity checks for offset happened at sysfs-layer.
175 *
176 * Slave address and byte offset derive from the offset. Always
177 * set the byte address; on a multi-master board, another master
178 * may have changed the chip's "current" address pointer.
179 *
180 * REVISIT some multi-address chips don't rollover page reads to
181 * the next slave address, so we may need to truncate the count.
182 * Those chips might need another quirk flag.
183 *
184 * If the real hardware used four adjacent 24c02 chips and that
185 * were misconfigured as one 24c08, that would be a similar effect:
186 * one "eeprom" file not four, but larger reads would fail when
187 * they crossed certain pages.
188 */
at24_translate_offset(struct at24_data * at24,unsigned int * offset)189 static struct i2c_client *at24_translate_offset(struct at24_data *at24,
190 unsigned int *offset)
191 {
192 unsigned i;
193
194 if (at24->chip.flags & AT24_FLAG_ADDR16) {
195 i = *offset >> 16;
196 *offset &= 0xffff;
197 } else {
198 i = *offset >> 8;
199 *offset &= 0xff;
200 }
201
202 return at24->client[i];
203 }
204
at24_eeprom_read_smbus(struct at24_data * at24,char * buf,unsigned int offset,size_t count)205 static ssize_t at24_eeprom_read_smbus(struct at24_data *at24, char *buf,
206 unsigned int offset, size_t count)
207 {
208 unsigned long timeout, read_time;
209 struct i2c_client *client;
210 int status;
211
212 client = at24_translate_offset(at24, &offset);
213
214 if (count > io_limit)
215 count = io_limit;
216
217 /* Smaller eeproms can work given some SMBus extension calls */
218 if (count > I2C_SMBUS_BLOCK_MAX)
219 count = I2C_SMBUS_BLOCK_MAX;
220
221 timeout = jiffies + msecs_to_jiffies(write_timeout);
222 do {
223 /*
224 * The timestamp shall be taken before the actual operation
225 * to avoid a premature timeout in case of high CPU load.
226 */
227 read_time = jiffies;
228
229 status = i2c_smbus_read_i2c_block_data_or_emulated(client,
230 offset,
231 count, buf);
232
233 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
234 count, offset, status, jiffies);
235
236 if (status == count)
237 return count;
238
239 usleep_range(1000, 1500);
240 } while (time_before(read_time, timeout));
241
242 return -ETIMEDOUT;
243 }
244
at24_eeprom_read_i2c(struct at24_data * at24,char * buf,unsigned int offset,size_t count)245 static ssize_t at24_eeprom_read_i2c(struct at24_data *at24, char *buf,
246 unsigned int offset, size_t count)
247 {
248 unsigned long timeout, read_time;
249 struct i2c_client *client;
250 struct i2c_msg msg[2];
251 int status, i;
252 u8 msgbuf[2];
253
254 memset(msg, 0, sizeof(msg));
255 client = at24_translate_offset(at24, &offset);
256
257 if (count > io_limit)
258 count = io_limit;
259
260 /*
261 * When we have a better choice than SMBus calls, use a combined I2C
262 * message. Write address; then read up to io_limit data bytes. Note
263 * that read page rollover helps us here (unlike writes). msgbuf is
264 * u8 and will cast to our needs.
265 */
266 i = 0;
267 if (at24->chip.flags & AT24_FLAG_ADDR16)
268 msgbuf[i++] = offset >> 8;
269 msgbuf[i++] = offset;
270
271 msg[0].addr = client->addr;
272 msg[0].buf = msgbuf;
273 msg[0].len = i;
274
275 msg[1].addr = client->addr;
276 msg[1].flags = I2C_M_RD;
277 msg[1].buf = buf;
278 msg[1].len = count;
279
280 timeout = jiffies + msecs_to_jiffies(write_timeout);
281 do {
282 /*
283 * The timestamp shall be taken before the actual operation
284 * to avoid a premature timeout in case of high CPU load.
285 */
286 read_time = jiffies;
287
288 status = i2c_transfer(client->adapter, msg, 2);
289 if (status == 2)
290 status = count;
291
292 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
293 count, offset, status, jiffies);
294
295 if (status == count)
296 return count;
297
298 usleep_range(1000, 1500);
299 } while (time_before(read_time, timeout));
300
301 return -ETIMEDOUT;
302 }
303
at24_eeprom_read_serial(struct at24_data * at24,char * buf,unsigned int offset,size_t count)304 static ssize_t at24_eeprom_read_serial(struct at24_data *at24, char *buf,
305 unsigned int offset, size_t count)
306 {
307 unsigned long timeout, read_time;
308 struct i2c_client *client;
309 struct i2c_msg msg[2];
310 u8 addrbuf[2];
311 int status;
312
313 client = at24_translate_offset(at24, &offset);
314
315 memset(msg, 0, sizeof(msg));
316 msg[0].addr = client->addr;
317 msg[0].buf = addrbuf;
318
319 /*
320 * The address pointer of the device is shared between the regular
321 * EEPROM array and the serial number block. The dummy write (part of
322 * the sequential read protocol) ensures the address pointer is reset
323 * to the desired position.
324 */
325 if (at24->chip.flags & AT24_FLAG_ADDR16) {
326 /*
327 * For 16 bit address pointers, the word address must contain
328 * a '10' sequence in bits 11 and 10 regardless of the
329 * intended position of the address pointer.
330 */
331 addrbuf[0] = 0x08;
332 addrbuf[1] = offset;
333 msg[0].len = 2;
334 } else {
335 /*
336 * Otherwise the word address must begin with a '10' sequence,
337 * regardless of the intended address.
338 */
339 addrbuf[0] = 0x80 + offset;
340 msg[0].len = 1;
341 }
342
343 msg[1].addr = client->addr;
344 msg[1].flags = I2C_M_RD;
345 msg[1].buf = buf;
346 msg[1].len = count;
347
348 timeout = jiffies + msecs_to_jiffies(write_timeout);
349 do {
350 /*
351 * The timestamp shall be taken before the actual operation
352 * to avoid a premature timeout in case of high CPU load.
353 */
354 read_time = jiffies;
355
356 status = i2c_transfer(client->adapter, msg, 2);
357 if (status == 2)
358 return count;
359
360 usleep_range(1000, 1500);
361 } while (time_before(read_time, timeout));
362
363 return -ETIMEDOUT;
364 }
365
at24_eeprom_read_mac(struct at24_data * at24,char * buf,unsigned int offset,size_t count)366 static ssize_t at24_eeprom_read_mac(struct at24_data *at24, char *buf,
367 unsigned int offset, size_t count)
368 {
369 unsigned long timeout, read_time;
370 struct i2c_client *client;
371 struct i2c_msg msg[2];
372 u8 addrbuf[2];
373 int status;
374
375 client = at24_translate_offset(at24, &offset);
376
377 memset(msg, 0, sizeof(msg));
378 msg[0].addr = client->addr;
379 msg[0].buf = addrbuf;
380 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
381 addrbuf[0] = 0xa0 - at24->chip.byte_len + offset;
382 msg[0].len = 1;
383 msg[1].addr = client->addr;
384 msg[1].flags = I2C_M_RD;
385 msg[1].buf = buf;
386 msg[1].len = count;
387
388 timeout = jiffies + msecs_to_jiffies(write_timeout);
389 do {
390 /*
391 * The timestamp shall be taken before the actual operation
392 * to avoid a premature timeout in case of high CPU load.
393 */
394 read_time = jiffies;
395
396 status = i2c_transfer(client->adapter, msg, 2);
397 if (status == 2)
398 return count;
399
400 usleep_range(1000, 1500);
401 } while (time_before(read_time, timeout));
402
403 return -ETIMEDOUT;
404 }
405
406 /*
407 * Note that if the hardware write-protect pin is pulled high, the whole
408 * chip is normally write protected. But there are plenty of product
409 * variants here, including OTP fuses and partial chip protect.
410 *
411 * We only use page mode writes; the alternative is sloooow. These routines
412 * write at most one page.
413 */
414
at24_adjust_write_count(struct at24_data * at24,unsigned int offset,size_t count)415 static size_t at24_adjust_write_count(struct at24_data *at24,
416 unsigned int offset, size_t count)
417 {
418 unsigned next_page;
419
420 /* write_max is at most a page */
421 if (count > at24->write_max)
422 count = at24->write_max;
423
424 /* Never roll over backwards, to the start of this page */
425 next_page = roundup(offset + 1, at24->chip.page_size);
426 if (offset + count > next_page)
427 count = next_page - offset;
428
429 return count;
430 }
431
at24_eeprom_write_smbus_block(struct at24_data * at24,const char * buf,unsigned int offset,size_t count)432 static ssize_t at24_eeprom_write_smbus_block(struct at24_data *at24,
433 const char *buf,
434 unsigned int offset, size_t count)
435 {
436 unsigned long timeout, write_time;
437 struct i2c_client *client;
438 ssize_t status = 0;
439
440 client = at24_translate_offset(at24, &offset);
441 count = at24_adjust_write_count(at24, offset, count);
442
443 timeout = jiffies + msecs_to_jiffies(write_timeout);
444 do {
445 /*
446 * The timestamp shall be taken before the actual operation
447 * to avoid a premature timeout in case of high CPU load.
448 */
449 write_time = jiffies;
450
451 status = i2c_smbus_write_i2c_block_data(client,
452 offset, count, buf);
453 if (status == 0)
454 status = count;
455
456 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
457 count, offset, status, jiffies);
458
459 if (status == count)
460 return count;
461
462 usleep_range(1000, 1500);
463 } while (time_before(write_time, timeout));
464
465 return -ETIMEDOUT;
466 }
467
at24_eeprom_write_smbus_byte(struct at24_data * at24,const char * buf,unsigned int offset,size_t count)468 static ssize_t at24_eeprom_write_smbus_byte(struct at24_data *at24,
469 const char *buf,
470 unsigned int offset, size_t count)
471 {
472 unsigned long timeout, write_time;
473 struct i2c_client *client;
474 ssize_t status = 0;
475
476 client = at24_translate_offset(at24, &offset);
477
478 timeout = jiffies + msecs_to_jiffies(write_timeout);
479 do {
480 /*
481 * The timestamp shall be taken before the actual operation
482 * to avoid a premature timeout in case of high CPU load.
483 */
484 write_time = jiffies;
485
486 status = i2c_smbus_write_byte_data(client, offset, buf[0]);
487 if (status == 0)
488 status = count;
489
490 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
491 count, offset, status, jiffies);
492
493 if (status == count)
494 return count;
495
496 usleep_range(1000, 1500);
497 } while (time_before(write_time, timeout));
498
499 return -ETIMEDOUT;
500 }
501
at24_eeprom_write_i2c(struct at24_data * at24,const char * buf,unsigned int offset,size_t count)502 static ssize_t at24_eeprom_write_i2c(struct at24_data *at24, const char *buf,
503 unsigned int offset, size_t count)
504 {
505 unsigned long timeout, write_time;
506 struct i2c_client *client;
507 struct i2c_msg msg;
508 ssize_t status = 0;
509 int i = 0;
510
511 client = at24_translate_offset(at24, &offset);
512 count = at24_adjust_write_count(at24, offset, count);
513
514 msg.addr = client->addr;
515 msg.flags = 0;
516
517 /* msg.buf is u8 and casts will mask the values */
518 msg.buf = at24->writebuf;
519 if (at24->chip.flags & AT24_FLAG_ADDR16)
520 msg.buf[i++] = offset >> 8;
521
522 msg.buf[i++] = offset;
523 memcpy(&msg.buf[i], buf, count);
524 msg.len = i + count;
525
526 timeout = jiffies + msecs_to_jiffies(write_timeout);
527 do {
528 /*
529 * The timestamp shall be taken before the actual operation
530 * to avoid a premature timeout in case of high CPU load.
531 */
532 write_time = jiffies;
533
534 status = i2c_transfer(client->adapter, &msg, 1);
535 if (status == 1)
536 status = count;
537
538 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
539 count, offset, status, jiffies);
540
541 if (status == count)
542 return count;
543
544 usleep_range(1000, 1500);
545 } while (time_before(write_time, timeout));
546
547 return -ETIMEDOUT;
548 }
549
at24_read(void * priv,unsigned int off,void * val,size_t count)550 static int at24_read(void *priv, unsigned int off, void *val, size_t count)
551 {
552 struct at24_data *at24 = priv;
553 char *buf = val;
554
555 if (unlikely(!count))
556 return count;
557
558 if (off + count > at24->chip.byte_len)
559 return -EINVAL;
560
561 /*
562 * Read data from chip, protecting against concurrent updates
563 * from this host, but not from other I2C masters.
564 */
565 mutex_lock(&at24->lock);
566
567 while (count) {
568 int status;
569
570 status = at24->read_func(at24, buf, off, count);
571 if (status < 0) {
572 mutex_unlock(&at24->lock);
573 return status;
574 }
575 buf += status;
576 off += status;
577 count -= status;
578 }
579
580 mutex_unlock(&at24->lock);
581
582 return 0;
583 }
584
at24_write(void * priv,unsigned int off,void * val,size_t count)585 static int at24_write(void *priv, unsigned int off, void *val, size_t count)
586 {
587 struct at24_data *at24 = priv;
588 char *buf = val;
589
590 if (unlikely(!count))
591 return -EINVAL;
592
593 if (off + count > at24->chip.byte_len)
594 return -EINVAL;
595
596 /*
597 * Write data to chip, protecting against concurrent updates
598 * from this host, but not from other I2C masters.
599 */
600 mutex_lock(&at24->lock);
601
602 while (count) {
603 int status;
604
605 status = at24->write_func(at24, buf, off, count);
606 if (status < 0) {
607 mutex_unlock(&at24->lock);
608 return status;
609 }
610 buf += status;
611 off += status;
612 count -= status;
613 }
614
615 mutex_unlock(&at24->lock);
616
617 return 0;
618 }
619
at24_get_pdata(struct device * dev,struct at24_platform_data * chip)620 static void at24_get_pdata(struct device *dev, struct at24_platform_data *chip)
621 {
622 int err;
623 u32 val;
624
625 if (device_property_present(dev, "read-only"))
626 chip->flags |= AT24_FLAG_READONLY;
627
628 err = device_property_read_u32(dev, "address-width", &val);
629 if (!err) {
630 switch (val) {
631 case 8:
632 if (chip->flags & AT24_FLAG_ADDR16)
633 dev_warn(dev, "Override address width to be 8, while default is 16\n");
634 chip->flags &= ~AT24_FLAG_ADDR16;
635 break;
636 case 16:
637 chip->flags |= AT24_FLAG_ADDR16;
638 break;
639 default:
640 dev_warn(dev, "Bad \"address-width\" property: %u\n",
641 val);
642 }
643 }
644
645 err = device_property_read_u32(dev, "pagesize", &val);
646 if (!err) {
647 chip->page_size = val;
648 } else {
649 /*
650 * This is slow, but we can't know all eeproms, so we better
651 * play safe. Specifying custom eeprom-types via platform_data
652 * is recommended anyhow.
653 */
654 chip->page_size = 1;
655 }
656 }
657
at24_probe(struct i2c_client * client,const struct i2c_device_id * id)658 static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
659 {
660 struct at24_platform_data chip;
661 kernel_ulong_t magic = 0;
662 bool writable;
663 int use_smbus = 0;
664 int use_smbus_write = 0;
665 struct at24_data *at24;
666 int err;
667 unsigned i, num_addresses;
668 u8 test_byte;
669
670 if (client->dev.platform_data) {
671 chip = *(struct at24_platform_data *)client->dev.platform_data;
672 } else {
673 if (id) {
674 magic = id->driver_data;
675 } else {
676 const struct acpi_device_id *aid;
677
678 aid = acpi_match_device(at24_acpi_ids, &client->dev);
679 if (aid)
680 magic = aid->driver_data;
681 }
682 if (!magic)
683 return -ENODEV;
684
685 chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN));
686 magic >>= AT24_SIZE_BYTELEN;
687 chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS);
688
689 at24_get_pdata(&client->dev, &chip);
690
691 chip.setup = NULL;
692 chip.context = NULL;
693 }
694
695 if (!is_power_of_2(chip.byte_len))
696 dev_warn(&client->dev,
697 "byte_len looks suspicious (no power of 2)!\n");
698 if (!chip.page_size) {
699 dev_err(&client->dev, "page_size must not be 0!\n");
700 return -EINVAL;
701 }
702 if (!is_power_of_2(chip.page_size))
703 dev_warn(&client->dev,
704 "page_size looks suspicious (no power of 2)!\n");
705
706 /*
707 * REVISIT: the size of the EUI-48 byte array is 6 in at24mac402, while
708 * the call to ilog2() in AT24_DEVICE_MAGIC() rounds it down to 4.
709 *
710 * Eventually we'll get rid of the magic values altoghether in favor of
711 * real structs, but for now just manually set the right size.
712 */
713 if (chip.flags & AT24_FLAG_MAC && chip.byte_len == 4)
714 chip.byte_len = 6;
715
716 /* Use I2C operations unless we're stuck with SMBus extensions. */
717 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
718 if (chip.flags & AT24_FLAG_ADDR16)
719 return -EPFNOSUPPORT;
720
721 if (i2c_check_functionality(client->adapter,
722 I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
723 use_smbus = I2C_SMBUS_I2C_BLOCK_DATA;
724 } else if (i2c_check_functionality(client->adapter,
725 I2C_FUNC_SMBUS_READ_WORD_DATA)) {
726 use_smbus = I2C_SMBUS_WORD_DATA;
727 } else if (i2c_check_functionality(client->adapter,
728 I2C_FUNC_SMBUS_READ_BYTE_DATA)) {
729 use_smbus = I2C_SMBUS_BYTE_DATA;
730 } else {
731 return -EPFNOSUPPORT;
732 }
733
734 if (i2c_check_functionality(client->adapter,
735 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) {
736 use_smbus_write = I2C_SMBUS_I2C_BLOCK_DATA;
737 } else if (i2c_check_functionality(client->adapter,
738 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
739 use_smbus_write = I2C_SMBUS_BYTE_DATA;
740 chip.page_size = 1;
741 }
742 }
743
744 if (chip.flags & AT24_FLAG_TAKE8ADDR)
745 num_addresses = 8;
746 else
747 num_addresses = DIV_ROUND_UP(chip.byte_len,
748 (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256);
749
750 at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) +
751 num_addresses * sizeof(struct i2c_client *), GFP_KERNEL);
752 if (!at24)
753 return -ENOMEM;
754
755 mutex_init(&at24->lock);
756 at24->use_smbus = use_smbus;
757 at24->use_smbus_write = use_smbus_write;
758 at24->chip = chip;
759 at24->num_addresses = num_addresses;
760
761 if ((chip.flags & AT24_FLAG_SERIAL) && (chip.flags & AT24_FLAG_MAC)) {
762 dev_err(&client->dev,
763 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
764 return -EINVAL;
765 }
766
767 if (chip.flags & AT24_FLAG_SERIAL) {
768 at24->read_func = at24_eeprom_read_serial;
769 } else if (chip.flags & AT24_FLAG_MAC) {
770 at24->read_func = at24_eeprom_read_mac;
771 } else {
772 at24->read_func = at24->use_smbus ? at24_eeprom_read_smbus
773 : at24_eeprom_read_i2c;
774 }
775
776 if (at24->use_smbus) {
777 if (at24->use_smbus_write == I2C_SMBUS_I2C_BLOCK_DATA)
778 at24->write_func = at24_eeprom_write_smbus_block;
779 else
780 at24->write_func = at24_eeprom_write_smbus_byte;
781 } else {
782 at24->write_func = at24_eeprom_write_i2c;
783 }
784
785 writable = !(chip.flags & AT24_FLAG_READONLY);
786 if (writable) {
787 if (!use_smbus || use_smbus_write) {
788
789 unsigned write_max = chip.page_size;
790
791 if (write_max > io_limit)
792 write_max = io_limit;
793 if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX)
794 write_max = I2C_SMBUS_BLOCK_MAX;
795 at24->write_max = write_max;
796
797 /* buffer (data + address at the beginning) */
798 at24->writebuf = devm_kzalloc(&client->dev,
799 write_max + 2, GFP_KERNEL);
800 if (!at24->writebuf)
801 return -ENOMEM;
802 } else {
803 dev_warn(&client->dev,
804 "cannot write due to controller restrictions.");
805 }
806 }
807
808 at24->client[0] = client;
809
810 /* use dummy devices for multiple-address chips */
811 for (i = 1; i < num_addresses; i++) {
812 at24->client[i] = i2c_new_dummy(client->adapter,
813 client->addr + i);
814 if (!at24->client[i]) {
815 dev_err(&client->dev, "address 0x%02x unavailable\n",
816 client->addr + i);
817 err = -EADDRINUSE;
818 goto err_clients;
819 }
820 }
821
822 i2c_set_clientdata(client, at24);
823
824 /*
825 * Perform a one-byte test read to verify that the
826 * chip is functional.
827 */
828 err = at24_read(at24, 0, &test_byte, 1);
829 if (err) {
830 err = -ENODEV;
831 goto err_clients;
832 }
833
834 at24->nvmem_config.name = dev_name(&client->dev);
835 at24->nvmem_config.dev = &client->dev;
836 at24->nvmem_config.read_only = !writable;
837 at24->nvmem_config.root_only = !(chip.flags & AT24_FLAG_IRUGO);
838 at24->nvmem_config.owner = THIS_MODULE;
839 at24->nvmem_config.compat = true;
840 at24->nvmem_config.base_dev = &client->dev;
841 at24->nvmem_config.reg_read = at24_read;
842 at24->nvmem_config.reg_write = at24_write;
843 at24->nvmem_config.priv = at24;
844 at24->nvmem_config.stride = 1;
845 at24->nvmem_config.word_size = 1;
846 at24->nvmem_config.size = chip.byte_len;
847
848 at24->nvmem = nvmem_register(&at24->nvmem_config);
849
850 if (IS_ERR(at24->nvmem)) {
851 err = PTR_ERR(at24->nvmem);
852 goto err_clients;
853 }
854
855 dev_info(&client->dev, "%u byte %s EEPROM, %s, %u bytes/write\n",
856 chip.byte_len, client->name,
857 writable ? "writable" : "read-only", at24->write_max);
858 if (use_smbus == I2C_SMBUS_WORD_DATA ||
859 use_smbus == I2C_SMBUS_BYTE_DATA) {
860 dev_notice(&client->dev, "Falling back to %s reads, "
861 "performance will suffer\n", use_smbus ==
862 I2C_SMBUS_WORD_DATA ? "word" : "byte");
863 }
864
865 /* export data to kernel code */
866 if (chip.setup)
867 chip.setup(at24->nvmem, chip.context);
868
869 return 0;
870
871 err_clients:
872 for (i = 1; i < num_addresses; i++)
873 if (at24->client[i])
874 i2c_unregister_device(at24->client[i]);
875
876 return err;
877 }
878
at24_remove(struct i2c_client * client)879 static int at24_remove(struct i2c_client *client)
880 {
881 struct at24_data *at24;
882 int i;
883
884 at24 = i2c_get_clientdata(client);
885
886 nvmem_unregister(at24->nvmem);
887
888 for (i = 1; i < at24->num_addresses; i++)
889 i2c_unregister_device(at24->client[i]);
890
891 return 0;
892 }
893
894 /*-------------------------------------------------------------------------*/
895
896 static struct i2c_driver at24_driver = {
897 .driver = {
898 .name = "at24",
899 .acpi_match_table = ACPI_PTR(at24_acpi_ids),
900 },
901 .probe = at24_probe,
902 .remove = at24_remove,
903 .id_table = at24_ids,
904 };
905
at24_init(void)906 static int __init at24_init(void)
907 {
908 if (!io_limit) {
909 pr_err("at24: io_limit must not be 0!\n");
910 return -EINVAL;
911 }
912
913 io_limit = rounddown_pow_of_two(io_limit);
914 return i2c_add_driver(&at24_driver);
915 }
916 module_init(at24_init);
917
at24_exit(void)918 static void __exit at24_exit(void)
919 {
920 i2c_del_driver(&at24_driver);
921 }
922 module_exit(at24_exit);
923
924 MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
925 MODULE_AUTHOR("David Brownell and Wolfram Sang");
926 MODULE_LICENSE("GPL");
927