1 /*
2 * net/dsa/mv88e6060.c - Driver for Marvell 88e6060 switch chips
3 * Copyright (c) 2008-2009 Marvell Semiconductor
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
11 #include <linux/delay.h>
12 #include <linux/jiffies.h>
13 #include <linux/list.h>
14 #include <linux/module.h>
15 #include <linux/netdevice.h>
16 #include <linux/phy.h>
17 #include <net/dsa.h>
18 #include "mv88e6060.h"
19
reg_read(struct dsa_switch * ds,int addr,int reg)20 static int reg_read(struct dsa_switch *ds, int addr, int reg)
21 {
22 struct mv88e6060_priv *priv = ds->priv;
23
24 return mdiobus_read_nested(priv->bus, priv->sw_addr + addr, reg);
25 }
26
27 #define REG_READ(addr, reg) \
28 ({ \
29 int __ret; \
30 \
31 __ret = reg_read(ds, addr, reg); \
32 if (__ret < 0) \
33 return __ret; \
34 __ret; \
35 })
36
37
reg_write(struct dsa_switch * ds,int addr,int reg,u16 val)38 static int reg_write(struct dsa_switch *ds, int addr, int reg, u16 val)
39 {
40 struct mv88e6060_priv *priv = ds->priv;
41
42 return mdiobus_write_nested(priv->bus, priv->sw_addr + addr, reg, val);
43 }
44
45 #define REG_WRITE(addr, reg, val) \
46 ({ \
47 int __ret; \
48 \
49 __ret = reg_write(ds, addr, reg, val); \
50 if (__ret < 0) \
51 return __ret; \
52 })
53
mv88e6060_get_name(struct mii_bus * bus,int sw_addr)54 static const char *mv88e6060_get_name(struct mii_bus *bus, int sw_addr)
55 {
56 int ret;
57
58 ret = mdiobus_read(bus, sw_addr + REG_PORT(0), PORT_SWITCH_ID);
59 if (ret >= 0) {
60 if (ret == PORT_SWITCH_ID_6060)
61 return "Marvell 88E6060 (A0)";
62 if (ret == PORT_SWITCH_ID_6060_R1 ||
63 ret == PORT_SWITCH_ID_6060_R2)
64 return "Marvell 88E6060 (B0)";
65 if ((ret & PORT_SWITCH_ID_6060_MASK) == PORT_SWITCH_ID_6060)
66 return "Marvell 88E6060";
67 }
68
69 return NULL;
70 }
71
mv88e6060_get_tag_protocol(struct dsa_switch * ds)72 static enum dsa_tag_protocol mv88e6060_get_tag_protocol(struct dsa_switch *ds)
73 {
74 return DSA_TAG_PROTO_TRAILER;
75 }
76
mv88e6060_drv_probe(struct device * dsa_dev,struct device * host_dev,int sw_addr,void ** _priv)77 static const char *mv88e6060_drv_probe(struct device *dsa_dev,
78 struct device *host_dev, int sw_addr,
79 void **_priv)
80 {
81 struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);
82 struct mv88e6060_priv *priv;
83 const char *name;
84
85 name = mv88e6060_get_name(bus, sw_addr);
86 if (name) {
87 priv = devm_kzalloc(dsa_dev, sizeof(*priv), GFP_KERNEL);
88 if (!priv)
89 return NULL;
90 *_priv = priv;
91 priv->bus = bus;
92 priv->sw_addr = sw_addr;
93 }
94
95 return name;
96 }
97
mv88e6060_switch_reset(struct dsa_switch * ds)98 static int mv88e6060_switch_reset(struct dsa_switch *ds)
99 {
100 int i;
101 int ret;
102 unsigned long timeout;
103
104 /* Set all ports to the disabled state. */
105 for (i = 0; i < MV88E6060_PORTS; i++) {
106 ret = REG_READ(REG_PORT(i), PORT_CONTROL);
107 REG_WRITE(REG_PORT(i), PORT_CONTROL,
108 ret & ~PORT_CONTROL_STATE_MASK);
109 }
110
111 /* Wait for transmit queues to drain. */
112 usleep_range(2000, 4000);
113
114 /* Reset the switch. */
115 REG_WRITE(REG_GLOBAL, GLOBAL_ATU_CONTROL,
116 GLOBAL_ATU_CONTROL_SWRESET |
117 GLOBAL_ATU_CONTROL_LEARNDIS);
118
119 /* Wait up to one second for reset to complete. */
120 timeout = jiffies + 1 * HZ;
121 while (time_before(jiffies, timeout)) {
122 ret = REG_READ(REG_GLOBAL, GLOBAL_STATUS);
123 if (ret & GLOBAL_STATUS_INIT_READY)
124 break;
125
126 usleep_range(1000, 2000);
127 }
128 if (time_after(jiffies, timeout))
129 return -ETIMEDOUT;
130
131 return 0;
132 }
133
mv88e6060_setup_global(struct dsa_switch * ds)134 static int mv88e6060_setup_global(struct dsa_switch *ds)
135 {
136 /* Disable discarding of frames with excessive collisions,
137 * set the maximum frame size to 1536 bytes, and mask all
138 * interrupt sources.
139 */
140 REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL, GLOBAL_CONTROL_MAX_FRAME_1536);
141
142 /* Disable automatic address learning.
143 */
144 REG_WRITE(REG_GLOBAL, GLOBAL_ATU_CONTROL,
145 GLOBAL_ATU_CONTROL_LEARNDIS);
146
147 return 0;
148 }
149
mv88e6060_setup_port(struct dsa_switch * ds,int p)150 static int mv88e6060_setup_port(struct dsa_switch *ds, int p)
151 {
152 int addr = REG_PORT(p);
153
154 /* Do not force flow control, disable Ingress and Egress
155 * Header tagging, disable VLAN tunneling, and set the port
156 * state to Forwarding. Additionally, if this is the CPU
157 * port, enable Ingress and Egress Trailer tagging mode.
158 */
159 REG_WRITE(addr, PORT_CONTROL,
160 dsa_is_cpu_port(ds, p) ?
161 PORT_CONTROL_TRAILER |
162 PORT_CONTROL_INGRESS_MODE |
163 PORT_CONTROL_STATE_FORWARDING :
164 PORT_CONTROL_STATE_FORWARDING);
165
166 /* Port based VLAN map: give each port its own address
167 * database, allow the CPU port to talk to each of the 'real'
168 * ports, and allow each of the 'real' ports to only talk to
169 * the CPU port.
170 */
171 REG_WRITE(addr, PORT_VLAN_MAP,
172 ((p & 0xf) << PORT_VLAN_MAP_DBNUM_SHIFT) |
173 (dsa_is_cpu_port(ds, p) ?
174 ds->enabled_port_mask :
175 BIT(ds->dst->cpu_dp->index)));
176
177 /* Port Association Vector: when learning source addresses
178 * of packets, add the address to the address database using
179 * a port bitmap that has only the bit for this port set and
180 * the other bits clear.
181 */
182 REG_WRITE(addr, PORT_ASSOC_VECTOR, BIT(p));
183
184 return 0;
185 }
186
mv88e6060_setup(struct dsa_switch * ds)187 static int mv88e6060_setup(struct dsa_switch *ds)
188 {
189 int ret;
190 int i;
191
192 ret = mv88e6060_switch_reset(ds);
193 if (ret < 0)
194 return ret;
195
196 /* @@@ initialise atu */
197
198 ret = mv88e6060_setup_global(ds);
199 if (ret < 0)
200 return ret;
201
202 for (i = 0; i < MV88E6060_PORTS; i++) {
203 ret = mv88e6060_setup_port(ds, i);
204 if (ret < 0)
205 return ret;
206 }
207
208 return 0;
209 }
210
mv88e6060_set_addr(struct dsa_switch * ds,u8 * addr)211 static int mv88e6060_set_addr(struct dsa_switch *ds, u8 *addr)
212 {
213 u16 val = addr[0] << 8 | addr[1];
214
215 /* The multicast bit is always transmitted as a zero, so the switch uses
216 * bit 8 for "DiffAddr", where 0 means all ports transmit the same SA.
217 */
218 val &= 0xfeff;
219
220 REG_WRITE(REG_GLOBAL, GLOBAL_MAC_01, val);
221 REG_WRITE(REG_GLOBAL, GLOBAL_MAC_23, (addr[2] << 8) | addr[3]);
222 REG_WRITE(REG_GLOBAL, GLOBAL_MAC_45, (addr[4] << 8) | addr[5]);
223
224 return 0;
225 }
226
mv88e6060_port_to_phy_addr(int port)227 static int mv88e6060_port_to_phy_addr(int port)
228 {
229 if (port >= 0 && port < MV88E6060_PORTS)
230 return port;
231 return -1;
232 }
233
mv88e6060_phy_read(struct dsa_switch * ds,int port,int regnum)234 static int mv88e6060_phy_read(struct dsa_switch *ds, int port, int regnum)
235 {
236 int addr;
237
238 addr = mv88e6060_port_to_phy_addr(port);
239 if (addr == -1)
240 return 0xffff;
241
242 return reg_read(ds, addr, regnum);
243 }
244
245 static int
mv88e6060_phy_write(struct dsa_switch * ds,int port,int regnum,u16 val)246 mv88e6060_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)
247 {
248 int addr;
249
250 addr = mv88e6060_port_to_phy_addr(port);
251 if (addr == -1)
252 return 0xffff;
253
254 return reg_write(ds, addr, regnum, val);
255 }
256
257 static const struct dsa_switch_ops mv88e6060_switch_ops = {
258 .get_tag_protocol = mv88e6060_get_tag_protocol,
259 .probe = mv88e6060_drv_probe,
260 .setup = mv88e6060_setup,
261 .set_addr = mv88e6060_set_addr,
262 .phy_read = mv88e6060_phy_read,
263 .phy_write = mv88e6060_phy_write,
264 };
265
266 static struct dsa_switch_driver mv88e6060_switch_drv = {
267 .ops = &mv88e6060_switch_ops,
268 };
269
mv88e6060_init(void)270 static int __init mv88e6060_init(void)
271 {
272 register_switch_driver(&mv88e6060_switch_drv);
273 return 0;
274 }
275 module_init(mv88e6060_init);
276
mv88e6060_cleanup(void)277 static void __exit mv88e6060_cleanup(void)
278 {
279 unregister_switch_driver(&mv88e6060_switch_drv);
280 }
281 module_exit(mv88e6060_cleanup);
282
283 MODULE_AUTHOR("Lennert Buytenhek <buytenh@wantstofly.org>");
284 MODULE_DESCRIPTION("Driver for Marvell 88E6060 ethernet switch chip");
285 MODULE_LICENSE("GPL");
286 MODULE_ALIAS("platform:mv88e6060");
287