1 /*
2 * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34 #include <linux/mlx5/device.h>
35
36 #include "accel/ipsec.h"
37 #include "mlx5_core.h"
38 #include "fpga/ipsec.h"
39
mlx5_accel_ipsec_sa_cmd_exec(struct mlx5_core_dev * mdev,struct mlx5_accel_ipsec_sa * cmd)40 void *mlx5_accel_ipsec_sa_cmd_exec(struct mlx5_core_dev *mdev,
41 struct mlx5_accel_ipsec_sa *cmd)
42 {
43 if (!MLX5_IPSEC_DEV(mdev))
44 return ERR_PTR(-EOPNOTSUPP);
45
46 return mlx5_fpga_ipsec_sa_cmd_exec(mdev, cmd);
47 }
48
mlx5_accel_ipsec_sa_cmd_wait(void * ctx)49 int mlx5_accel_ipsec_sa_cmd_wait(void *ctx)
50 {
51 return mlx5_fpga_ipsec_sa_cmd_wait(ctx);
52 }
53
mlx5_accel_ipsec_device_caps(struct mlx5_core_dev * mdev)54 u32 mlx5_accel_ipsec_device_caps(struct mlx5_core_dev *mdev)
55 {
56 return mlx5_fpga_ipsec_device_caps(mdev);
57 }
58
mlx5_accel_ipsec_counters_count(struct mlx5_core_dev * mdev)59 unsigned int mlx5_accel_ipsec_counters_count(struct mlx5_core_dev *mdev)
60 {
61 return mlx5_fpga_ipsec_counters_count(mdev);
62 }
63
mlx5_accel_ipsec_counters_read(struct mlx5_core_dev * mdev,u64 * counters,unsigned int count)64 int mlx5_accel_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
65 unsigned int count)
66 {
67 return mlx5_fpga_ipsec_counters_read(mdev, counters, count);
68 }
69
mlx5_accel_ipsec_init(struct mlx5_core_dev * mdev)70 int mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev)
71 {
72 return mlx5_fpga_ipsec_init(mdev);
73 }
74
mlx5_accel_ipsec_cleanup(struct mlx5_core_dev * mdev)75 void mlx5_accel_ipsec_cleanup(struct mlx5_core_dev *mdev)
76 {
77 mlx5_fpga_ipsec_cleanup(mdev);
78 }
79