1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /******************************************************** 3 * Header file for eata_dma.c and eata_pio.c * 4 * Linux EATA SCSI drivers * 5 * (c) 1993-96 Michael Neuffer * 6 * mike@i-Connect.Net * 7 * neuffer@mail.uni-mainz.de * 8 ********************************************************* 9 * last change: 96/08/14 * 10 ********************************************************/ 11 12 13 #ifndef _EATA_GENERIC_H 14 #define _EATA_GENERIC_H 15 16 17 18 /********************************************* 19 * Misc. definitions * 20 *********************************************/ 21 22 #define R_LIMIT 0x20000 23 24 #define MAXISA 4 25 #define MAXEISA 16 26 #define MAXPCI 16 27 #define MAXIRQ 16 28 #define MAXTARGET 16 29 #define MAXCHANNEL 3 30 31 #define IS_ISA 'I' 32 #define IS_EISA 'E' 33 #define IS_PCI 'P' 34 35 #define BROKEN_INQUIRY 1 36 37 #define BUSMASTER 0xff 38 #define PIO 0xfe 39 40 #define EATA_SIGNATURE 0x45415441 /* BIG ENDIAN coded "EATA" sig. */ 41 42 #define DPT_ID1 0x12 43 #define DPT_ID2 0x14 44 45 #define ATT_ID1 0x06 46 #define ATT_ID2 0x94 47 #define ATT_ID3 0x0 48 49 #define NEC_ID1 0x38 50 #define NEC_ID2 0xa3 51 #define NEC_ID3 0x82 52 53 54 #define EATA_CP_SIZE 44 55 56 #define MAX_PCI_DEVICES 32 /* Maximum # Of Devices Per Bus */ 57 #define MAX_METHOD_2 16 /* Max Devices For Method 2 */ 58 #define MAX_PCI_BUS 16 /* Maximum # Of Busses Allowed */ 59 60 #define SG_SIZE 64 61 #define SG_SIZE_BIG 252 /* max. 8096 elements, 64k */ 62 63 #define UPPER_DEVICE_QUEUE_LIMIT 64 /* The limit we have to set for the 64 * device queue to keep the broken 65 * midlevel SCSI code from producing 66 * bogus timeouts 67 */ 68 69 #define TYPE_DISK_QUEUE 16 70 #define TYPE_TAPE_QUEUE 4 71 #define TYPE_ROM_QUEUE 4 72 #define TYPE_OTHER_QUEUE 2 73 74 #define FREE 0 75 #define OK 0 76 #define NO_TIMEOUT 0 77 #define USED 1 78 #define TIMEOUT 2 79 #define RESET 4 80 #define LOCKED 8 81 #define ABORTED 16 82 83 #define READ 0 84 #define WRITE 1 85 #define OTHER 2 86 87 #define HD(cmd) ((hostdata *)&(cmd->device->host->hostdata)) 88 #define CD(cmd) ((struct eata_ccb *)(cmd->host_scribble)) 89 #define SD(host) ((hostdata *)&(host->hostdata)) 90 91 /*********************************************** 92 * EATA Command & Register definitions * 93 ***********************************************/ 94 #define PCI_REG_DPTconfig 0x40 95 #define PCI_REG_PumpModeAddress 0x44 96 #define PCI_REG_PumpModeData 0x48 97 #define PCI_REG_ConfigParam1 0x50 98 #define PCI_REG_ConfigParam2 0x54 99 100 101 #define EATA_CMD_PIO_SETUPTEST 0xc6 102 #define EATA_CMD_PIO_READ_CONFIG 0xf0 103 #define EATA_CMD_PIO_SET_CONFIG 0xf1 104 #define EATA_CMD_PIO_SEND_CP 0xf2 105 #define EATA_CMD_PIO_RECEIVE_SP 0xf3 106 #define EATA_CMD_PIO_TRUNC 0xf4 107 108 #define EATA_CMD_RESET 0xf9 109 #define EATA_CMD_IMMEDIATE 0xfa 110 111 #define EATA_CMD_DMA_READ_CONFIG 0xfd 112 #define EATA_CMD_DMA_SET_CONFIG 0xfe 113 #define EATA_CMD_DMA_SEND_CP 0xff 114 115 #define ECS_EMULATE_SENSE 0xd4 116 117 #define EATA_GENERIC_ABORT 0x00 118 #define EATA_SPECIFIC_RESET 0x01 119 #define EATA_BUS_RESET 0x02 120 #define EATA_SPECIFIC_ABORT 0x03 121 #define EATA_QUIET_INTR 0x04 122 #define EATA_COLD_BOOT_HBA 0x06 /* Only as a last resort */ 123 #define EATA_FORCE_IO 0x07 124 125 #define HA_CTRLREG 0x206 /* control register for HBA */ 126 #define HA_CTRL_DISINT 0x02 /* CTRLREG: disable interrupts */ 127 #define HA_CTRL_RESCPU 0x04 /* CTRLREG: reset processor */ 128 #define HA_CTRL_8HEADS 0x08 /* CTRLREG: set for drives with* 129 * >=8 heads (WD1003 rudimentary :-) */ 130 131 #define HA_WCOMMAND 0x07 /* command register offset */ 132 #define HA_WIFC 0x06 /* immediate command offset */ 133 #define HA_WCODE 0x05 134 #define HA_WCODE2 0x04 135 #define HA_WDMAADDR 0x02 /* DMA address LSB offset */ 136 #define HA_RAUXSTAT 0x08 /* aux status register offset*/ 137 #define HA_RSTATUS 0x07 /* status register offset */ 138 #define HA_RDATA 0x00 /* data register (16bit) */ 139 #define HA_WDATA 0x00 /* data register (16bit) */ 140 141 #define HA_ABUSY 0x01 /* aux busy bit */ 142 #define HA_AIRQ 0x02 /* aux IRQ pending bit */ 143 #define HA_SERROR 0x01 /* pr. command ended in error*/ 144 #define HA_SMORE 0x02 /* more data soon to come */ 145 #define HA_SCORR 0x04 /* data corrected */ 146 #define HA_SDRQ 0x08 /* data request active */ 147 #define HA_SSC 0x10 /* seek complete */ 148 #define HA_SFAULT 0x20 /* write fault */ 149 #define HA_SREADY 0x40 /* drive ready */ 150 #define HA_SBUSY 0x80 /* drive busy */ 151 #define HA_SDRDY HA_SSC+HA_SREADY+HA_SDRQ 152 153 /********************************************** 154 * Message definitions * 155 **********************************************/ 156 157 #define HA_NO_ERROR 0x00 /* No Error */ 158 #define HA_ERR_SEL_TO 0x01 /* Selection Timeout */ 159 #define HA_ERR_CMD_TO 0x02 /* Command Timeout */ 160 #define HA_BUS_RESET 0x03 /* SCSI Bus Reset Received */ 161 #define HA_INIT_POWERUP 0x04 /* Initial Controller Power-up */ 162 #define HA_UNX_BUSPHASE 0x05 /* Unexpected Bus Phase */ 163 #define HA_UNX_BUS_FREE 0x06 /* Unexpected Bus Free */ 164 #define HA_BUS_PARITY 0x07 /* Bus Parity Error */ 165 #define HA_SCSI_HUNG 0x08 /* SCSI Hung */ 166 #define HA_UNX_MSGRJCT 0x09 /* Unexpected Message Rejected */ 167 #define HA_RESET_STUCK 0x0a /* SCSI Bus Reset Stuck */ 168 #define HA_RSENSE_FAIL 0x0b /* Auto Request-Sense Failed */ 169 #define HA_PARITY_ERR 0x0c /* Controller Ram Parity Error */ 170 #define HA_CP_ABORT_NA 0x0d /* Abort Message sent to non-active cmd */ 171 #define HA_CP_ABORTED 0x0e /* Abort Message sent to active cmd */ 172 #define HA_CP_RESET_NA 0x0f /* Reset Message sent to non-active cmd */ 173 #define HA_CP_RESET 0x10 /* Reset Message sent to active cmd */ 174 #define HA_ECC_ERR 0x11 /* Controller Ram ECC Error */ 175 #define HA_PCI_PARITY 0x12 /* PCI Parity Error */ 176 #define HA_PCI_MABORT 0x13 /* PCI Master Abort */ 177 #define HA_PCI_TABORT 0x14 /* PCI Target Abort */ 178 #define HA_PCI_STABORT 0x15 /* PCI Signaled Target Abort */ 179 180 /********************************************** 181 * Other definitions * 182 **********************************************/ 183 184 struct reg_bit { /* reading this one will clear the interrupt */ 185 __u8 error:1; /* previous command ended in an error */ 186 __u8 more:1; /* more DATA coming soon, poll BSY & DRQ (PIO) */ 187 __u8 corr:1; /* data read was successfully corrected with ECC*/ 188 __u8 drq:1; /* data request active */ 189 __u8 sc:1; /* seek complete */ 190 __u8 fault:1; /* write fault */ 191 __u8 ready:1; /* drive ready */ 192 __u8 busy:1; /* controller busy */ 193 }; 194 195 struct reg_abit { /* reading this won't clear the interrupt */ 196 __u8 abusy:1; /* auxiliary busy */ 197 __u8 irq:1; /* set when drive interrupt is asserted */ 198 __u8 dummy:6; 199 }; 200 201 struct eata_register { /* EATA register set */ 202 __u8 data_reg[2]; /* R, couldn't figure this one out */ 203 __u8 cp_addr[4]; /* W, CP address register */ 204 union { 205 __u8 command; /* W, command code: [read|set] conf, send CP*/ 206 struct reg_bit status; /* R, see register_bit1 */ 207 __u8 statusbyte; 208 } ovr; 209 struct reg_abit aux_stat; /* R, see register_bit2 */ 210 }; 211 212 struct get_conf { /* Read Configuration Array */ 213 __u32 len; /* Should return 0x22, 0x24, etc */ 214 __u32 signature; /* Signature MUST be "EATA" */ 215 __u8 version2:4, 216 version:4; /* EATA Version level */ 217 __u8 OCS_enabled:1, /* Overlap Command Support enabled */ 218 TAR_support:1, /* SCSI Target Mode supported */ 219 TRNXFR:1, /* Truncate Transfer Cmd not necessary * 220 * Only used in PIO Mode */ 221 MORE_support:1, /* MORE supported (only PIO Mode) */ 222 DMA_support:1, /* DMA supported Driver uses only * 223 * this mode */ 224 DMA_valid:1, /* DRQ value in Byte 30 is valid */ 225 ATA:1, /* ATA device connected (not supported) */ 226 HAA_valid:1; /* Hostadapter Address is valid */ 227 228 __u16 cppadlen; /* Number of pad bytes send after CD data * 229 * set to zero for DMA commands */ 230 __u8 scsi_id[4]; /* SCSI ID of controller 2-0 Byte 0 res. * 231 * if not, zero is returned */ 232 __u32 cplen; /* CP length: number of valid cp bytes */ 233 __u32 splen; /* Number of bytes returned after * 234 * Receive SP command */ 235 __u16 queuesiz; /* max number of queueable CPs */ 236 __u16 dummy; 237 __u16 SGsiz; /* max number of SG table entries */ 238 __u8 IRQ:4, /* IRQ used this HA */ 239 IRQ_TR:1, /* IRQ Trigger: 0=edge, 1=level */ 240 SECOND:1, /* This is a secondary controller */ 241 DMA_channel:2; /* DRQ index, DRQ is 2comp of DRQX */ 242 __u8 sync; /* device at ID 7 tru 0 is running in * 243 * synchronous mode, this will disappear */ 244 __u8 DSBLE:1, /* ISA i/o addressing is disabled */ 245 FORCADR:1, /* i/o address has been forced */ 246 SG_64K:1, 247 SG_UAE:1, 248 :4; 249 __u8 MAX_ID:5, /* Max number of SCSI target IDs */ 250 MAX_CHAN:3; /* Number of SCSI busses on HBA */ 251 __u8 MAX_LUN; /* Max number of LUNs */ 252 __u8 :3, 253 AUTOTRM:1, 254 M1_inst:1, 255 ID_qest:1, /* Raidnum ID is questionable */ 256 is_PCI:1, /* HBA is PCI */ 257 is_EISA:1; /* HBA is EISA */ 258 __u8 RAIDNUM; /* unique HBA identifier */ 259 __u8 unused[474]; 260 }; 261 262 struct eata_sg_list 263 { 264 __u32 data; 265 __u32 len; 266 }; 267 268 struct eata_ccb { /* Send Command Packet structure */ 269 270 __u8 SCSI_Reset:1, /* Cause a SCSI Bus reset on the cmd */ 271 HBA_Init:1, /* Cause Controller to reinitialize */ 272 Auto_Req_Sen:1, /* Do Auto Request Sense on errors */ 273 scatter:1, /* Data Ptr points to a SG Packet */ 274 Resrvd:1, /* RFU */ 275 Interpret:1, /* Interpret the SCSI cdb of own use */ 276 DataOut:1, /* Data Out phase with command */ 277 DataIn:1; /* Data In phase with command */ 278 __u8 reqlen; /* Request Sense Length * 279 * Valid if Auto_Req_Sen=1 */ 280 __u8 unused[3]; 281 __u8 FWNEST:1, /* send cmd to phys RAID component */ 282 unused2:7; 283 __u8 Phsunit:1, /* physical unit on mirrored pair */ 284 I_AT:1, /* inhibit address translation */ 285 I_HBA_C:1, /* HBA inhibit caching */ 286 unused3:5; 287 288 __u8 cp_id:5, /* SCSI Device ID of target */ 289 cp_channel:3; /* SCSI Channel # of HBA */ 290 __u8 cp_lun:3, 291 :2, 292 cp_luntar:1, /* CP is for target ROUTINE */ 293 cp_dispri:1, /* Grant disconnect privilege */ 294 cp_identify:1; /* Always TRUE */ 295 __u8 cp_msg1; /* Message bytes 0-3 */ 296 __u8 cp_msg2; 297 __u8 cp_msg3; 298 __u8 cp_cdb[12]; /* Command Descriptor Block */ 299 __u32 cp_datalen; /* Data Transfer Length * 300 * If scatter=1 len of sg package */ 301 void *cp_viraddr; /* address of this ccb */ 302 __u32 cp_dataDMA; /* Data Address, if scatter=1 * 303 * address of scatter packet */ 304 __u32 cp_statDMA; /* address for Status Packet */ 305 __u32 cp_reqDMA; /* Request Sense Address, used if * 306 * CP command ends with error */ 307 /* Additional CP info begins here */ 308 __u32 timestamp; /* Needed to measure command latency */ 309 __u32 timeout; 310 __u8 sizeindex; 311 __u8 rw_latency; 312 __u8 retries; 313 __u8 status; /* status of this queueslot */ 314 struct scsi_cmnd *cmd; /* address of cmd */ 315 struct eata_sg_list *sg_list; 316 }; 317 318 319 struct eata_sp { 320 __u8 hba_stat:7, /* HBA status */ 321 EOC:1; /* True if command finished */ 322 __u8 scsi_stat; /* Target SCSI status */ 323 __u8 reserved[2]; 324 __u32 residue_len; /* Number of bytes not transferred */ 325 struct eata_ccb *ccb; /* Address set in COMMAND PACKET */ 326 __u8 msg[12]; 327 }; 328 329 typedef struct hstd { 330 __u8 vendor[9]; 331 __u8 name[18]; 332 __u8 revision[6]; 333 __u8 EATA_revision; 334 __u32 firmware_revision; 335 __u8 HBA_number; 336 __u8 bustype; /* bustype of HBA */ 337 __u8 channel; /* # of avail. scsi channels */ 338 __u8 state; /* state of HBA */ 339 __u8 primary; /* true if primary */ 340 __u8 more_support:1, /* HBA supports MORE flag */ 341 immediate_support:1, /* HBA supports IMMEDIATE CMDs*/ 342 broken_INQUIRY:1; /* This is an EISA HBA with * 343 * broken INQUIRY */ 344 __u8 do_latency; /* Latency measurement flag */ 345 __u32 reads[13]; 346 __u32 writes[13]; 347 __u32 reads_lat[12][4]; 348 __u32 writes_lat[12][4]; 349 __u32 all_lat[4]; 350 __u8 resetlevel[MAXCHANNEL]; 351 __u32 last_ccb; /* Last used ccb */ 352 __u32 cplen; /* size of CP in words */ 353 __u16 cppadlen; /* pad length of cp in words */ 354 __u16 queuesize; 355 __u16 sgsize; /* # of entries in the SG list*/ 356 __u16 devflags; /* bits set for detected devices */ 357 __u8 hostid; /* SCSI ID of HBA */ 358 __u8 moresupport; /* HBA supports MORE flag */ 359 struct Scsi_Host *next; 360 struct Scsi_Host *prev; 361 struct pci_dev *pdev; /* PCI device or NULL for non PCI */ 362 struct eata_sp sp; /* status packet */ 363 struct eata_ccb ccb[0]; /* ccb array begins here */ 364 }hostdata; 365 366 /* structure for max. 2 emulated drives */ 367 struct drive_geom_emul { 368 __u8 trans; /* translation flag 1=transl */ 369 __u8 channel; /* SCSI channel number */ 370 __u8 HBA; /* HBA number (prim/sec) */ 371 __u8 id; /* drive id */ 372 __u8 lun; /* drive lun */ 373 __u32 heads; /* number of heads */ 374 __u32 sectors; /* number of sectors */ 375 __u32 cylinder; /* number of cylinders */ 376 }; 377 378 struct geom_emul { 379 __u8 bios_drives; /* number of emulated drives */ 380 struct drive_geom_emul drv[2]; /* drive structures */ 381 }; 382 383 #endif /* _EATA_GENERIC_H */ 384 385 /* 386 * Overrides for Emacs so that we almost follow Linus's tabbing style. 387 * Emacs will notice this stuff at the end of the file and automatically 388 * adjust the settings for this buffer only. This must remain at the end 389 * of the file. 390 * --------------------------------------------------------------------------- 391 * Local variables: 392 * c-indent-level: 4 393 * c-brace-imaginary-offset: 0 394 * c-brace-offset: -4 395 * c-argdecl-indent: 4 396 * c-label-offset: -4 397 * c-continued-statement-offset: 4 398 * c-continued-brace-offset: 0 399 * tab-width: 8 400 * End: 401 */ 402