1 /*
2 * Copyright (c) 2003-2012 Broadcom Corporation
3 * All Rights Reserved
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * 1. Redistributions of source code must retain the above copyright
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the Broadcom
10 * license below:
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 *
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in
20 * the documentation and/or other materials provided with the
21 * distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
30 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
32 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
33 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
35
36 #include <linux/device.h>
37 #include <linux/platform_device.h>
38 #include <linux/kernel.h>
39 #include <linux/init.h>
40 #include <linux/io.h>
41 #include <linux/delay.h>
42 #include <linux/ioport.h>
43 #include <linux/resource.h>
44 #include <linux/phy.h>
45
46 #include <asm/netlogic/haldefs.h>
47 #include <asm/netlogic/common.h>
48 #include <asm/netlogic/xlr/fmn.h>
49 #include <asm/netlogic/xlr/xlr.h>
50 #include <asm/netlogic/psb-bootinfo.h>
51 #include <asm/netlogic/xlr/pic.h>
52 #include <asm/netlogic/xlr/iomap.h>
53
54 #include "platform_net.h"
55
56 /* Linux Net */
57 #define MAX_NUM_GMAC 8
58 #define MAX_NUM_XLS_GMAC 8
59 #define MAX_NUM_XLR_GMAC 4
60
61 static u32 xlr_gmac_offsets[] = {
62 NETLOGIC_IO_GMAC_0_OFFSET, NETLOGIC_IO_GMAC_1_OFFSET,
63 NETLOGIC_IO_GMAC_2_OFFSET, NETLOGIC_IO_GMAC_3_OFFSET,
64 NETLOGIC_IO_GMAC_4_OFFSET, NETLOGIC_IO_GMAC_5_OFFSET,
65 NETLOGIC_IO_GMAC_6_OFFSET, NETLOGIC_IO_GMAC_7_OFFSET
66 };
67
68 static u32 xlr_gmac_irqs[] = { PIC_GMAC_0_IRQ, PIC_GMAC_1_IRQ,
69 PIC_GMAC_2_IRQ, PIC_GMAC_3_IRQ,
70 PIC_GMAC_4_IRQ, PIC_GMAC_5_IRQ,
71 PIC_GMAC_6_IRQ, PIC_GMAC_7_IRQ
72 };
73
74 static struct resource xlr_net0_res[8];
75 static struct resource xlr_net1_res[8];
76 static u32 __iomem *gmac4_addr;
77 static u32 __iomem *gpio_addr;
78
xlr_resource_init(struct resource * res,int offset,int irq)79 static void xlr_resource_init(struct resource *res, int offset, int irq)
80 {
81 res->name = "gmac";
82
83 res->start = CPHYSADDR(nlm_mmio_base(offset));
84 res->end = res->start + 0xfff;
85 res->flags = IORESOURCE_MEM;
86
87 res++;
88 res->name = "gmac";
89 res->start = irq;
90 res->end = irq;
91 res->flags = IORESOURCE_IRQ;
92 }
93
gmac_controller2_init(void * gmac0_addr)94 static struct platform_device *gmac_controller2_init(void *gmac0_addr)
95 {
96 int mac;
97 static struct xlr_net_data ndata1 = {
98 .phy_interface = PHY_INTERFACE_MODE_SGMII,
99 .rfr_station = FMN_STNID_GMAC1_FR_0,
100 .bucket_size = xlr_board_fmn_config.bucket_size,
101 .gmac_fmn_info = &xlr_board_fmn_config.gmac[1],
102 };
103
104 static struct platform_device xlr_net_dev1 = {
105 .name = "xlr-net",
106 .id = 1,
107 .dev.platform_data = &ndata1,
108 };
109
110 gmac4_addr = ioremap(CPHYSADDR(
111 nlm_mmio_base(NETLOGIC_IO_GMAC_4_OFFSET)), 0xfff);
112 ndata1.serdes_addr = gmac4_addr;
113 ndata1.pcs_addr = gmac4_addr;
114 ndata1.mii_addr = gmac0_addr;
115 ndata1.gpio_addr = gpio_addr;
116 ndata1.cpu_mask = nlm_current_node()->coremask;
117
118 xlr_net_dev1.resource = xlr_net1_res;
119
120 for (mac = 0; mac < 4; mac++) {
121 ndata1.tx_stnid[mac] = FMN_STNID_GMAC1_TX0 + mac;
122 ndata1.phy_addr[mac] = mac + 4 + 0x10;
123
124 xlr_resource_init(&xlr_net1_res[mac * 2],
125 xlr_gmac_offsets[mac + 4],
126 xlr_gmac_irqs[mac + 4]);
127 }
128 xlr_net_dev1.num_resources = 8;
129
130 return &xlr_net_dev1;
131 }
132
xls_gmac_init(void)133 static void xls_gmac_init(void)
134 {
135 int mac;
136 struct platform_device *xlr_net_dev1;
137 void __iomem *gmac0_addr = ioremap(CPHYSADDR(
138 nlm_mmio_base(NETLOGIC_IO_GMAC_0_OFFSET)), 0xfff);
139
140 static struct xlr_net_data ndata0 = {
141 .rfr_station = FMN_STNID_GMACRFR_0,
142 .bucket_size = xlr_board_fmn_config.bucket_size,
143 .gmac_fmn_info = &xlr_board_fmn_config.gmac[0],
144 };
145
146 static struct platform_device xlr_net_dev0 = {
147 .name = "xlr-net",
148 .id = 0,
149 };
150 xlr_net_dev0.dev.platform_data = &ndata0;
151 ndata0.serdes_addr = gmac0_addr;
152 ndata0.pcs_addr = gmac0_addr;
153 ndata0.mii_addr = gmac0_addr;
154
155 /* Passing GPIO base for serdes init. Only needed on sgmii ports */
156 gpio_addr = ioremap(CPHYSADDR(
157 nlm_mmio_base(NETLOGIC_IO_GPIO_OFFSET)), 0xfff);
158 ndata0.gpio_addr = gpio_addr;
159 ndata0.cpu_mask = nlm_current_node()->coremask;
160
161 xlr_net_dev0.resource = xlr_net0_res;
162
163 switch (nlm_prom_info.board_major_version) {
164 case 12:
165 /* first block RGMII or XAUI, use RGMII */
166 ndata0.phy_interface = PHY_INTERFACE_MODE_RGMII;
167 ndata0.tx_stnid[0] = FMN_STNID_GMAC0_TX0;
168 ndata0.phy_addr[0] = 0;
169
170 xlr_net_dev0.num_resources = 2;
171
172 xlr_resource_init(&xlr_net0_res[0], xlr_gmac_offsets[0],
173 xlr_gmac_irqs[0]);
174 platform_device_register(&xlr_net_dev0);
175
176 /* second block is XAUI, not supported yet */
177 break;
178 default:
179 /* default XLS config, all ports SGMII */
180 ndata0.phy_interface = PHY_INTERFACE_MODE_SGMII;
181 for (mac = 0; mac < 4; mac++) {
182 ndata0.tx_stnid[mac] = FMN_STNID_GMAC0_TX0 + mac;
183 ndata0.phy_addr[mac] = mac + 0x10;
184
185 xlr_resource_init(&xlr_net0_res[mac * 2],
186 xlr_gmac_offsets[mac],
187 xlr_gmac_irqs[mac]);
188 }
189 xlr_net_dev0.num_resources = 8;
190 platform_device_register(&xlr_net_dev0);
191
192 xlr_net_dev1 = gmac_controller2_init(gmac0_addr);
193 platform_device_register(xlr_net_dev1);
194 }
195 }
196
xlr_gmac_init(void)197 static void xlr_gmac_init(void)
198 {
199 int mac;
200
201 /* assume all GMACs for now */
202 static struct xlr_net_data ndata0 = {
203 .phy_interface = PHY_INTERFACE_MODE_RGMII,
204 .serdes_addr = NULL,
205 .pcs_addr = NULL,
206 .rfr_station = FMN_STNID_GMACRFR_0,
207 .bucket_size = xlr_board_fmn_config.bucket_size,
208 .gmac_fmn_info = &xlr_board_fmn_config.gmac[0],
209 .gpio_addr = NULL,
210 };
211
212 static struct platform_device xlr_net_dev0 = {
213 .name = "xlr-net",
214 .id = 0,
215 .dev.platform_data = &ndata0,
216 };
217 ndata0.mii_addr = ioremap(CPHYSADDR(
218 nlm_mmio_base(NETLOGIC_IO_GMAC_0_OFFSET)), 0xfff);
219
220 ndata0.cpu_mask = nlm_current_node()->coremask;
221
222 for (mac = 0; mac < MAX_NUM_XLR_GMAC; mac++) {
223 ndata0.tx_stnid[mac] = FMN_STNID_GMAC0_TX0 + mac;
224 ndata0.phy_addr[mac] = mac;
225 xlr_resource_init(&xlr_net0_res[mac * 2], xlr_gmac_offsets[mac],
226 xlr_gmac_irqs[mac]);
227 }
228 xlr_net_dev0.num_resources = 8;
229 xlr_net_dev0.resource = xlr_net0_res;
230
231 platform_device_register(&xlr_net_dev0);
232 }
233
xlr_net_init(void)234 static int __init xlr_net_init(void)
235 {
236 if (nlm_chip_is_xls())
237 xls_gmac_init();
238 else
239 xlr_gmac_init();
240
241 return 0;
242 }
243
244 arch_initcall(xlr_net_init);
245