1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _R819XU_PHY_H 3 #define _R819XU_PHY_H 4 5 /* Channel switch: The size of command tables for switch channel */ 6 #define MAX_PRECMD_CNT 16 7 #define MAX_RFDEPENDCMD_CNT 16 8 #define MAX_POSTCMD_CNT 16 9 10 typedef enum _SwChnlCmdID { 11 CmdID_End, 12 CmdID_SetTxPowerLevel, 13 CmdID_BBRegWrite10, 14 CmdID_WritePortUlong, 15 CmdID_WritePortUshort, 16 CmdID_WritePortUchar, 17 CmdID_RF_WriteReg, 18 } SwChnlCmdID; 19 20 /* -----------------------Define structure---------------------- */ 21 /* 1. Switch channel related */ 22 typedef struct _SwChnlCmd { 23 SwChnlCmdID CmdID; 24 u32 Para1; 25 u32 Para2; 26 u32 msDelay; 27 } __packed SwChnlCmd; 28 29 extern u32 rtl819XMACPHY_Array_PG[]; 30 extern u32 rtl819XPHY_REG_1T2RArray[]; 31 extern u32 rtl819XAGCTAB_Array[]; 32 extern u32 rtl819XRadioA_Array[]; 33 extern u32 rtl819XRadioB_Array[]; 34 extern u32 rtl819XRadioC_Array[]; 35 extern u32 rtl819XRadioD_Array[]; 36 37 typedef enum _HW90_BLOCK { 38 HW90_BLOCK_MAC = 0, 39 HW90_BLOCK_PHY0 = 1, 40 HW90_BLOCK_PHY1 = 2, 41 HW90_BLOCK_RF = 3, 42 HW90_BLOCK_MAXIMUM = 4, /* Never use this */ 43 } HW90_BLOCK_E, *PHW90_BLOCK_E; 44 45 typedef enum _RF90_RADIO_PATH { 46 RF90_PATH_A = 0, /* Radio Path A */ 47 RF90_PATH_B = 1, /* Radio Path B */ 48 RF90_PATH_C = 2, /* Radio Path C */ 49 RF90_PATH_D = 3, /* Radio Path D */ 50 RF90_PATH_MAX /* Max RF number 92 support */ 51 } RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E; 52 53 #define bMaskByte0 0xff 54 #define bMaskByte1 0xff00 55 #define bMaskByte2 0xff0000 56 #define bMaskByte3 0xff000000 57 #define bMaskHWord 0xffff0000 58 #define bMaskLWord 0x0000ffff 59 #define bMaskDWord 0xffffffff 60 61 u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device *dev, u32 eRFPath); 62 void rtl8192_setBBreg(struct net_device *dev, u32 reg_addr, 63 u32 bitmask, u32 data); 64 u32 rtl8192_QueryBBReg(struct net_device *dev, u32 reg_addr, u32 bitmask); 65 void rtl8192_phy_SetRFReg(struct net_device *dev, RF90_RADIO_PATH_E eRFPath, 66 u32 reg_addr, u32 bitmask, u32 data); 67 u32 rtl8192_phy_QueryRFReg(struct net_device *dev, RF90_RADIO_PATH_E eRFPath, 68 u32 reg_addr, u32 bitmask); 69 void rtl8192_phy_configmac(struct net_device *dev); 70 void rtl8192_phyConfigBB(struct net_device *dev, u8 ConfigType); 71 u8 rtl8192_phy_checkBBAndRF(struct net_device *dev, 72 HW90_BLOCK_E CheckBlock, RF90_RADIO_PATH_E eRFPath); 73 void rtl8192_BBConfig(struct net_device *dev); 74 void rtl8192_phy_getTxPower(struct net_device *dev); 75 void rtl8192_phy_setTxPower(struct net_device *dev, u8 channel); 76 void rtl8192_phy_RFConfig(struct net_device *dev); 77 void rtl8192_phy_updateInitGain(struct net_device *dev); 78 u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device *dev, 79 RF90_RADIO_PATH_E eRFPath); 80 81 u8 rtl8192_phy_SwChnl(struct net_device *dev, u8 channel); 82 void rtl8192_SetBWMode(struct net_device *dev, HT_CHANNEL_WIDTH bandwidth, 83 HT_EXTCHNL_OFFSET offset); 84 void rtl8192_SwChnl_WorkItem(struct net_device *dev); 85 void rtl8192_SetBWModeWorkItem(struct net_device *dev); 86 bool rtl8192_SetRFPowerState(struct net_device *dev, 87 RT_RF_POWER_STATE eRFPowerState); 88 void InitialGain819xUsb(struct net_device *dev, u8 Operation); 89 90 void InitialGainOperateWorkItemCallBack(struct work_struct *work); 91 92 #endif 93