1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 ******************************************************************************/ 15 #ifndef __RTW_PWRCTRL_H_ 16 #define __RTW_PWRCTRL_H_ 17 18 19 #define FW_PWR0 0 20 #define FW_PWR1 1 21 #define FW_PWR2 2 22 #define FW_PWR3 3 23 24 25 #define HW_PWR0 7 26 #define HW_PWR1 6 27 #define HW_PWR2 2 28 #define HW_PWR3 0 29 #define HW_PWR4 8 30 31 #define FW_PWRMSK 0x7 32 33 34 #define XMIT_ALIVE BIT(0) 35 #define RECV_ALIVE BIT(1) 36 #define CMD_ALIVE BIT(2) 37 #define EVT_ALIVE BIT(3) 38 #define BTCOEX_ALIVE BIT(4) 39 40 41 enum Power_Mgnt 42 { 43 PS_MODE_ACTIVE = 0 , 44 PS_MODE_MIN , 45 PS_MODE_MAX , 46 PS_MODE_DTIM , /* PS_MODE_SELF_DEFINED */ 47 PS_MODE_VOIP , 48 PS_MODE_UAPSD_WMM , 49 PS_MODE_UAPSD , 50 PS_MODE_IBSS , 51 PS_MODE_WWLAN , 52 PM_Radio_Off , 53 PM_Card_Disable , 54 PS_MODE_NUM, 55 }; 56 57 #ifdef CONFIG_PNO_SUPPORT 58 #define MAX_PNO_LIST_COUNT 16 59 #define MAX_SCAN_LIST_COUNT 14 /* 2.4G only */ 60 #endif 61 62 /* 63 BIT[2:0] = HW state 64 BIT[3] = Protocol PS state, 0: register active state , 1: register sleep state 65 BIT[4] = sub-state 66 */ 67 68 #define PS_DPS BIT(0) 69 #define PS_LCLK (PS_DPS) 70 #define PS_RF_OFF BIT(1) 71 #define PS_ALL_ON BIT(2) 72 #define PS_ST_ACTIVE BIT(3) 73 74 #define PS_ISR_ENABLE BIT(4) 75 #define PS_IMR_ENABLE BIT(5) 76 #define PS_ACK BIT(6) 77 #define PS_TOGGLE BIT(7) 78 79 #define PS_STATE_MASK (0x0F) 80 #define PS_STATE_HW_MASK (0x07) 81 #define PS_SEQ_MASK (0xc0) 82 83 #define PS_STATE(x) (PS_STATE_MASK & (x)) 84 #define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x)) 85 #define PS_SEQ(x) (PS_SEQ_MASK & (x)) 86 87 #define PS_STATE_S0 (PS_DPS) 88 #define PS_STATE_S1 (PS_LCLK) 89 #define PS_STATE_S2 (PS_RF_OFF) 90 #define PS_STATE_S3 (PS_ALL_ON) 91 #define PS_STATE_S4 ((PS_ST_ACTIVE) | (PS_ALL_ON)) 92 93 94 #define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON)) 95 #define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE)) 96 #define CLR_PS_STATE(x) ((x) = ((x) & (0xF0))) 97 98 99 struct reportpwrstate_parm { 100 unsigned char mode; 101 unsigned char state; /* the CPWM value */ 102 unsigned short rsvd; 103 }; 104 105 106 typedef _sema _pwrlock; 107 108 109 #define LPS_DELAY_TIME 1*HZ /* 1 sec */ 110 111 #define EXE_PWR_NONE 0x01 112 #define EXE_PWR_IPS 0x02 113 #define EXE_PWR_LPS 0x04 114 115 /* RF state. */ 116 enum rt_rf_power_state { 117 rf_on, /* RF is on after RFSleep or RFOff */ 118 rf_sleep, /* 802.11 Power Save mode */ 119 rf_off, /* HW/SW Radio OFF or Inactive Power Save */ 120 /* Add the new RF state above this line ===== */ 121 rf_max 122 }; 123 124 /* RF Off Level for IPS or HW/SW radio off */ 125 #define RT_RF_OFF_LEVL_ASPM BIT(0) /* PCI ASPM */ 126 #define RT_RF_OFF_LEVL_CLK_REQ BIT(1) /* PCI clock request */ 127 #define RT_RF_OFF_LEVL_PCI_D3 BIT(2) /* PCI D3 mode */ 128 #define RT_RF_OFF_LEVL_HALT_NIC BIT(3) /* NIC halt, re-initialize hw parameters */ 129 #define RT_RF_OFF_LEVL_FREE_FW BIT(4) /* FW free, re-download the FW */ 130 #define RT_RF_OFF_LEVL_FW_32K BIT(5) /* FW in 32k */ 131 #define RT_RF_PS_LEVEL_ALWAYS_ASPM BIT(6) /* Always enable ASPM and Clock Req in initialization. */ 132 #define RT_RF_LPS_DISALBE_2R BIT(30) /* When LPS is on, disable 2R if no packet is received or transmittd. */ 133 #define RT_RF_LPS_LEVEL_ASPM BIT(31) /* LPS with ASPM */ 134 135 #define RT_IN_PS_LEVEL(ppsc, _PS_FLAG) ((ppsc->cur_ps_level & _PS_FLAG) ? true : false) 136 #define RT_CLEAR_PS_LEVEL(ppsc, _PS_FLAG) (ppsc->cur_ps_level &= (~(_PS_FLAG))) 137 #define RT_SET_PS_LEVEL(ppsc, _PS_FLAG) (ppsc->cur_ps_level |= _PS_FLAG) 138 139 /* ASPM OSC Control bit, added by Roger, 2013.03.29. */ 140 #define RT_PCI_ASPM_OSC_IGNORE 0 /* PCI ASPM ignore OSC control in default */ 141 #define RT_PCI_ASPM_OSC_ENABLE BIT0 /* PCI ASPM controlled by OS according to ACPI Spec 5.0 */ 142 #define RT_PCI_ASPM_OSC_DISABLE BIT1 /* PCI ASPM controlled by driver or BIOS, i.e., force enable ASPM */ 143 144 145 enum _PS_BBRegBackup_ { 146 PSBBREG_RF0 = 0, 147 PSBBREG_RF1, 148 PSBBREG_RF2, 149 PSBBREG_AFE0, 150 PSBBREG_TOTALCNT 151 }; 152 153 enum { /* for ips_mode */ 154 IPS_NONE = 0, 155 IPS_NORMAL, 156 IPS_LEVEL_2, 157 IPS_NUM 158 }; 159 160 /* Design for pwrctrl_priv.ips_deny, 32 bits for 32 reasons at most */ 161 enum PS_DENY_REASON { 162 PS_DENY_DRV_INITIAL = 0, 163 PS_DENY_SCAN, 164 PS_DENY_JOIN, 165 PS_DENY_DISCONNECT, 166 PS_DENY_SUSPEND, 167 PS_DENY_IOCTL, 168 PS_DENY_MGNT_TX, 169 PS_DENY_DRV_REMOVE = 30, 170 PS_DENY_OTHERS = 31 171 }; 172 173 #ifdef CONFIG_PNO_SUPPORT 174 typedef struct pno_nlo_info 175 { 176 u32 fast_scan_period; /* Fast scan period */ 177 u32 ssid_num; /* number of entry */ 178 u32 slow_scan_period; /* slow scan period */ 179 u32 fast_scan_iterations; /* Fast scan iterations */ 180 u8 ssid_length[MAX_PNO_LIST_COUNT]; /* SSID Length Array */ 181 u8 ssid_cipher_info[MAX_PNO_LIST_COUNT]; /* Cipher information for security */ 182 u8 ssid_channel_info[MAX_PNO_LIST_COUNT]; /* channel information */ 183 }pno_nlo_info_t; 184 185 typedef struct pno_ssid { 186 u32 SSID_len; 187 u8 SSID[32]; 188 } pno_ssid_t; 189 190 typedef struct pno_ssid_list { 191 pno_ssid_t node[MAX_PNO_LIST_COUNT]; 192 }pno_ssid_list_t; 193 194 typedef struct pno_scan_channel_info 195 { 196 u8 channel; 197 u8 tx_power; 198 u8 timeout; 199 u8 active; /* set 1 means active scan, or pasivite scan. */ 200 }pno_scan_channel_info_t; 201 202 typedef struct pno_scan_info 203 { 204 u8 enableRFE; /* Enable RFE */ 205 u8 period_scan_time; /* exclusive with fast_scan_period and slow_scan_period */ 206 u8 periodScan; /* exclusive with fast_scan_period and slow_scan_period */ 207 u8 orig_80_offset; /* original channel 80 offset */ 208 u8 orig_40_offset; /* original channel 40 offset */ 209 u8 orig_bw; /* original bandwidth */ 210 u8 orig_ch; /* original channel */ 211 u8 channel_num; /* number of channel */ 212 u64 rfe_type; /* rfe_type && 0x00000000000000ff */ 213 pno_scan_channel_info_t ssid_channel_info[MAX_SCAN_LIST_COUNT]; 214 }pno_scan_info_t; 215 #endif /* CONFIG_PNO_SUPPORT */ 216 217 struct pwrctrl_priv 218 { 219 _pwrlock lock; 220 _pwrlock check_32k_lock; 221 volatile u8 rpwm; /* requested power state for fw */ 222 volatile u8 cpwm; /* fw current power state. updated when 1. read from HCPWM 2. driver lowers power level */ 223 volatile u8 tog; /* toggling */ 224 volatile u8 cpwm_tog; /* toggling */ 225 226 u8 pwr_mode; 227 u8 smart_ps; 228 u8 bcn_ant_mode; 229 u8 dtim; 230 231 u32 alives; 232 _workitem cpwm_event; 233 u8 brpwmtimeout; 234 _workitem rpwmtimeoutwi; 235 _timer pwr_rpwm_timer; 236 u8 bpower_saving; /* for LPS/IPS */ 237 238 u8 b_hw_radio_off; 239 u8 reg_rfoff; 240 u8 reg_pdnmode; /* powerdown mode */ 241 u32 rfoff_reason; 242 243 /* RF OFF Level */ 244 u32 cur_ps_level; 245 u32 reg_rfps_level; 246 247 uint ips_enter_cnts; 248 uint ips_leave_cnts; 249 250 u8 ips_mode; 251 u8 ips_org_mode; 252 u8 ips_mode_req; /* used to accept the mode setting request, will update to ipsmode later */ 253 uint bips_processing; 254 unsigned long ips_deny_time; /* will deny IPS when system time is smaller than this */ 255 u8 pre_ips_type;/* 0: default flow, 1: carddisbale flow */ 256 257 /* ps_deny: if 0, power save is free to go; otherwise deny all kinds of power save. */ 258 /* Use PS_DENY_REASON to decide reason. */ 259 /* Don't access this variable directly without control function, */ 260 /* and this variable should be protected by lock. */ 261 u32 ps_deny; 262 263 u8 ps_processing; /* temporarily used to mark whether in rtw_ps_processor */ 264 265 u8 fw_psmode_iface_id; 266 u8 bLeisurePs; 267 u8 LpsIdleCount; 268 u8 power_mgnt; 269 u8 org_power_mgnt; 270 u8 bFwCurrentInPSMode; 271 unsigned long DelayLPSLastTimeStamp; 272 s32 pnp_current_pwr_state; 273 u8 pnp_bstop_trx; 274 275 276 u8 bInternalAutoSuspend; 277 u8 bInSuspend; 278 279 u8 bAutoResume; 280 u8 autopm_cnt; 281 282 u8 bSupportRemoteWakeup; 283 u8 wowlan_wake_reason; 284 u8 wowlan_ap_mode; 285 u8 wowlan_mode; 286 #ifdef CONFIG_WOWLAN 287 u8 wowlan_pattern; 288 u8 wowlan_magic; 289 u8 wowlan_unicast; 290 u8 wowlan_pattern_idx; 291 u8 wowlan_pno_enable; 292 #ifdef CONFIG_PNO_SUPPORT 293 u8 pno_in_resume; 294 u8 pno_inited; 295 pno_nlo_info_t *pnlo_info; 296 pno_scan_info_t *pscan_info; 297 pno_ssid_list_t *pno_ssid_list; 298 #endif 299 u32 wowlan_pattern_context[8][5]; 300 u64 wowlan_fw_iv; 301 #endif /* CONFIG_WOWLAN */ 302 _timer pwr_state_check_timer; 303 int pwr_state_check_interval; 304 u8 pwr_state_check_cnts; 305 306 int ps_flag; /* used by autosuspend */ 307 308 enum rt_rf_power_state rf_pwrstate;/* cur power state, only for IPS */ 309 /* rt_rf_power_state current_rfpwrstate; */ 310 enum rt_rf_power_state change_rfpwrstate; 311 312 u8 bHWPowerdown; /* power down mode selection. 0:radio off, 1:power down */ 313 u8 bHWPwrPindetect; /* come from registrypriv.hwpwrp_detect. enable power down function. 0:disable, 1:enable */ 314 u8 bkeepfwalive; 315 u8 brfoffbyhw; 316 unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT]; 317 }; 318 319 #define rtw_get_ips_mode_req(pwrctl) \ 320 (pwrctl)->ips_mode_req 321 322 #define rtw_ips_mode_req(pwrctl, ips_mode) \ 323 (pwrctl)->ips_mode_req = (ips_mode) 324 325 #define RTW_PWR_STATE_CHK_INTERVAL 2000 326 327 #define _rtw_set_pwr_state_check_timer(pwrctl, ms) \ 328 do { \ 329 /*DBG_871X("%s _rtw_set_pwr_state_check_timer(%p, %d)\n", __func__, (pwrctl), (ms));*/ \ 330 _set_timer(&(pwrctl)->pwr_state_check_timer, (ms)); \ 331 } while (0) 332 333 #define rtw_set_pwr_state_check_timer(pwrctl) \ 334 _rtw_set_pwr_state_check_timer((pwrctl), (pwrctl)->pwr_state_check_interval) 335 336 extern void rtw_init_pwrctrl_priv(struct adapter *adapter); 337 extern void rtw_free_pwrctrl_priv(struct adapter * adapter); 338 339 s32 rtw_register_task_alive(struct adapter *, u32 task); 340 void rtw_unregister_task_alive(struct adapter *, u32 task); 341 extern s32 rtw_register_tx_alive(struct adapter *padapter); 342 extern void rtw_unregister_tx_alive(struct adapter *padapter); 343 extern s32 rtw_register_cmd_alive(struct adapter *padapter); 344 extern void rtw_unregister_cmd_alive(struct adapter *padapter); 345 extern void cpwm_int_hdl(struct adapter *padapter, struct reportpwrstate_parm *preportpwrstate); 346 extern void LPS_Leave_check(struct adapter *padapter); 347 348 extern void LeaveAllPowerSaveMode(struct adapter * Adapter); 349 extern void LeaveAllPowerSaveModeDirect(struct adapter * Adapter); 350 void _ips_enter(struct adapter *padapter); 351 void ips_enter(struct adapter *padapter); 352 int _ips_leave(struct adapter *padapter); 353 int ips_leave(struct adapter *padapter); 354 355 void rtw_ps_processor(struct adapter *padapter); 356 357 s32 LPS_RF_ON_check(struct adapter *padapter, u32 delay_ms); 358 void LPS_Enter(struct adapter *padapter, const char *msg); 359 void LPS_Leave(struct adapter *padapter, const char *msg); 360 void traffic_check_for_leave_lps(struct adapter *padapter, u8 tx, u32 tx_packets); 361 void rtw_set_ps_mode(struct adapter *padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg); 362 void rtw_set_rpwm(struct adapter *padapter, u8 val8); 363 364 void rtw_set_ips_deny(struct adapter *padapter, u32 ms); 365 int _rtw_pwr_wakeup(struct adapter *padapter, u32 ips_deffer_ms, const char *caller); 366 #define rtw_pwr_wakeup(adapter) _rtw_pwr_wakeup(adapter, RTW_PWR_STATE_CHK_INTERVAL, __func__) 367 #define rtw_pwr_wakeup_ex(adapter, ips_deffer_ms) _rtw_pwr_wakeup(adapter, ips_deffer_ms, __func__) 368 int rtw_pm_set_ips(struct adapter *padapter, u8 mode); 369 int rtw_pm_set_lps(struct adapter *padapter, u8 mode); 370 371 void rtw_ps_deny(struct adapter *padapter, enum PS_DENY_REASON reason); 372 void rtw_ps_deny_cancel(struct adapter *padapter, enum PS_DENY_REASON reason); 373 u32 rtw_ps_deny_get(struct adapter *padapter); 374 375 #endif /* __RTL871X_PWRCTRL_H_ */ 376