1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2016 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26 /* ************************************************************
27 * include files
28 * *************************************************************/
29 #include "mp_precomp.h"
30 #include "phydm_precomp.h"
31
phydm_update_rf_state(struct phy_dm_struct * dm,struct dyn_pwr_saving * dm_ps_table,int _rssi_up_bound,int _rssi_low_bound,int _is_force_in_normal)32 static inline void phydm_update_rf_state(struct phy_dm_struct *dm,
33 struct dyn_pwr_saving *dm_ps_table,
34 int _rssi_up_bound,
35 int _rssi_low_bound,
36 int _is_force_in_normal)
37 {
38 if (_is_force_in_normal) {
39 dm_ps_table->cur_rf_state = rf_normal;
40 return;
41 }
42
43 if (dm->rssi_min == 0xFF) {
44 dm_ps_table->cur_rf_state = RF_MAX;
45 return;
46 }
47
48 if (dm_ps_table->pre_rf_state == rf_normal) {
49 if (dm->rssi_min >= _rssi_up_bound)
50 dm_ps_table->cur_rf_state = rf_save;
51 else
52 dm_ps_table->cur_rf_state = rf_normal;
53 } else {
54 if (dm->rssi_min <= _rssi_low_bound)
55 dm_ps_table->cur_rf_state = rf_normal;
56 else
57 dm_ps_table->cur_rf_state = rf_save;
58 }
59 }
60
odm_dynamic_bb_power_saving_init(void * dm_void)61 void odm_dynamic_bb_power_saving_init(void *dm_void)
62 {
63 struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
64 struct dyn_pwr_saving *dm_ps_table = &dm->dm_ps_table;
65
66 dm_ps_table->pre_cca_state = CCA_MAX;
67 dm_ps_table->cur_cca_state = CCA_MAX;
68 dm_ps_table->pre_rf_state = RF_MAX;
69 dm_ps_table->cur_rf_state = RF_MAX;
70 dm_ps_table->rssi_val_min = 0;
71 dm_ps_table->initialize = 0;
72 }
73
odm_rf_saving(void * dm_void,u8 is_force_in_normal)74 void odm_rf_saving(void *dm_void, u8 is_force_in_normal)
75 {
76 struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
77 struct dyn_pwr_saving *dm_ps_table = &dm->dm_ps_table;
78 u8 rssi_up_bound = 30;
79 u8 rssi_low_bound = 25;
80
81 if (dm->patch_id == 40) { /* RT_CID_819x_FUNAI_TV */
82 rssi_up_bound = 50;
83 rssi_low_bound = 45;
84 }
85 if (dm_ps_table->initialize == 0) {
86 dm_ps_table->reg874 =
87 (odm_get_bb_reg(dm, 0x874, MASKDWORD) & 0x1CC000) >> 14;
88 dm_ps_table->regc70 =
89 (odm_get_bb_reg(dm, 0xc70, MASKDWORD) & BIT(3)) >> 3;
90 dm_ps_table->reg85c =
91 (odm_get_bb_reg(dm, 0x85c, MASKDWORD) & 0xFF000000) >>
92 24;
93 dm_ps_table->rega74 =
94 (odm_get_bb_reg(dm, 0xa74, MASKDWORD) & 0xF000) >> 12;
95 /* Reg818 = phy_query_bb_reg(adapter, 0x818, MASKDWORD); */
96 dm_ps_table->initialize = 1;
97 }
98
99 phydm_update_rf_state(dm, dm_ps_table, rssi_up_bound, rssi_low_bound,
100 is_force_in_normal);
101
102 if (dm_ps_table->pre_rf_state != dm_ps_table->cur_rf_state) {
103 if (dm_ps_table->cur_rf_state == rf_save) {
104 odm_set_bb_reg(dm, 0x874, 0x1C0000,
105 0x2); /* reg874[20:18]=3'b010 */
106 odm_set_bb_reg(dm, 0xc70, BIT(3),
107 0); /* regc70[3]=1'b0 */
108 odm_set_bb_reg(dm, 0x85c, 0xFF000000,
109 0x63); /* reg85c[31:24]=0x63 */
110 odm_set_bb_reg(dm, 0x874, 0xC000,
111 0x2); /* reg874[15:14]=2'b10 */
112 odm_set_bb_reg(dm, 0xa74, 0xF000,
113 0x3); /* RegA75[7:4]=0x3 */
114 odm_set_bb_reg(dm, 0x818, BIT(28),
115 0x0); /* Reg818[28]=1'b0 */
116 odm_set_bb_reg(dm, 0x818, BIT(28),
117 0x1); /* Reg818[28]=1'b1 */
118 } else {
119 odm_set_bb_reg(dm, 0x874, 0x1CC000,
120 dm_ps_table->reg874);
121 odm_set_bb_reg(dm, 0xc70, BIT(3), dm_ps_table->regc70);
122 odm_set_bb_reg(dm, 0x85c, 0xFF000000,
123 dm_ps_table->reg85c);
124 odm_set_bb_reg(dm, 0xa74, 0xF000, dm_ps_table->rega74);
125 odm_set_bb_reg(dm, 0x818, BIT(28), 0x0);
126 }
127 dm_ps_table->pre_rf_state = dm_ps_table->cur_rf_state;
128 }
129 }
130