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1 /**
2  * dwc3-pci.c - PCI Specific glue layer
3  *
4  * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
5  *
6  * Authors: Felipe Balbi <balbi@ti.com>,
7  *	    Sebastian Andrzej Siewior <bigeasy@linutronix.de>
8  *
9  * This program is free software: you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2  of
11  * the License as published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  */
18 
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/slab.h>
22 #include <linux/pci.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/platform_device.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/acpi.h>
27 #include <linux/delay.h>
28 
29 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3		0xabcd
30 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI	0xabce
31 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31	0xabcf
32 #define PCI_DEVICE_ID_INTEL_BYT			0x0f37
33 #define PCI_DEVICE_ID_INTEL_MRFLD		0x119e
34 #define PCI_DEVICE_ID_INTEL_BSW			0x22b7
35 #define PCI_DEVICE_ID_INTEL_SPTLP		0x9d30
36 #define PCI_DEVICE_ID_INTEL_SPTH		0xa130
37 #define PCI_DEVICE_ID_INTEL_BXT			0x0aaa
38 #define PCI_DEVICE_ID_INTEL_BXT_M		0x1aaa
39 #define PCI_DEVICE_ID_INTEL_APL			0x5aaa
40 #define PCI_DEVICE_ID_INTEL_KBP			0xa2b0
41 #define PCI_DEVICE_ID_INTEL_GLK			0x31aa
42 #define PCI_DEVICE_ID_INTEL_CNPLP		0x9dee
43 #define PCI_DEVICE_ID_INTEL_CNPH		0xa36e
44 #define PCI_DEVICE_ID_INTEL_ICLLP		0x34ee
45 
46 #define PCI_INTEL_BXT_DSM_GUID		"732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
47 #define PCI_INTEL_BXT_FUNC_PMU_PWR	4
48 #define PCI_INTEL_BXT_STATE_D0		0
49 #define PCI_INTEL_BXT_STATE_D3		3
50 
51 /**
52  * struct dwc3_pci - Driver private structure
53  * @dwc3: child dwc3 platform_device
54  * @pci: our link to PCI bus
55  * @guid: _DSM GUID
56  * @has_dsm_for_pm: true for devices which need to run _DSM on runtime PM
57  */
58 struct dwc3_pci {
59 	struct platform_device *dwc3;
60 	struct pci_dev *pci;
61 
62 	guid_t guid;
63 
64 	unsigned int has_dsm_for_pm:1;
65 };
66 
67 static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
68 static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
69 
70 static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
71 	{ "reset-gpios", &reset_gpios, 1 },
72 	{ "cs-gpios", &cs_gpios, 1 },
73 	{ },
74 };
75 
dwc3_pci_quirks(struct dwc3_pci * dwc)76 static int dwc3_pci_quirks(struct dwc3_pci *dwc)
77 {
78 	struct platform_device		*dwc3 = dwc->dwc3;
79 	struct pci_dev			*pdev = dwc->pci;
80 
81 	if (pdev->vendor == PCI_VENDOR_ID_AMD &&
82 	    pdev->device == PCI_DEVICE_ID_AMD_NL_USB) {
83 		struct property_entry properties[] = {
84 			PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
85 			PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf),
86 			PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"),
87 			PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"),
88 			PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"),
89 			PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"),
90 			PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"),
91 			PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"),
92 			PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"),
93 			PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"),
94 			PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1),
95 			/*
96 			 * FIXME these quirks should be removed when AMD NL
97 			 * tapes out
98 			 */
99 			PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"),
100 			PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
101 			PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
102 			PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
103 			{ },
104 		};
105 
106 		return platform_device_add_properties(dwc3, properties);
107 	}
108 
109 	if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
110 		int ret;
111 
112 		struct property_entry properties[] = {
113 			PROPERTY_ENTRY_STRING("dr_mode", "peripheral"),
114 			PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
115 			{ }
116 		};
117 
118 		ret = platform_device_add_properties(dwc3, properties);
119 		if (ret < 0)
120 			return ret;
121 
122 		if (pdev->device == PCI_DEVICE_ID_INTEL_BXT ||
123 				pdev->device == PCI_DEVICE_ID_INTEL_BXT_M) {
124 			guid_parse(PCI_INTEL_BXT_DSM_GUID, &dwc->guid);
125 			dwc->has_dsm_for_pm = true;
126 		}
127 
128 		if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
129 			struct gpio_desc *gpio;
130 
131 			ret = devm_acpi_dev_add_driver_gpios(&pdev->dev,
132 					acpi_dwc3_byt_gpios);
133 			if (ret)
134 				dev_dbg(&pdev->dev, "failed to add mapping table\n");
135 
136 			/*
137 			 * These GPIOs will turn on the USB2 PHY. Note that we have to
138 			 * put the gpio descriptors again here because the phy driver
139 			 * might want to grab them, too.
140 			 */
141 			gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW);
142 			if (IS_ERR(gpio))
143 				return PTR_ERR(gpio);
144 
145 			gpiod_set_value_cansleep(gpio, 1);
146 			gpiod_put(gpio);
147 
148 			gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW);
149 			if (IS_ERR(gpio))
150 				return PTR_ERR(gpio);
151 
152 			if (gpio) {
153 				gpiod_set_value_cansleep(gpio, 1);
154 				gpiod_put(gpio);
155 				usleep_range(10000, 11000);
156 			}
157 		}
158 	}
159 
160 	if (pdev->vendor == PCI_VENDOR_ID_SYNOPSYS &&
161 	    (pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 ||
162 	     pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI ||
163 	     pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31)) {
164 		struct property_entry properties[] = {
165 			PROPERTY_ENTRY_BOOL("snps,usb3_lpm_capable"),
166 			PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
167 			PROPERTY_ENTRY_BOOL("snps,dis_enblslpm_quirk"),
168 			PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
169 			{ },
170 		};
171 
172 		return platform_device_add_properties(dwc3, properties);
173 	}
174 
175 	return 0;
176 }
177 
dwc3_pci_probe(struct pci_dev * pci,const struct pci_device_id * id)178 static int dwc3_pci_probe(struct pci_dev *pci,
179 		const struct pci_device_id *id)
180 {
181 	struct dwc3_pci		*dwc;
182 	struct resource		res[2];
183 	int			ret;
184 	struct device		*dev = &pci->dev;
185 
186 	ret = pcim_enable_device(pci);
187 	if (ret) {
188 		dev_err(dev, "failed to enable pci device\n");
189 		return -ENODEV;
190 	}
191 
192 	pci_set_master(pci);
193 
194 	dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL);
195 	if (!dwc)
196 		return -ENOMEM;
197 
198 	dwc->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
199 	if (!dwc->dwc3)
200 		return -ENOMEM;
201 
202 	memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
203 
204 	res[0].start	= pci_resource_start(pci, 0);
205 	res[0].end	= pci_resource_end(pci, 0);
206 	res[0].name	= "dwc_usb3";
207 	res[0].flags	= IORESOURCE_MEM;
208 
209 	res[1].start	= pci->irq;
210 	res[1].name	= "dwc_usb3";
211 	res[1].flags	= IORESOURCE_IRQ;
212 
213 	ret = platform_device_add_resources(dwc->dwc3, res, ARRAY_SIZE(res));
214 	if (ret) {
215 		dev_err(dev, "couldn't add resources to dwc3 device\n");
216 		goto err;
217 	}
218 
219 	dwc->pci = pci;
220 	dwc->dwc3->dev.parent = dev;
221 	ACPI_COMPANION_SET(&dwc->dwc3->dev, ACPI_COMPANION(dev));
222 
223 	ret = dwc3_pci_quirks(dwc);
224 	if (ret)
225 		goto err;
226 
227 	ret = platform_device_add(dwc->dwc3);
228 	if (ret) {
229 		dev_err(dev, "failed to register dwc3 device\n");
230 		goto err;
231 	}
232 
233 	device_init_wakeup(dev, true);
234 	pci_set_drvdata(pci, dwc);
235 	pm_runtime_put(dev);
236 
237 	return 0;
238 err:
239 	platform_device_put(dwc->dwc3);
240 	return ret;
241 }
242 
dwc3_pci_remove(struct pci_dev * pci)243 static void dwc3_pci_remove(struct pci_dev *pci)
244 {
245 	struct dwc3_pci		*dwc = pci_get_drvdata(pci);
246 
247 	device_init_wakeup(&pci->dev, false);
248 	pm_runtime_get(&pci->dev);
249 	platform_device_unregister(dwc->dwc3);
250 }
251 
252 static const struct pci_device_id dwc3_pci_id_table[] = {
253 	{
254 		PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
255 				PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3),
256 	},
257 	{
258 		PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
259 				PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI),
260 	},
261 	{
262 		PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
263 				PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31),
264 	},
265 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BSW), },
266 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), },
267 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), },
268 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTLP), },
269 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTH), },
270 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT), },
271 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT_M), },
272 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL), },
273 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBP), },
274 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GLK), },
275 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CNPLP), },
276 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CNPH), },
277 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICLLP), },
278 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
279 	{  }	/* Terminating Entry */
280 };
281 MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
282 
283 #if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP)
dwc3_pci_dsm(struct dwc3_pci * dwc,int param)284 static int dwc3_pci_dsm(struct dwc3_pci *dwc, int param)
285 {
286 	union acpi_object *obj;
287 	union acpi_object tmp;
288 	union acpi_object argv4 = ACPI_INIT_DSM_ARGV4(1, &tmp);
289 
290 	if (!dwc->has_dsm_for_pm)
291 		return 0;
292 
293 	tmp.type = ACPI_TYPE_INTEGER;
294 	tmp.integer.value = param;
295 
296 	obj = acpi_evaluate_dsm(ACPI_HANDLE(&dwc->pci->dev), &dwc->guid,
297 			1, PCI_INTEL_BXT_FUNC_PMU_PWR, &argv4);
298 	if (!obj) {
299 		dev_err(&dwc->pci->dev, "failed to evaluate _DSM\n");
300 		return -EIO;
301 	}
302 
303 	ACPI_FREE(obj);
304 
305 	return 0;
306 }
307 #endif /* CONFIG_PM || CONFIG_PM_SLEEP */
308 
309 #ifdef CONFIG_PM
dwc3_pci_runtime_suspend(struct device * dev)310 static int dwc3_pci_runtime_suspend(struct device *dev)
311 {
312 	struct dwc3_pci		*dwc = dev_get_drvdata(dev);
313 
314 	if (device_can_wakeup(dev))
315 		return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
316 
317 	return -EBUSY;
318 }
319 
dwc3_pci_runtime_resume(struct device * dev)320 static int dwc3_pci_runtime_resume(struct device *dev)
321 {
322 	struct dwc3_pci		*dwc = dev_get_drvdata(dev);
323 	struct platform_device	*dwc3 = dwc->dwc3;
324 	int			ret;
325 
326 	ret = dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
327 	if (ret)
328 		return ret;
329 
330 	return pm_runtime_get(&dwc3->dev);
331 }
332 #endif /* CONFIG_PM */
333 
334 #ifdef CONFIG_PM_SLEEP
dwc3_pci_suspend(struct device * dev)335 static int dwc3_pci_suspend(struct device *dev)
336 {
337 	struct dwc3_pci		*dwc = dev_get_drvdata(dev);
338 
339 	return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
340 }
341 
dwc3_pci_resume(struct device * dev)342 static int dwc3_pci_resume(struct device *dev)
343 {
344 	struct dwc3_pci		*dwc = dev_get_drvdata(dev);
345 
346 	return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
347 }
348 #endif /* CONFIG_PM_SLEEP */
349 
350 static const struct dev_pm_ops dwc3_pci_dev_pm_ops = {
351 	SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend, dwc3_pci_resume)
352 	SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume,
353 		NULL)
354 };
355 
356 static struct pci_driver dwc3_pci_driver = {
357 	.name		= "dwc3-pci",
358 	.id_table	= dwc3_pci_id_table,
359 	.probe		= dwc3_pci_probe,
360 	.remove		= dwc3_pci_remove,
361 	.driver		= {
362 		.pm	= &dwc3_pci_dev_pm_ops,
363 	}
364 };
365 
366 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
367 MODULE_LICENSE("GPL v2");
368 MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
369 
370 module_pci_driver(dwc3_pci_driver);
371