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1 /*
2  * xHCI host controller driver for R-Car SoCs
3  *
4  * Copyright (C) 2014 Renesas Electronics Corporation
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * version 2 as published by the Free Software Foundation.
9  */
10 
11 #include <linux/firmware.h>
12 #include <linux/module.h>
13 #include <linux/platform_device.h>
14 #include <linux/of.h>
15 #include <linux/usb/phy.h>
16 #include <linux/sys_soc.h>
17 
18 #include "xhci.h"
19 #include "xhci-plat.h"
20 #include "xhci-rcar.h"
21 
22 /*
23 * - The V3 firmware is for r8a7796 (with good performance) and r8a7795 es2.0
24 *   or later.
25 * - The V2 firmware can be used on both r8a7795 (es1.x) and r8a7796.
26 * - The V2 firmware is possible to use on R-Car Gen2. However, the V2 causes
27 *   performance degradation. So, this driver continues to use the V1 if R-Car
28 *   Gen2.
29 * - The V1 firmware is impossible to use on R-Car Gen3.
30 */
31 MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V1);
32 MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V2);
33 MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V3);
34 
35 /*** Register Offset ***/
36 #define RCAR_USB3_INT_ENA	0x224	/* Interrupt Enable */
37 #define RCAR_USB3_DL_CTRL	0x250	/* FW Download Control & Status */
38 #define RCAR_USB3_FW_DATA0	0x258	/* FW Data0 */
39 
40 #define RCAR_USB3_LCLK		0xa44	/* LCLK Select */
41 #define RCAR_USB3_CONF1		0xa48	/* USB3.0 Configuration1 */
42 #define RCAR_USB3_CONF2		0xa5c	/* USB3.0 Configuration2 */
43 #define RCAR_USB3_CONF3		0xaa8	/* USB3.0 Configuration3 */
44 #define RCAR_USB3_RX_POL	0xab0	/* USB3.0 RX Polarity */
45 #define RCAR_USB3_TX_POL	0xab8	/* USB3.0 TX Polarity */
46 
47 /*** Register Settings ***/
48 /* Interrupt Enable */
49 #define RCAR_USB3_INT_XHC_ENA	0x00000001
50 #define RCAR_USB3_INT_PME_ENA	0x00000002
51 #define RCAR_USB3_INT_HSE_ENA	0x00000004
52 #define RCAR_USB3_INT_ENA_VAL	(RCAR_USB3_INT_XHC_ENA | \
53 				RCAR_USB3_INT_PME_ENA | RCAR_USB3_INT_HSE_ENA)
54 
55 /* FW Download Control & Status */
56 #define RCAR_USB3_DL_CTRL_ENABLE	0x00000001
57 #define RCAR_USB3_DL_CTRL_FW_SUCCESS	0x00000010
58 #define RCAR_USB3_DL_CTRL_FW_SET_DATA0	0x00000100
59 
60 /* LCLK Select */
61 #define RCAR_USB3_LCLK_ENA_VAL	0x01030001
62 
63 /* USB3.0 Configuration */
64 #define RCAR_USB3_CONF1_VAL	0x00030204
65 #define RCAR_USB3_CONF2_VAL	0x00030300
66 #define RCAR_USB3_CONF3_VAL	0x13802007
67 
68 /* USB3.0 Polarity */
69 #define RCAR_USB3_RX_POL_VAL	BIT(21)
70 #define RCAR_USB3_TX_POL_VAL	BIT(4)
71 
72 /* For soc_device_attribute */
73 #define RCAR_XHCI_FIRMWARE_V2   BIT(0) /* FIRMWARE V2 */
74 #define RCAR_XHCI_FIRMWARE_V3   BIT(1) /* FIRMWARE V3 */
75 
76 static const struct soc_device_attribute rcar_quirks_match[]  = {
77 	{
78 		.soc_id = "r8a7795", .revision = "ES1.*",
79 		.data = (void *)RCAR_XHCI_FIRMWARE_V2,
80 	},
81 	{
82 		.soc_id = "r8a7795",
83 		.data = (void *)RCAR_XHCI_FIRMWARE_V3,
84 	},
85 	{
86 		.soc_id = "r8a7796",
87 		.data = (void *)RCAR_XHCI_FIRMWARE_V3,
88 	},
89 	{
90 		.soc_id = "r8a77965",
91 		.data = (void *)RCAR_XHCI_FIRMWARE_V3,
92 	},
93 	{ /* sentinel */ },
94 };
95 
xhci_rcar_start_gen2(struct usb_hcd * hcd)96 static void xhci_rcar_start_gen2(struct usb_hcd *hcd)
97 {
98 	/* LCLK Select */
99 	writel(RCAR_USB3_LCLK_ENA_VAL, hcd->regs + RCAR_USB3_LCLK);
100 	/* USB3.0 Configuration */
101 	writel(RCAR_USB3_CONF1_VAL, hcd->regs + RCAR_USB3_CONF1);
102 	writel(RCAR_USB3_CONF2_VAL, hcd->regs + RCAR_USB3_CONF2);
103 	writel(RCAR_USB3_CONF3_VAL, hcd->regs + RCAR_USB3_CONF3);
104 	/* USB3.0 Polarity */
105 	writel(RCAR_USB3_RX_POL_VAL, hcd->regs + RCAR_USB3_RX_POL);
106 	writel(RCAR_USB3_TX_POL_VAL, hcd->regs + RCAR_USB3_TX_POL);
107 }
108 
xhci_rcar_is_gen2(struct device * dev)109 static int xhci_rcar_is_gen2(struct device *dev)
110 {
111 	struct device_node *node = dev->of_node;
112 
113 	return of_device_is_compatible(node, "renesas,xhci-r8a7790") ||
114 		of_device_is_compatible(node, "renesas,xhci-r8a7791") ||
115 		of_device_is_compatible(node, "renesas,xhci-r8a7793") ||
116 		of_device_is_compatible(node, "renesas,rcar-gen2-xhci");
117 }
118 
xhci_rcar_is_gen3(struct device * dev)119 static int xhci_rcar_is_gen3(struct device *dev)
120 {
121 	struct device_node *node = dev->of_node;
122 
123 	return of_device_is_compatible(node, "renesas,xhci-r8a7795") ||
124 		of_device_is_compatible(node, "renesas,xhci-r8a7796") ||
125 		of_device_is_compatible(node, "renesas,rcar-gen3-xhci");
126 }
127 
xhci_rcar_start(struct usb_hcd * hcd)128 void xhci_rcar_start(struct usb_hcd *hcd)
129 {
130 	u32 temp;
131 
132 	if (hcd->regs != NULL) {
133 		/* Interrupt Enable */
134 		temp = readl(hcd->regs + RCAR_USB3_INT_ENA);
135 		temp |= RCAR_USB3_INT_ENA_VAL;
136 		writel(temp, hcd->regs + RCAR_USB3_INT_ENA);
137 		if (xhci_rcar_is_gen2(hcd->self.controller))
138 			xhci_rcar_start_gen2(hcd);
139 	}
140 }
141 
xhci_rcar_download_firmware(struct usb_hcd * hcd)142 static int xhci_rcar_download_firmware(struct usb_hcd *hcd)
143 {
144 	struct device *dev = hcd->self.controller;
145 	void __iomem *regs = hcd->regs;
146 	struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd);
147 	const struct firmware *fw;
148 	int retval, index, j, time;
149 	int timeout = 10000;
150 	u32 data, val, temp;
151 	u32 quirks = 0;
152 	const struct soc_device_attribute *attr;
153 	const char *firmware_name;
154 
155 	attr = soc_device_match(rcar_quirks_match);
156 	if (attr)
157 		quirks = (uintptr_t)attr->data;
158 
159 	if (quirks & RCAR_XHCI_FIRMWARE_V2)
160 		firmware_name = XHCI_RCAR_FIRMWARE_NAME_V2;
161 	else if (quirks & RCAR_XHCI_FIRMWARE_V3)
162 		firmware_name = XHCI_RCAR_FIRMWARE_NAME_V3;
163 	else
164 		firmware_name = priv->firmware_name;
165 
166 	/* request R-Car USB3.0 firmware */
167 	retval = request_firmware(&fw, firmware_name, dev);
168 	if (retval)
169 		return retval;
170 
171 	/* download R-Car USB3.0 firmware */
172 	temp = readl(regs + RCAR_USB3_DL_CTRL);
173 	temp |= RCAR_USB3_DL_CTRL_ENABLE;
174 	writel(temp, regs + RCAR_USB3_DL_CTRL);
175 
176 	for (index = 0; index < fw->size; index += 4) {
177 		/* to avoid reading beyond the end of the buffer */
178 		for (data = 0, j = 3; j >= 0; j--) {
179 			if ((j + index) < fw->size)
180 				data |= fw->data[index + j] << (8 * j);
181 		}
182 		writel(data, regs + RCAR_USB3_FW_DATA0);
183 		temp = readl(regs + RCAR_USB3_DL_CTRL);
184 		temp |= RCAR_USB3_DL_CTRL_FW_SET_DATA0;
185 		writel(temp, regs + RCAR_USB3_DL_CTRL);
186 
187 		for (time = 0; time < timeout; time++) {
188 			val = readl(regs + RCAR_USB3_DL_CTRL);
189 			if ((val & RCAR_USB3_DL_CTRL_FW_SET_DATA0) == 0)
190 				break;
191 			udelay(1);
192 		}
193 		if (time == timeout) {
194 			retval = -ETIMEDOUT;
195 			break;
196 		}
197 	}
198 
199 	temp = readl(regs + RCAR_USB3_DL_CTRL);
200 	temp &= ~RCAR_USB3_DL_CTRL_ENABLE;
201 	writel(temp, regs + RCAR_USB3_DL_CTRL);
202 
203 	for (time = 0; time < timeout; time++) {
204 		val = readl(regs + RCAR_USB3_DL_CTRL);
205 		if (val & RCAR_USB3_DL_CTRL_FW_SUCCESS) {
206 			retval = 0;
207 			break;
208 		}
209 		udelay(1);
210 	}
211 	if (time == timeout)
212 		retval = -ETIMEDOUT;
213 
214 	release_firmware(fw);
215 
216 	return retval;
217 }
218 
219 /* This function needs to initialize a "phy" of usb before */
xhci_rcar_init_quirk(struct usb_hcd * hcd)220 int xhci_rcar_init_quirk(struct usb_hcd *hcd)
221 {
222 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
223 
224 	/* If hcd->regs is NULL, we don't just call the following function */
225 	if (!hcd->regs)
226 		return 0;
227 
228 	/*
229 	 * On R-Car Gen2 and Gen3, the AC64 bit (bit 0) of HCCPARAMS1 is set
230 	 * to 1. However, these SoCs don't support 64-bit address memory
231 	 * pointers. So, this driver clears the AC64 bit of xhci->hcc_params
232 	 * to call dma_set_coherent_mask(dev, DMA_BIT_MASK(32)) in
233 	 * xhci_gen_setup().
234 	 *
235 	 * And, since the firmware/internal CPU control the USBSTS.STS_HALT
236 	 * and the process speed is down when the roothub port enters U3,
237 	 * long delay for the handshake of STS_HALT is neeed in xhci_suspend().
238 	 */
239 	if (xhci_rcar_is_gen2(hcd->self.controller) ||
240 			xhci_rcar_is_gen3(hcd->self.controller)) {
241 		xhci->quirks |= XHCI_NO_64BIT_SUPPORT | XHCI_SLOW_SUSPEND;
242 	}
243 
244 	xhci->quirks |= XHCI_TRUST_TX_LENGTH;
245 	return xhci_rcar_download_firmware(hcd);
246 }
247 
xhci_rcar_resume_quirk(struct usb_hcd * hcd)248 int xhci_rcar_resume_quirk(struct usb_hcd *hcd)
249 {
250 	int ret;
251 
252 	ret = xhci_rcar_download_firmware(hcd);
253 	if (!ret)
254 		xhci_rcar_start(hcd);
255 
256 	return ret;
257 }
258