1/* 2 * Device Tree Source for AM4372 SoC 3 * 4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * This file is licensed under the terms of the GNU General Public License 7 * version 2. This program is licensed "as is" without any warranty of any 8 * kind, whether express or implied. 9 */ 10 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13 14/ { 15 compatible = "ti,am4372", "ti,am43"; 16 interrupt-parent = <&wakeupgen>; 17 #address-cells = <1>; 18 #size-cells = <1>; 19 chosen { }; 20 21 memory@0 { 22 device_type = "memory"; 23 reg = <0 0>; 24 }; 25 26 aliases { 27 i2c0 = &i2c0; 28 i2c1 = &i2c1; 29 i2c2 = &i2c2; 30 serial0 = &uart0; 31 serial1 = &uart1; 32 serial2 = &uart2; 33 serial3 = &uart3; 34 serial4 = &uart4; 35 serial5 = &uart5; 36 ethernet0 = &cpsw_emac0; 37 ethernet1 = &cpsw_emac1; 38 spi0 = &qspi; 39 }; 40 41 cpus { 42 #address-cells = <1>; 43 #size-cells = <0>; 44 cpu: cpu@0 { 45 compatible = "arm,cortex-a9"; 46 device_type = "cpu"; 47 reg = <0>; 48 49 clocks = <&dpll_mpu_ck>; 50 clock-names = "cpu"; 51 52 operating-points-v2 = <&cpu0_opp_table>; 53 54 clock-latency = <300000>; /* From omap-cpufreq driver */ 55 }; 56 }; 57 58 cpu0_opp_table: opp-table { 59 compatible = "operating-points-v2-ti-cpu"; 60 syscon = <&scm_conf>; 61 62 opp50-300000000 { 63 opp-hz = /bits/ 64 <300000000>; 64 opp-microvolt = <950000 931000 969000>; 65 opp-supported-hw = <0xFF 0x01>; 66 opp-suspend; 67 }; 68 69 opp100-600000000 { 70 opp-hz = /bits/ 64 <600000000>; 71 opp-microvolt = <1100000 1078000 1122000>; 72 opp-supported-hw = <0xFF 0x04>; 73 }; 74 75 opp120-720000000 { 76 opp-hz = /bits/ 64 <720000000>; 77 opp-microvolt = <1200000 1176000 1224000>; 78 opp-supported-hw = <0xFF 0x08>; 79 }; 80 81 oppturbo-800000000 { 82 opp-hz = /bits/ 64 <800000000>; 83 opp-microvolt = <1260000 1234800 1285200>; 84 opp-supported-hw = <0xFF 0x10>; 85 }; 86 87 oppnitro-1000000000 { 88 opp-hz = /bits/ 64 <1000000000>; 89 opp-microvolt = <1325000 1298500 1351500>; 90 opp-supported-hw = <0xFF 0x20>; 91 }; 92 }; 93 94 gic: interrupt-controller@48241000 { 95 compatible = "arm,cortex-a9-gic"; 96 interrupt-controller; 97 #interrupt-cells = <3>; 98 reg = <0x48241000 0x1000>, 99 <0x48240100 0x0100>; 100 interrupt-parent = <&gic>; 101 }; 102 103 wakeupgen: interrupt-controller@48281000 { 104 compatible = "ti,omap4-wugen-mpu"; 105 interrupt-controller; 106 #interrupt-cells = <3>; 107 reg = <0x48281000 0x1000>; 108 interrupt-parent = <&gic>; 109 }; 110 111 scu: scu@48240000 { 112 compatible = "arm,cortex-a9-scu"; 113 reg = <0x48240000 0x100>; 114 }; 115 116 global_timer: timer@48240200 { 117 compatible = "arm,cortex-a9-global-timer"; 118 reg = <0x48240200 0x100>; 119 interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>; 120 interrupt-parent = <&gic>; 121 clocks = <&mpu_periphclk>; 122 }; 123 124 local_timer: timer@48240600 { 125 compatible = "arm,cortex-a9-twd-timer"; 126 reg = <0x48240600 0x100>; 127 interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>; 128 interrupt-parent = <&gic>; 129 clocks = <&mpu_periphclk>; 130 }; 131 132 l2-cache-controller@48242000 { 133 compatible = "arm,pl310-cache"; 134 reg = <0x48242000 0x1000>; 135 cache-unified; 136 cache-level = <2>; 137 }; 138 139 ocp@44000000 { 140 compatible = "ti,am4372-l3-noc", "simple-bus"; 141 #address-cells = <1>; 142 #size-cells = <1>; 143 ranges; 144 ti,hwmods = "l3_main"; 145 reg = <0x44000000 0x400000 146 0x44800000 0x400000>; 147 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 148 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 149 150 l4_wkup: l4_wkup@44c00000 { 151 compatible = "ti,am4-l4-wkup", "simple-bus"; 152 #address-cells = <1>; 153 #size-cells = <1>; 154 ranges = <0 0x44c00000 0x287000>; 155 156 wkup_m3: wkup_m3@100000 { 157 compatible = "ti,am4372-wkup-m3"; 158 reg = <0x100000 0x4000>, 159 <0x180000 0x2000>; 160 reg-names = "umem", "dmem"; 161 ti,hwmods = "wkup_m3"; 162 ti,pm-firmware = "am335x-pm-firmware.elf"; 163 }; 164 165 prcm: prcm@1f0000 { 166 compatible = "ti,am4-prcm"; 167 reg = <0x1f0000 0x11000>; 168 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 169 170 prcm_clocks: clocks { 171 #address-cells = <1>; 172 #size-cells = <0>; 173 }; 174 175 prcm_clockdomains: clockdomains { 176 }; 177 }; 178 179 scm: scm@210000 { 180 compatible = "ti,am4-scm", "simple-bus"; 181 reg = <0x210000 0x4000>; 182 #address-cells = <1>; 183 #size-cells = <1>; 184 ranges = <0 0x210000 0x4000>; 185 186 am43xx_pinmux: pinmux@800 { 187 compatible = "ti,am437-padconf", 188 "pinctrl-single"; 189 reg = <0x800 0x31c>; 190 #address-cells = <1>; 191 #size-cells = <0>; 192 #pinctrl-cells = <1>; 193 #interrupt-cells = <1>; 194 interrupt-controller; 195 pinctrl-single,register-width = <32>; 196 pinctrl-single,function-mask = <0xffffffff>; 197 }; 198 199 scm_conf: scm_conf@0 { 200 compatible = "syscon"; 201 reg = <0x0 0x800>; 202 #address-cells = <1>; 203 #size-cells = <1>; 204 205 scm_clocks: clocks { 206 #address-cells = <1>; 207 #size-cells = <0>; 208 }; 209 }; 210 211 wkup_m3_ipc: wkup_m3_ipc@1324 { 212 compatible = "ti,am4372-wkup-m3-ipc"; 213 reg = <0x1324 0x44>; 214 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 215 ti,rproc = <&wkup_m3>; 216 mboxes = <&mailbox &mbox_wkupm3>; 217 }; 218 219 edma_xbar: dma-router@f90 { 220 compatible = "ti,am335x-edma-crossbar"; 221 reg = <0xf90 0x40>; 222 #dma-cells = <3>; 223 dma-requests = <64>; 224 dma-masters = <&edma>; 225 }; 226 227 scm_clockdomains: clockdomains { 228 }; 229 }; 230 }; 231 232 emif: emif@4c000000 { 233 compatible = "ti,emif-am4372"; 234 reg = <0x4c000000 0x1000000>; 235 ti,hwmods = "emif"; 236 }; 237 238 edma: edma@49000000 { 239 compatible = "ti,edma3-tpcc"; 240 ti,hwmods = "tpcc"; 241 reg = <0x49000000 0x10000>; 242 reg-names = "edma3_cc"; 243 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 244 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 245 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 246 interrupt-names = "edma3_ccint", "edma3_mperr", 247 "edma3_ccerrint"; 248 dma-requests = <64>; 249 #dma-cells = <2>; 250 251 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>, 252 <&edma_tptc2 0>; 253 254 ti,edma-memcpy-channels = <58 59>; 255 }; 256 257 edma_tptc0: tptc@49800000 { 258 compatible = "ti,edma3-tptc"; 259 ti,hwmods = "tptc0"; 260 reg = <0x49800000 0x100000>; 261 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 262 interrupt-names = "edma3_tcerrint"; 263 }; 264 265 edma_tptc1: tptc@49900000 { 266 compatible = "ti,edma3-tptc"; 267 ti,hwmods = "tptc1"; 268 reg = <0x49900000 0x100000>; 269 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 270 interrupt-names = "edma3_tcerrint"; 271 }; 272 273 edma_tptc2: tptc@49a00000 { 274 compatible = "ti,edma3-tptc"; 275 ti,hwmods = "tptc2"; 276 reg = <0x49a00000 0x100000>; 277 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 278 interrupt-names = "edma3_tcerrint"; 279 }; 280 281 uart0: serial@44e09000 { 282 compatible = "ti,am4372-uart","ti,omap2-uart"; 283 reg = <0x44e09000 0x2000>; 284 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 285 ti,hwmods = "uart1"; 286 }; 287 288 uart1: serial@48022000 { 289 compatible = "ti,am4372-uart","ti,omap2-uart"; 290 reg = <0x48022000 0x2000>; 291 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 292 ti,hwmods = "uart2"; 293 status = "disabled"; 294 }; 295 296 uart2: serial@48024000 { 297 compatible = "ti,am4372-uart","ti,omap2-uart"; 298 reg = <0x48024000 0x2000>; 299 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 300 ti,hwmods = "uart3"; 301 status = "disabled"; 302 }; 303 304 uart3: serial@481a6000 { 305 compatible = "ti,am4372-uart","ti,omap2-uart"; 306 reg = <0x481a6000 0x2000>; 307 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 308 ti,hwmods = "uart4"; 309 status = "disabled"; 310 }; 311 312 uart4: serial@481a8000 { 313 compatible = "ti,am4372-uart","ti,omap2-uart"; 314 reg = <0x481a8000 0x2000>; 315 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 316 ti,hwmods = "uart5"; 317 status = "disabled"; 318 }; 319 320 uart5: serial@481aa000 { 321 compatible = "ti,am4372-uart","ti,omap2-uart"; 322 reg = <0x481aa000 0x2000>; 323 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 324 ti,hwmods = "uart6"; 325 status = "disabled"; 326 }; 327 328 mailbox: mailbox@480C8000 { 329 compatible = "ti,omap4-mailbox"; 330 reg = <0x480C8000 0x200>; 331 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 332 ti,hwmods = "mailbox"; 333 #mbox-cells = <1>; 334 ti,mbox-num-users = <4>; 335 ti,mbox-num-fifos = <8>; 336 mbox_wkupm3: wkup_m3 { 337 ti,mbox-send-noirq; 338 ti,mbox-tx = <0 0 0>; 339 ti,mbox-rx = <0 0 3>; 340 }; 341 }; 342 343 timer1: timer@44e31000 { 344 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms"; 345 reg = <0x44e31000 0x400>; 346 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 347 ti,timer-alwon; 348 ti,hwmods = "timer1"; 349 }; 350 351 timer2: timer@48040000 { 352 compatible = "ti,am4372-timer","ti,am335x-timer"; 353 reg = <0x48040000 0x400>; 354 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 355 ti,hwmods = "timer2"; 356 }; 357 358 timer3: timer@48042000 { 359 compatible = "ti,am4372-timer","ti,am335x-timer"; 360 reg = <0x48042000 0x400>; 361 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 362 ti,hwmods = "timer3"; 363 status = "disabled"; 364 }; 365 366 timer4: timer@48044000 { 367 compatible = "ti,am4372-timer","ti,am335x-timer"; 368 reg = <0x48044000 0x400>; 369 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 370 ti,timer-pwm; 371 ti,hwmods = "timer4"; 372 status = "disabled"; 373 }; 374 375 timer5: timer@48046000 { 376 compatible = "ti,am4372-timer","ti,am335x-timer"; 377 reg = <0x48046000 0x400>; 378 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 379 ti,timer-pwm; 380 ti,hwmods = "timer5"; 381 status = "disabled"; 382 }; 383 384 timer6: timer@48048000 { 385 compatible = "ti,am4372-timer","ti,am335x-timer"; 386 reg = <0x48048000 0x400>; 387 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 388 ti,timer-pwm; 389 ti,hwmods = "timer6"; 390 status = "disabled"; 391 }; 392 393 timer7: timer@4804a000 { 394 compatible = "ti,am4372-timer","ti,am335x-timer"; 395 reg = <0x4804a000 0x400>; 396 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; 397 ti,timer-pwm; 398 ti,hwmods = "timer7"; 399 status = "disabled"; 400 }; 401 402 timer8: timer@481c1000 { 403 compatible = "ti,am4372-timer","ti,am335x-timer"; 404 reg = <0x481c1000 0x400>; 405 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; 406 ti,hwmods = "timer8"; 407 status = "disabled"; 408 }; 409 410 timer9: timer@4833d000 { 411 compatible = "ti,am4372-timer","ti,am335x-timer"; 412 reg = <0x4833d000 0x400>; 413 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; 414 ti,hwmods = "timer9"; 415 status = "disabled"; 416 }; 417 418 timer10: timer@4833f000 { 419 compatible = "ti,am4372-timer","ti,am335x-timer"; 420 reg = <0x4833f000 0x400>; 421 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 422 ti,hwmods = "timer10"; 423 status = "disabled"; 424 }; 425 426 timer11: timer@48341000 { 427 compatible = "ti,am4372-timer","ti,am335x-timer"; 428 reg = <0x48341000 0x400>; 429 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; 430 ti,hwmods = "timer11"; 431 status = "disabled"; 432 }; 433 434 counter32k: counter@44e86000 { 435 compatible = "ti,am4372-counter32k","ti,omap-counter32k"; 436 reg = <0x44e86000 0x40>; 437 ti,hwmods = "counter_32k"; 438 }; 439 440 rtc: rtc@44e3e000 { 441 compatible = "ti,am4372-rtc", "ti,am3352-rtc", 442 "ti,da830-rtc"; 443 reg = <0x44e3e000 0x1000>; 444 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH 445 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 446 ti,hwmods = "rtc"; 447 clocks = <&clk_32768_ck>; 448 clock-names = "int-clk"; 449 status = "disabled"; 450 }; 451 452 wdt: wdt@44e35000 { 453 compatible = "ti,am4372-wdt","ti,omap3-wdt"; 454 reg = <0x44e35000 0x1000>; 455 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 456 ti,hwmods = "wd_timer2"; 457 }; 458 459 gpio0: gpio@44e07000 { 460 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 461 reg = <0x44e07000 0x1000>; 462 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 463 gpio-controller; 464 #gpio-cells = <2>; 465 interrupt-controller; 466 #interrupt-cells = <2>; 467 ti,hwmods = "gpio1"; 468 status = "disabled"; 469 }; 470 471 gpio1: gpio@4804c000 { 472 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 473 reg = <0x4804c000 0x1000>; 474 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 475 gpio-controller; 476 #gpio-cells = <2>; 477 interrupt-controller; 478 #interrupt-cells = <2>; 479 ti,hwmods = "gpio2"; 480 status = "disabled"; 481 }; 482 483 gpio2: gpio@481ac000 { 484 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 485 reg = <0x481ac000 0x1000>; 486 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 487 gpio-controller; 488 #gpio-cells = <2>; 489 interrupt-controller; 490 #interrupt-cells = <2>; 491 ti,hwmods = "gpio3"; 492 status = "disabled"; 493 }; 494 495 gpio3: gpio@481ae000 { 496 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 497 reg = <0x481ae000 0x1000>; 498 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 499 gpio-controller; 500 #gpio-cells = <2>; 501 interrupt-controller; 502 #interrupt-cells = <2>; 503 ti,hwmods = "gpio4"; 504 status = "disabled"; 505 }; 506 507 gpio4: gpio@48320000 { 508 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 509 reg = <0x48320000 0x1000>; 510 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 511 gpio-controller; 512 #gpio-cells = <2>; 513 interrupt-controller; 514 #interrupt-cells = <2>; 515 ti,hwmods = "gpio5"; 516 status = "disabled"; 517 }; 518 519 gpio5: gpio@48322000 { 520 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 521 reg = <0x48322000 0x1000>; 522 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 523 gpio-controller; 524 #gpio-cells = <2>; 525 interrupt-controller; 526 #interrupt-cells = <2>; 527 ti,hwmods = "gpio6"; 528 status = "disabled"; 529 }; 530 531 hwspinlock: spinlock@480ca000 { 532 compatible = "ti,omap4-hwspinlock"; 533 reg = <0x480ca000 0x1000>; 534 ti,hwmods = "spinlock"; 535 #hwlock-cells = <1>; 536 }; 537 538 i2c0: i2c@44e0b000 { 539 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 540 reg = <0x44e0b000 0x1000>; 541 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 542 ti,hwmods = "i2c1"; 543 #address-cells = <1>; 544 #size-cells = <0>; 545 status = "disabled"; 546 }; 547 548 i2c1: i2c@4802a000 { 549 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 550 reg = <0x4802a000 0x1000>; 551 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 552 ti,hwmods = "i2c2"; 553 #address-cells = <1>; 554 #size-cells = <0>; 555 status = "disabled"; 556 }; 557 558 i2c2: i2c@4819c000 { 559 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 560 reg = <0x4819c000 0x1000>; 561 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 562 ti,hwmods = "i2c3"; 563 #address-cells = <1>; 564 #size-cells = <0>; 565 status = "disabled"; 566 }; 567 568 spi0: spi@48030000 { 569 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 570 reg = <0x48030000 0x400>; 571 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 572 ti,hwmods = "spi0"; 573 #address-cells = <1>; 574 #size-cells = <0>; 575 status = "disabled"; 576 }; 577 578 mmc1: mmc@48060000 { 579 compatible = "ti,omap4-hsmmc"; 580 reg = <0x48060000 0x1000>; 581 ti,hwmods = "mmc1"; 582 ti,dual-volt; 583 ti,needs-special-reset; 584 dmas = <&edma 24 0>, 585 <&edma 25 0>; 586 dma-names = "tx", "rx"; 587 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 588 status = "disabled"; 589 }; 590 591 mmc2: mmc@481d8000 { 592 compatible = "ti,omap4-hsmmc"; 593 reg = <0x481d8000 0x1000>; 594 ti,hwmods = "mmc2"; 595 ti,needs-special-reset; 596 dmas = <&edma 2 0>, 597 <&edma 3 0>; 598 dma-names = "tx", "rx"; 599 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 600 status = "disabled"; 601 }; 602 603 mmc3: mmc@47810000 { 604 compatible = "ti,omap4-hsmmc"; 605 reg = <0x47810000 0x1000>; 606 ti,hwmods = "mmc3"; 607 ti,needs-special-reset; 608 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 609 status = "disabled"; 610 }; 611 612 spi1: spi@481a0000 { 613 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 614 reg = <0x481a0000 0x400>; 615 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 616 ti,hwmods = "spi1"; 617 #address-cells = <1>; 618 #size-cells = <0>; 619 status = "disabled"; 620 }; 621 622 spi2: spi@481a2000 { 623 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 624 reg = <0x481a2000 0x400>; 625 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; 626 ti,hwmods = "spi2"; 627 #address-cells = <1>; 628 #size-cells = <0>; 629 status = "disabled"; 630 }; 631 632 spi3: spi@481a4000 { 633 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 634 reg = <0x481a4000 0x400>; 635 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; 636 ti,hwmods = "spi3"; 637 #address-cells = <1>; 638 #size-cells = <0>; 639 status = "disabled"; 640 }; 641 642 spi4: spi@48345000 { 643 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 644 reg = <0x48345000 0x400>; 645 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; 646 ti,hwmods = "spi4"; 647 #address-cells = <1>; 648 #size-cells = <0>; 649 status = "disabled"; 650 }; 651 652 mac: ethernet@4a100000 { 653 compatible = "ti,am4372-cpsw","ti,cpsw"; 654 reg = <0x4a100000 0x800 655 0x4a101200 0x100>; 656 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH 657 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH 658 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 659 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 660 #address-cells = <1>; 661 #size-cells = <1>; 662 ti,hwmods = "cpgmac0"; 663 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>, 664 <&dpll_clksel_mac_clk>; 665 clock-names = "fck", "cpts", "50mclk"; 666 assigned-clocks = <&dpll_clksel_mac_clk>; 667 assigned-clock-rates = <50000000>; 668 status = "disabled"; 669 cpdma_channels = <8>; 670 ale_entries = <1024>; 671 bd_ram_size = <0x2000>; 672 mac_control = <0x20>; 673 slaves = <2>; 674 active_slave = <0>; 675 cpts_clock_mult = <0x80000000>; 676 cpts_clock_shift = <29>; 677 ranges; 678 syscon = <&scm_conf>; 679 680 davinci_mdio: mdio@4a101000 { 681 compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio"; 682 reg = <0x4a101000 0x100>; 683 #address-cells = <1>; 684 #size-cells = <0>; 685 ti,hwmods = "davinci_mdio"; 686 bus_freq = <1000000>; 687 status = "disabled"; 688 }; 689 690 cpsw_emac0: slave@4a100200 { 691 /* Filled in by U-Boot */ 692 mac-address = [ 00 00 00 00 00 00 ]; 693 }; 694 695 cpsw_emac1: slave@4a100300 { 696 /* Filled in by U-Boot */ 697 mac-address = [ 00 00 00 00 00 00 ]; 698 }; 699 700 phy_sel: cpsw-phy-sel@44e10650 { 701 compatible = "ti,am43xx-cpsw-phy-sel"; 702 reg= <0x44e10650 0x4>; 703 reg-names = "gmii-sel"; 704 }; 705 }; 706 707 epwmss0: epwmss@48300000 { 708 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 709 reg = <0x48300000 0x10>; 710 #address-cells = <1>; 711 #size-cells = <1>; 712 ranges; 713 ti,hwmods = "epwmss0"; 714 status = "disabled"; 715 716 ecap0: ecap@48300100 { 717 compatible = "ti,am4372-ecap", 718 "ti,am3352-ecap", 719 "ti,am33xx-ecap"; 720 #pwm-cells = <3>; 721 reg = <0x48300100 0x80>; 722 clocks = <&l4ls_gclk>; 723 clock-names = "fck"; 724 status = "disabled"; 725 }; 726 727 ehrpwm0: pwm@48300200 { 728 compatible = "ti,am4372-ehrpwm", 729 "ti,am3352-ehrpwm", 730 "ti,am33xx-ehrpwm"; 731 #pwm-cells = <3>; 732 reg = <0x48300200 0x80>; 733 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>; 734 clock-names = "tbclk", "fck"; 735 status = "disabled"; 736 }; 737 }; 738 739 epwmss1: epwmss@48302000 { 740 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 741 reg = <0x48302000 0x10>; 742 #address-cells = <1>; 743 #size-cells = <1>; 744 ranges; 745 ti,hwmods = "epwmss1"; 746 status = "disabled"; 747 748 ecap1: ecap@48302100 { 749 compatible = "ti,am4372-ecap", 750 "ti,am3352-ecap", 751 "ti,am33xx-ecap"; 752 #pwm-cells = <3>; 753 reg = <0x48302100 0x80>; 754 clocks = <&l4ls_gclk>; 755 clock-names = "fck"; 756 status = "disabled"; 757 }; 758 759 ehrpwm1: pwm@48302200 { 760 compatible = "ti,am4372-ehrpwm", 761 "ti,am3352-ehrpwm", 762 "ti,am33xx-ehrpwm"; 763 #pwm-cells = <3>; 764 reg = <0x48302200 0x80>; 765 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>; 766 clock-names = "tbclk", "fck"; 767 status = "disabled"; 768 }; 769 }; 770 771 epwmss2: epwmss@48304000 { 772 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 773 reg = <0x48304000 0x10>; 774 #address-cells = <1>; 775 #size-cells = <1>; 776 ranges; 777 ti,hwmods = "epwmss2"; 778 status = "disabled"; 779 780 ecap2: ecap@48304100 { 781 compatible = "ti,am4372-ecap", 782 "ti,am3352-ecap", 783 "ti,am33xx-ecap"; 784 #pwm-cells = <3>; 785 reg = <0x48304100 0x80>; 786 clocks = <&l4ls_gclk>; 787 clock-names = "fck"; 788 status = "disabled"; 789 }; 790 791 ehrpwm2: pwm@48304200 { 792 compatible = "ti,am4372-ehrpwm", 793 "ti,am3352-ehrpwm", 794 "ti,am33xx-ehrpwm"; 795 #pwm-cells = <3>; 796 reg = <0x48304200 0x80>; 797 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>; 798 clock-names = "tbclk", "fck"; 799 status = "disabled"; 800 }; 801 }; 802 803 epwmss3: epwmss@48306000 { 804 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 805 reg = <0x48306000 0x10>; 806 #address-cells = <1>; 807 #size-cells = <1>; 808 ranges; 809 ti,hwmods = "epwmss3"; 810 status = "disabled"; 811 812 ehrpwm3: pwm@48306200 { 813 compatible = "ti,am4372-ehrpwm", 814 "ti,am3352-ehrpwm", 815 "ti,am33xx-ehrpwm"; 816 #pwm-cells = <3>; 817 reg = <0x48306200 0x80>; 818 clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>; 819 clock-names = "tbclk", "fck"; 820 status = "disabled"; 821 }; 822 }; 823 824 epwmss4: epwmss@48308000 { 825 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 826 reg = <0x48308000 0x10>; 827 #address-cells = <1>; 828 #size-cells = <1>; 829 ranges; 830 ti,hwmods = "epwmss4"; 831 status = "disabled"; 832 833 ehrpwm4: pwm@48308200 { 834 compatible = "ti,am4372-ehrpwm", 835 "ti,am3352-ehrpwm", 836 "ti,am33xx-ehrpwm"; 837 #pwm-cells = <3>; 838 reg = <0x48308200 0x80>; 839 clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>; 840 clock-names = "tbclk", "fck"; 841 status = "disabled"; 842 }; 843 }; 844 845 epwmss5: epwmss@4830a000 { 846 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 847 reg = <0x4830a000 0x10>; 848 #address-cells = <1>; 849 #size-cells = <1>; 850 ranges; 851 ti,hwmods = "epwmss5"; 852 status = "disabled"; 853 854 ehrpwm5: pwm@4830a200 { 855 compatible = "ti,am4372-ehrpwm", 856 "ti,am3352-ehrpwm", 857 "ti,am33xx-ehrpwm"; 858 #pwm-cells = <3>; 859 reg = <0x4830a200 0x80>; 860 clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>; 861 clock-names = "tbclk", "fck"; 862 status = "disabled"; 863 }; 864 }; 865 866 tscadc: tscadc@44e0d000 { 867 compatible = "ti,am3359-tscadc"; 868 reg = <0x44e0d000 0x1000>; 869 ti,hwmods = "adc_tsc"; 870 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 871 clocks = <&adc_tsc_fck>; 872 clock-names = "fck"; 873 status = "disabled"; 874 dmas = <&edma 53 0>, <&edma 57 0>; 875 dma-names = "fifo0", "fifo1"; 876 877 tsc { 878 compatible = "ti,am3359-tsc"; 879 }; 880 881 adc { 882 #io-channel-cells = <1>; 883 compatible = "ti,am3359-adc"; 884 }; 885 886 }; 887 888 sham: sham@53100000 { 889 compatible = "ti,omap5-sham"; 890 ti,hwmods = "sham"; 891 reg = <0x53100000 0x300>; 892 dmas = <&edma 36 0>; 893 dma-names = "rx"; 894 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 895 }; 896 897 aes: aes@53501000 { 898 compatible = "ti,omap4-aes"; 899 ti,hwmods = "aes"; 900 reg = <0x53501000 0xa0>; 901 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 902 dmas = <&edma 6 0>, 903 <&edma 5 0>; 904 dma-names = "tx", "rx"; 905 }; 906 907 des: des@53701000 { 908 compatible = "ti,omap4-des"; 909 ti,hwmods = "des"; 910 reg = <0x53701000 0xa0>; 911 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 912 dmas = <&edma 34 0>, 913 <&edma 33 0>; 914 dma-names = "tx", "rx"; 915 }; 916 917 rng: rng@48310000 { 918 compatible = "ti,omap4-rng"; 919 ti,hwmods = "rng"; 920 reg = <0x48310000 0x2000>; 921 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 922 }; 923 924 mcasp0: mcasp@48038000 { 925 compatible = "ti,am33xx-mcasp-audio"; 926 ti,hwmods = "mcasp0"; 927 reg = <0x48038000 0x2000>, 928 <0x46000000 0x400000>; 929 reg-names = "mpu", "dat"; 930 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 931 <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 932 interrupt-names = "tx", "rx"; 933 status = "disabled"; 934 dmas = <&edma 8 2>, 935 <&edma 9 2>; 936 dma-names = "tx", "rx"; 937 }; 938 939 mcasp1: mcasp@4803C000 { 940 compatible = "ti,am33xx-mcasp-audio"; 941 ti,hwmods = "mcasp1"; 942 reg = <0x4803C000 0x2000>, 943 <0x46400000 0x400000>; 944 reg-names = "mpu", "dat"; 945 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 946 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 947 interrupt-names = "tx", "rx"; 948 status = "disabled"; 949 dmas = <&edma 10 2>, 950 <&edma 11 2>; 951 dma-names = "tx", "rx"; 952 }; 953 954 elm: elm@48080000 { 955 compatible = "ti,am3352-elm"; 956 reg = <0x48080000 0x2000>; 957 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 958 ti,hwmods = "elm"; 959 clocks = <&l4ls_gclk>; 960 clock-names = "fck"; 961 status = "disabled"; 962 }; 963 964 gpmc: gpmc@50000000 { 965 compatible = "ti,am3352-gpmc"; 966 ti,hwmods = "gpmc"; 967 dmas = <&edma 52 0>; 968 dma-names = "rxtx"; 969 clocks = <&l3s_gclk>; 970 clock-names = "fck"; 971 reg = <0x50000000 0x2000>; 972 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 973 gpmc,num-cs = <7>; 974 gpmc,num-waitpins = <2>; 975 #address-cells = <2>; 976 #size-cells = <1>; 977 interrupt-controller; 978 #interrupt-cells = <2>; 979 gpio-controller; 980 #gpio-cells = <2>; 981 status = "disabled"; 982 }; 983 984 ocp2scp0: ocp2scp@483a8000 { 985 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; 986 #address-cells = <1>; 987 #size-cells = <1>; 988 ranges; 989 ti,hwmods = "ocp2scp0"; 990 991 usb2_phy1: phy@483a8000 { 992 compatible = "ti,am437x-usb2"; 993 reg = <0x483a8000 0x8000>; 994 syscon-phy-power = <&scm_conf 0x620>; 995 clocks = <&usb_phy0_always_on_clk32k>, 996 <&usb_otg_ss0_refclk960m>; 997 clock-names = "wkupclk", "refclk"; 998 #phy-cells = <0>; 999 status = "disabled"; 1000 }; 1001 }; 1002 1003 ocp2scp1: ocp2scp@483e8000 { 1004 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; 1005 #address-cells = <1>; 1006 #size-cells = <1>; 1007 ranges; 1008 ti,hwmods = "ocp2scp1"; 1009 1010 usb2_phy2: phy@483e8000 { 1011 compatible = "ti,am437x-usb2"; 1012 reg = <0x483e8000 0x8000>; 1013 syscon-phy-power = <&scm_conf 0x628>; 1014 clocks = <&usb_phy1_always_on_clk32k>, 1015 <&usb_otg_ss1_refclk960m>; 1016 clock-names = "wkupclk", "refclk"; 1017 #phy-cells = <0>; 1018 status = "disabled"; 1019 }; 1020 }; 1021 1022 dwc3_1: omap_dwc3@48380000 { 1023 compatible = "ti,am437x-dwc3"; 1024 ti,hwmods = "usb_otg_ss0"; 1025 reg = <0x48380000 0x10000>; 1026 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 1027 #address-cells = <1>; 1028 #size-cells = <1>; 1029 utmi-mode = <1>; 1030 ranges; 1031 1032 usb1: usb@48390000 { 1033 compatible = "synopsys,dwc3"; 1034 reg = <0x48390000 0x10000>; 1035 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, 1037 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 1038 interrupt-names = "peripheral", 1039 "host", 1040 "otg"; 1041 phys = <&usb2_phy1>; 1042 phy-names = "usb2-phy"; 1043 maximum-speed = "high-speed"; 1044 dr_mode = "otg"; 1045 status = "disabled"; 1046 snps,dis_u3_susphy_quirk; 1047 snps,dis_u2_susphy_quirk; 1048 }; 1049 }; 1050 1051 dwc3_2: omap_dwc3@483c0000 { 1052 compatible = "ti,am437x-dwc3"; 1053 ti,hwmods = "usb_otg_ss1"; 1054 reg = <0x483c0000 0x10000>; 1055 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 1056 #address-cells = <1>; 1057 #size-cells = <1>; 1058 utmi-mode = <1>; 1059 ranges; 1060 1061 usb2: usb@483d0000 { 1062 compatible = "synopsys,dwc3"; 1063 reg = <0x483d0000 0x10000>; 1064 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>, 1065 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>, 1066 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 1067 interrupt-names = "peripheral", 1068 "host", 1069 "otg"; 1070 phys = <&usb2_phy2>; 1071 phy-names = "usb2-phy"; 1072 maximum-speed = "high-speed"; 1073 dr_mode = "otg"; 1074 status = "disabled"; 1075 snps,dis_u3_susphy_quirk; 1076 snps,dis_u2_susphy_quirk; 1077 }; 1078 }; 1079 1080 qspi: qspi@47900000 { 1081 compatible = "ti,am4372-qspi"; 1082 reg = <0x47900000 0x100>, 1083 <0x30000000 0x4000000>; 1084 reg-names = "qspi_base", "qspi_mmap"; 1085 #address-cells = <1>; 1086 #size-cells = <0>; 1087 ti,hwmods = "qspi"; 1088 interrupts = <0 138 0x4>; 1089 num-cs = <4>; 1090 status = "disabled"; 1091 }; 1092 1093 hdq: hdq@48347000 { 1094 compatible = "ti,am4372-hdq"; 1095 reg = <0x48347000 0x1000>; 1096 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 1097 clocks = <&func_12m_clk>; 1098 clock-names = "fck"; 1099 ti,hwmods = "hdq1w"; 1100 status = "disabled"; 1101 }; 1102 1103 dss: dss@4832a000 { 1104 compatible = "ti,omap3-dss"; 1105 reg = <0x4832a000 0x200>; 1106 status = "disabled"; 1107 ti,hwmods = "dss_core"; 1108 clocks = <&disp_clk>; 1109 clock-names = "fck"; 1110 #address-cells = <1>; 1111 #size-cells = <1>; 1112 ranges; 1113 1114 dispc: dispc@4832a400 { 1115 compatible = "ti,omap3-dispc"; 1116 reg = <0x4832a400 0x400>; 1117 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1118 ti,hwmods = "dss_dispc"; 1119 clocks = <&disp_clk>; 1120 clock-names = "fck"; 1121 1122 max-memory-bandwidth = <230000000>; 1123 }; 1124 1125 rfbi: rfbi@4832a800 { 1126 compatible = "ti,omap3-rfbi"; 1127 reg = <0x4832a800 0x100>; 1128 ti,hwmods = "dss_rfbi"; 1129 clocks = <&disp_clk>; 1130 clock-names = "fck"; 1131 status = "disabled"; 1132 }; 1133 }; 1134 1135 ocmcram: ocmcram@40300000 { 1136 compatible = "mmio-sram"; 1137 reg = <0x40300000 0x40000>; /* 256k */ 1138 }; 1139 1140 dcan0: can@481cc000 { 1141 compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 1142 ti,hwmods = "d_can0"; 1143 clocks = <&dcan0_fck>; 1144 clock-names = "fck"; 1145 reg = <0x481cc000 0x2000>; 1146 syscon-raminit = <&scm_conf 0x644 0>; 1147 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; 1148 status = "disabled"; 1149 }; 1150 1151 dcan1: can@481d0000 { 1152 compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 1153 ti,hwmods = "d_can1"; 1154 clocks = <&dcan1_fck>; 1155 clock-names = "fck"; 1156 reg = <0x481d0000 0x2000>; 1157 syscon-raminit = <&scm_conf 0x644 1>; 1158 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 1159 status = "disabled"; 1160 }; 1161 1162 vpfe0: vpfe@48326000 { 1163 compatible = "ti,am437x-vpfe"; 1164 reg = <0x48326000 0x2000>; 1165 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 1166 ti,hwmods = "vpfe0"; 1167 status = "disabled"; 1168 }; 1169 1170 vpfe1: vpfe@48328000 { 1171 compatible = "ti,am437x-vpfe"; 1172 reg = <0x48328000 0x2000>; 1173 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 1174 ti,hwmods = "vpfe1"; 1175 status = "disabled"; 1176 }; 1177 }; 1178}; 1179 1180/include/ "am43xx-clocks.dtsi" 1181