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1/*
2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/* AM437x SK EVM */
10
11/dts-v1/;
12
13#include "am4372.dtsi"
14#include <dt-bindings/pinctrl/am43xx.h>
15#include <dt-bindings/pwm/pwm.h>
16#include <dt-bindings/gpio/gpio.h>
17#include <dt-bindings/input/input.h>
18
19/ {
20	model = "TI AM437x SK EVM";
21	compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";
22
23	aliases {
24		display0 = &lcd0;
25	};
26
27	chosen {
28		stdout-path = &uart0;
29	};
30
31	/* fixed 32k external oscillator clock */
32	clk_32k_rtc: clk_32k_rtc {
33		#clock-cells = <0>;
34		compatible = "fixed-clock";
35		clock-frequency = <32768>;
36	};
37
38	backlight {
39		compatible = "pwm-backlight";
40		pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
41		brightness-levels = <0 51 53 56 62 75 101 152 255>;
42		default-brightness-level = <8>;
43	};
44
45	sound {
46		compatible = "simple-audio-card";
47		simple-audio-card,name = "AM437x-SK-EVM";
48		simple-audio-card,widgets =
49			"Headphone", "Headphone Jack",
50			"Line", "Line In";
51		simple-audio-card,routing =
52			"Headphone Jack",	"HPLOUT",
53			"Headphone Jack",	"HPROUT",
54			"LINE1L",		"Line In",
55			"LINE1R",		"Line In";
56		simple-audio-card,format = "dsp_b";
57		simple-audio-card,bitclock-master = <&sound_master>;
58		simple-audio-card,frame-master = <&sound_master>;
59		simple-audio-card,bitclock-inversion;
60
61		simple-audio-card,cpu {
62			sound-dai = <&mcasp1>;
63		};
64
65		sound_master: simple-audio-card,codec {
66			sound-dai = <&tlv320aic3106>;
67			system-clock-frequency = <24000000>;
68		};
69	};
70
71	matrix_keypad: matrix_keypad0 {
72		compatible = "gpio-matrix-keypad";
73
74		pinctrl-names = "default";
75		pinctrl-0 = <&matrix_keypad_pins>;
76
77		debounce-delay-ms = <5>;
78		col-scan-delay-us = <5>;
79
80		row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH		/* Bank5, pin5 */
81				&gpio5 6 GPIO_ACTIVE_HIGH>;	/* Bank5, pin6 */
82
83		col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH		/* Bank5, pin13 */
84				&gpio5 4 GPIO_ACTIVE_HIGH>;	/* Bank5, pin4 */
85
86		linux,keymap = <
87				MATRIX_KEY(0, 0, KEY_DOWN)
88				MATRIX_KEY(0, 1, KEY_RIGHT)
89				MATRIX_KEY(1, 0, KEY_LEFT)
90				MATRIX_KEY(1, 1, KEY_UP)
91			>;
92	};
93
94	leds {
95		compatible = "gpio-leds";
96
97		pinctrl-names = "default";
98		pinctrl-0 = <&leds_pins>;
99
100		led0 {
101			label = "am437x-sk:red:heartbeat";
102			gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>;	/* Bank 5, pin 0 */
103			linux,default-trigger = "heartbeat";
104			default-state = "off";
105		};
106
107		led1 {
108			label = "am437x-sk:green:mmc1";
109			gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;	/* Bank 5, pin 1 */
110			linux,default-trigger = "mmc0";
111			default-state = "off";
112		};
113
114		led2 {
115			label = "am437x-sk:blue:cpu0";
116			gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;	/* Bank 5, pin 2 */
117			linux,default-trigger = "cpu0";
118			default-state = "off";
119		};
120
121		led3 {
122			label = "am437x-sk:blue:usr3";
123			gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;	/* Bank 5, pin 3 */
124			default-state = "off";
125		};
126	};
127
128	lcd0: display {
129		compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
130		label = "lcd";
131
132		pinctrl-names = "default";
133		pinctrl-0 = <&lcd_pins>;
134
135		enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
136
137		panel-timing {
138			clock-frequency = <9000000>;
139			hactive = <480>;
140			vactive = <272>;
141			hfront-porch = <2>;
142			hback-porch = <2>;
143			hsync-len = <41>;
144			vfront-porch = <2>;
145			vback-porch = <2>;
146			vsync-len = <10>;
147			hsync-active = <0>;
148			vsync-active = <0>;
149			de-active = <1>;
150			pixelclk-active = <1>;
151		};
152
153		port {
154			lcd_in: endpoint {
155				remote-endpoint = <&dpi_out>;
156			};
157		};
158	};
159};
160
161&am43xx_pinmux {
162	matrix_keypad_pins: matrix_keypad_pins {
163		pinctrl-single,pins = <
164			AM4372_IOPAD(0xa4c, PIN_OUTPUT | MUX_MODE7)	/* gpio5_13.gpio5_13 */
165			AM4372_IOPAD(0xa50, PIN_OUTPUT | MUX_MODE7)	/* spi4_sclk.gpio5_4 */
166			AM4372_IOPAD(0xa54, PIN_INPUT | MUX_MODE7)	/* spi4_d0.gpio5_5 */
167			AM4372_IOPAD(0xa58, PIN_INPUT | MUX_MODE7)	/* spi4_d1.gpio5_5 */
168		>;
169	};
170
171	leds_pins: leds_pins {
172		pinctrl-single,pins = <
173			AM4372_IOPAD(0xa28, PIN_OUTPUT | MUX_MODE7)	/* uart3_rxd.gpio5_2 */
174			AM4372_IOPAD(0xa2c, PIN_OUTPUT | MUX_MODE7)	/* uart3_txd.gpio5_3 */
175			AM4372_IOPAD(0xa30, PIN_OUTPUT | MUX_MODE7)	/* uart3_ctsn.gpio5_0 */
176			AM4372_IOPAD(0xa34, PIN_OUTPUT | MUX_MODE7)	/* uart3_rtsn.gpio5_1 */
177		>;
178	};
179
180	i2c0_pins: i2c0_pins {
181		pinctrl-single,pins = <
182			AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
183			AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
184		>;
185	};
186
187	i2c1_pins: i2c1_pins {
188		pinctrl-single,pins = <
189			AM4372_IOPAD(0x95c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_cs0.i2c1_scl */
190			AM4372_IOPAD(0x958, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_d1.i2c1_sda  */
191		>;
192	};
193
194	mmc1_pins: pinmux_mmc1_pins {
195		pinctrl-single,pins = <
196			AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
197			AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
198			AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
199			AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
200			AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
201			AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
202			AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
203		>;
204	};
205
206	ecap0_pins: backlight_pins {
207		pinctrl-single,pins = <
208			AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
209		>;
210	};
211
212	edt_ft5306_ts_pins: edt_ft5306_ts_pins {
213		pinctrl-single,pins = <
214			AM4372_IOPAD(0x874, PIN_INPUT | MUX_MODE7)	/* gpmc_wpn.gpio0_31 */
215			AM4372_IOPAD(0x878, PIN_OUTPUT | MUX_MODE7)	/* gpmc_be1n.gpio1_28 */
216		>;
217	};
218
219	vpfe0_pins_default: vpfe0_pins_default {
220		pinctrl-single,pins = <
221			AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_hd mode 0*/
222			AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_vd mode 0*/
223			AM4372_IOPAD(0x9b8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_field mode 0*/
224			AM4372_IOPAD(0x9bc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_wen mode 0*/
225			AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_pclk mode 0*/
226			AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data8 mode 0*/
227			AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data9 mode 0*/
228			AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data0 mode 0*/
229			AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data1 mode 0*/
230			AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data2 mode 0*/
231			AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data3 mode 0*/
232			AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data4 mode 0*/
233			AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data5 mode 0*/
234			AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data6 mode 0*/
235			AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data7 mode 0*/
236		>;
237	};
238
239	vpfe0_pins_sleep: vpfe0_pins_sleep {
240		pinctrl-single,pins = <
241			AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
242			AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
243			AM4372_IOPAD(0x9b8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
244			AM4372_IOPAD(0x9bc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
245			AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
246			AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
247			AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
248			AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
249			AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
250			AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
251			AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
252			AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
253			AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
254			AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
255			AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
256		>;
257	};
258
259	cpsw_default: cpsw_default {
260		pinctrl-single,pins = <
261			/* Slave 1 */
262			AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2)	/* mii1_txclk.rmii1_tclk */
263			AM4372_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
264			AM4372_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
265			AM4372_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
266			AM4372_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2)	/* mii1_txd0.rgmii1_td2 */
267			AM4372_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2)	/* mii1_txd1.rgmii1_td3 */
268			AM4372_IOPAD(0x930, PIN_INPUT | MUX_MODE2)	/* mii1_rxclk.rmii1_rclk */
269			AM4372_IOPAD(0x918, PIN_INPUT | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
270			AM4372_IOPAD(0x940, PIN_INPUT | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
271			AM4372_IOPAD(0x93c, PIN_INPUT | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
272			AM4372_IOPAD(0x938, PIN_INPUT | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd2 */
273			AM4372_IOPAD(0x934, PIN_INPUT | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd3 */
274
275			/* Slave 2 */
276			AM4372_IOPAD(0x858, PIN_OUTPUT | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
277			AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
278			AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
279			AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
280			AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
281			AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
282			AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */
283			AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE2)	/* gpmc_a1.rgmii2_rtcl */
284			AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */
285			AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */
286			AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */
287			AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */
288		>;
289	};
290
291	cpsw_sleep: cpsw_sleep {
292		pinctrl-single,pins = <
293			/* Slave 1 reset value */
294			AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
295			AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
296			AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
297			AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
298			AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
299			AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
300			AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
301			AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
302			AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
303			AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
304			AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
305			AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
306
307			/* Slave 2 reset value */
308			AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
309			AM4372_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
310			AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
311			AM4372_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
312			AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
313			AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
314			AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
315			AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
316			AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
317			AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
318			AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
319			AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
320		>;
321	};
322
323	davinci_mdio_default: davinci_mdio_default {
324		pinctrl-single,pins = <
325			/* MDIO */
326			AM4372_IOPAD(0x948, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
327			AM4372_IOPAD(0x94c, PIN_OUTPUT | MUX_MODE0)			/* mdio_clk.mdio_clk */
328		>;
329	};
330
331	davinci_mdio_sleep: davinci_mdio_sleep {
332		pinctrl-single,pins = <
333			/* MDIO reset value */
334			AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
335			AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
336		>;
337	};
338
339	dss_pins: dss_pins {
340		pinctrl-single,pins = <
341			AM4372_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1)	/* gpmc ad 8 -> DSS DATA 23 */
342			AM4372_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)
343			AM4372_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)
344			AM4372_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)
345			AM4372_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)
346			AM4372_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)
347			AM4372_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)
348			AM4372_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1)	/* gpmc ad 15 -> DSS DATA 16 */
349			AM4372_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)	/* DSS DATA 0 */
350			AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)
351			AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)
352			AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)
353			AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)
354			AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)
355			AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)
356			AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)
357			AM4372_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)
358			AM4372_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)
359			AM4372_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)
360			AM4372_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)
361			AM4372_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)
362			AM4372_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)
363			AM4372_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)
364			AM4372_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)	/* DSS DATA 15 */
365			AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0)	/* DSS VSYNC */
366			AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0)	/* DSS HSYNC */
367			AM4372_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0)	/* DSS PCLK */
368			AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0)	/* DSS AC BIAS EN */
369
370		>;
371	};
372
373	qspi_pins: qspi_pins {
374		pinctrl-single,pins = <
375			AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE3)	/* gpmc_csn0.qspi_csn */
376			AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2)	/* gpmc_csn3.qspi_clk */
377			AM4372_IOPAD(0x890, PIN_INPUT | MUX_MODE3)	/* gpmc_advn_ale.qspi_d0 */
378			AM4372_IOPAD(0x894, PIN_INPUT | MUX_MODE3)	/* gpmc_oen_ren.qspi_d1 */
379			AM4372_IOPAD(0x898, PIN_INPUT | MUX_MODE3)	/* gpmc_wen.qspi_d2 */
380			AM4372_IOPAD(0x89c, PIN_INPUT | MUX_MODE3)	/* gpmc_be0n_cle.qspi_d3 */
381		>;
382	};
383
384	mcasp1_pins: mcasp1_pins {
385		pinctrl-single,pins = <
386			AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* mii1_crs.mcasp1_aclkx */
387			AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* mii1_rxerr.mcasp1_fsx */
388			AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4)	/* mii1_col.mcasp1_axr2 */
389			AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* rmii1_ref_clk.mcasp1_axr3 */
390		>;
391	};
392
393	mcasp1_pins_sleep: mcasp1_pins_sleep {
394		pinctrl-single,pins = <
395			AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
396			AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
397			AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
398			AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
399		>;
400	};
401
402	lcd_pins: lcd_pins {
403		pinctrl-single,pins = <
404			AM4372_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
405		>;
406	};
407
408	usb1_pins: usb1_pins {
409		pinctrl-single,pins = <
410			AM4372_IOPAD(0xac0, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
411		>;
412	};
413
414	usb2_pins: usb2_pins {
415		pinctrl-single,pins = <
416			AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
417		>;
418	};
419};
420
421&i2c0 {
422	status = "okay";
423	pinctrl-names = "default";
424	pinctrl-0 = <&i2c0_pins>;
425	clock-frequency = <100000>;
426
427	tps@24 {
428		compatible = "ti,tps65218";
429		reg = <0x24>;
430		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
431		interrupt-controller;
432		#interrupt-cells = <2>;
433
434		dcdc1: regulator-dcdc1 {
435			/* VDD_CORE limits min of OPP50 and max of OPP100 */
436			regulator-name = "vdd_core";
437			regulator-min-microvolt = <912000>;
438			regulator-max-microvolt = <1144000>;
439			regulator-boot-on;
440			regulator-always-on;
441		};
442
443		dcdc2: regulator-dcdc2 {
444			/* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
445			regulator-name = "vdd_mpu";
446			regulator-min-microvolt = <912000>;
447			regulator-max-microvolt = <1378000>;
448			regulator-boot-on;
449			regulator-always-on;
450		};
451
452		dcdc3: regulator-dcdc3 {
453			regulator-name = "vdds_ddr";
454			regulator-boot-on;
455			regulator-always-on;
456			regulator-state-mem {
457				regulator-on-in-suspend;
458			};
459			regulator-state-disk {
460				regulator-off-in-suspend;
461			};
462		};
463
464		dcdc4: regulator-dcdc4 {
465			regulator-name = "v3_3d";
466			regulator-min-microvolt = <3300000>;
467			regulator-max-microvolt = <3300000>;
468			regulator-boot-on;
469			regulator-always-on;
470		};
471
472		dcdc5: regulator-dcdc5 {
473			compatible = "ti,tps65218-dcdc5";
474			regulator-name = "v1_0bat";
475			regulator-min-microvolt = <1000000>;
476			regulator-max-microvolt = <1000000>;
477			regulator-boot-on;
478			regulator-always-on;
479			regulator-state-mem {
480				regulator-on-in-suspend;
481			};
482		};
483
484		dcdc6: regulator-dcdc6 {
485			compatible = "ti,tps65218-dcdc6";
486			regulator-name = "v1_8bat";
487			regulator-min-microvolt = <1800000>;
488			regulator-max-microvolt = <1800000>;
489			regulator-boot-on;
490			regulator-always-on;
491			regulator-state-mem {
492				regulator-on-in-suspend;
493			};
494		};
495
496		ldo1: regulator-ldo1 {
497			regulator-name = "v1_8d";
498			regulator-min-microvolt = <1800000>;
499			regulator-max-microvolt = <1800000>;
500			regulator-boot-on;
501			regulator-always-on;
502		};
503
504		power-button {
505			compatible = "ti,tps65218-pwrbutton";
506			status = "okay";
507			interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
508		};
509	};
510
511	at24@50 {
512		compatible = "atmel,24c256";
513		pagesize = <64>;
514		reg = <0x50>;
515	};
516};
517
518&i2c1 {
519	status = "okay";
520	pinctrl-names = "default";
521	pinctrl-0 = <&i2c1_pins>;
522	clock-frequency = <400000>;
523
524	edt-ft5306@38 {
525		status = "okay";
526		compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
527		pinctrl-names = "default";
528		pinctrl-0 = <&edt_ft5306_ts_pins>;
529
530		reg = <0x38>;
531		interrupt-parent = <&gpio0>;
532		interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
533
534		reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
535
536		touchscreen-size-x = <480>;
537		touchscreen-size-y = <272>;
538
539		wakeup-source;
540	};
541
542	tlv320aic3106: tlv320aic3106@1b {
543		#sound-dai-cells = <0>;
544		compatible = "ti,tlv320aic3106";
545		reg = <0x1b>;
546		status = "okay";
547
548		/* Regulators */
549		AVDD-supply = <&dcdc4>;
550		IOVDD-supply = <&dcdc4>;
551		DRVDD-supply = <&dcdc4>;
552		DVDD-supply = <&ldo1>;
553	};
554
555	lis331dlh@18 {
556		compatible = "st,lis331dlh";
557		reg = <0x18>;
558		status = "okay";
559
560		Vdd-supply = <&dcdc4>;
561		Vdd_IO-supply = <&dcdc4>;
562		interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
563	};
564};
565
566&epwmss0 {
567	status = "okay";
568};
569
570&ecap0 {
571	status = "okay";
572	pinctrl-names = "default";
573	pinctrl-0 = <&ecap0_pins>;
574};
575
576&gpio0 {
577	status = "okay";
578};
579
580&gpio1 {
581	status = "okay";
582};
583
584&gpio5 {
585	status = "okay";
586};
587
588&mmc1 {
589	status = "okay";
590	pinctrl-names = "default";
591	pinctrl-0 = <&mmc1_pins>;
592
593	vmmc-supply = <&dcdc4>;
594	bus-width = <4>;
595	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
596};
597
598&usb2_phy1 {
599	status = "okay";
600};
601
602&usb1 {
603	dr_mode = "peripheral";
604	status = "okay";
605	pinctrl-names = "default";
606	pinctrl-0 = <&usb1_pins>;
607};
608
609&usb2_phy2 {
610	status = "okay";
611};
612
613&usb2 {
614	dr_mode = "host";
615	status = "okay";
616	pinctrl-names = "default";
617	pinctrl-0 = <&usb2_pins>;
618};
619
620&qspi {
621	status = "okay";
622	pinctrl-names = "default";
623	pinctrl-0 = <&qspi_pins>;
624
625	spi-max-frequency = <48000000>;
626	m25p80@0 {
627		compatible = "mx66l51235l";
628		spi-max-frequency = <48000000>;
629		reg = <0>;
630		spi-cpol;
631		spi-cpha;
632		spi-tx-bus-width = <1>;
633		spi-rx-bus-width = <4>;
634		#address-cells = <1>;
635		#size-cells = <1>;
636
637		/* MTD partition table.
638		 * The ROM checks the first 512KiB
639		 * for a valid file to boot(XIP).
640		 */
641		partition@0 {
642			label = "QSPI.U_BOOT";
643			reg = <0x00000000 0x000080000>;
644		};
645		partition@1 {
646			label = "QSPI.U_BOOT.backup";
647			reg = <0x00080000 0x00080000>;
648		};
649		partition@2 {
650			label = "QSPI.U-BOOT-SPL_OS";
651			reg = <0x00100000 0x00010000>;
652		};
653		partition@3 {
654			label = "QSPI.U_BOOT_ENV";
655			reg = <0x00110000 0x00010000>;
656		};
657		partition@4 {
658			label = "QSPI.U-BOOT-ENV.backup";
659			reg = <0x00120000 0x00010000>;
660		};
661		partition@5 {
662			label = "QSPI.KERNEL";
663			reg = <0x00130000 0x0800000>;
664		};
665		partition@6 {
666			label = "QSPI.FILESYSTEM";
667			reg = <0x00930000 0x36D0000>;
668		};
669	};
670};
671
672&mac {
673	pinctrl-names = "default", "sleep";
674	pinctrl-0 = <&cpsw_default>;
675	pinctrl-1 = <&cpsw_sleep>;
676	dual_emac = <1>;
677	status = "okay";
678};
679
680&davinci_mdio {
681	pinctrl-names = "default", "sleep";
682	pinctrl-0 = <&davinci_mdio_default>;
683	pinctrl-1 = <&davinci_mdio_sleep>;
684	status = "okay";
685};
686
687&cpsw_emac0 {
688	phy_id = <&davinci_mdio>, <4>;
689	phy-mode = "rgmii";
690	dual_emac_res_vlan = <1>;
691};
692
693&cpsw_emac1 {
694	phy_id = <&davinci_mdio>, <5>;
695	phy-mode = "rgmii";
696	dual_emac_res_vlan = <2>;
697};
698
699&elm {
700	status = "okay";
701};
702
703&mcasp1 {
704	#sound-dai-cells = <0>;
705	pinctrl-names = "default", "sleep";
706	pinctrl-0 = <&mcasp1_pins>;
707	pinctrl-1 = <&mcasp1_pins_sleep>;
708
709	status = "okay";
710
711	op-mode = <0>;
712	tdm-slots = <2>;
713	serial-dir = <
714		0 0 1 2
715	>;
716
717	tx-num-evt = <1>;
718	rx-num-evt = <1>;
719};
720
721&dss {
722	status = "okay";
723
724	pinctrl-names = "default";
725	pinctrl-0 = <&dss_pins>;
726
727	port {
728		dpi_out: endpoint@0 {
729			remote-endpoint = <&lcd_in>;
730			data-lines = <24>;
731		};
732	};
733};
734
735&rtc {
736	clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
737	clock-names = "ext-clk", "int-clk";
738	status = "okay";
739};
740
741&wdt {
742	status = "okay";
743};
744
745&cpu {
746	cpu0-supply = <&dcdc2>;
747};
748
749&vpfe0 {
750	status = "okay";
751	pinctrl-names = "default", "sleep";
752	pinctrl-0 = <&vpfe0_pins_default>;
753	pinctrl-1 = <&vpfe0_pins_sleep>;
754
755	/* Camera port */
756	port {
757		vpfe0_ep: endpoint {
758			/* remote-endpoint = <&sensor>; add once we have it */
759			ti,am437x-vpfe-interface = <0>;
760			bus-width = <8>;
761			hsync-active = <0>;
762			vsync-active = <0>;
763		};
764	};
765};
766