1/* 2 * Device Tree common file for the Seagate NAS 2 and 4-bay (Armada 370 SoC). 3 * 4 * Copyright (C) 2015 Seagate 5 * 6 * Author: Vincent Donnefort <vdonnefort@gmail.com> 7 * 8 * This file is licensed under the terms of the GNU General Public 9 * License version 2. This program is licensed "as is" without any 10 * warranty of any kind, whether express or implied. 11 */ 12 13/* 14 * TODO: add support for the white SATA LEDs associated with HDD 0 and 1. 15 */ 16 17#include "armada-370.dtsi" 18#include <dt-bindings/gpio/gpio.h> 19#include <dt-bindings/input/input.h> 20 21/ { 22 chosen { 23 stdout-path = "serial0:115200n8"; 24 }; 25 26 memory@0 { 27 device_type = "memory"; 28 reg = <0x00000000 0x20000000>; /* 512 MB */ 29 }; 30 31 soc { 32 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 33 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; 34 35 internal-regs { 36 serial@12000 { 37 status = "okay"; 38 }; 39 40 sata@a0000 { 41 nr-ports = <2>; 42 status = "okay"; 43 }; 44 45 ethernet@70000 { 46 status = "okay"; 47 pinctrl-0 = <&ge0_rgmii_pins>; 48 pinctrl-names = "default"; 49 phy = <&phy0>; 50 phy-mode = "rgmii-id"; 51 }; 52 53 i2c@11000 { 54 status = "okay"; 55 pinctrl-0 = <&i2c0_pins>; 56 pinctrl-names = "default"; 57 clock-frequency = <100000>; 58 59 /* RTC - NXP 8563T (second source) */ 60 rtc@51 { 61 compatible = "nxp,pcf8563"; 62 reg = <0x51>; 63 interrupts = <110>; 64 }; 65 /* RTC - MCP7940NT */ 66 rtc@6f { 67 compatible = "microchip,mcp7941x"; 68 reg = <0x6f>; 69 interrupts = <110>; 70 }; 71 }; 72 73 nand@d0000 { 74 status = "okay"; 75 num-cs = <1>; 76 marvell,nand-keep-config; 77 marvell,nand-enable-arbiter; 78 nand-on-flash-bbt; 79 nand-ecc-strength = <4>; 80 nand-ecc-step-size = <512>; 81 82 partition@0 { 83 label = "u-boot"; 84 reg = <0x0 0x300000>; 85 }; 86 partition@300000 { 87 label = "device-tree"; 88 reg = <0x300000 0x20000>; 89 }; 90 partition@320000 { 91 label = "linux"; 92 reg = <0x320000 0x2000000>; 93 }; 94 partition@2320000 { 95 label = "rootfs"; 96 reg = <0x2320000 0xdce0000>; 97 }; 98 }; 99 }; 100 101 }; 102 103 regulators { 104 compatible = "simple-bus"; 105 #address-cells = <1>; 106 #size-cells = <0>; 107 pinctrl-names = "default"; 108 109 regulator@1 { 110 compatible = "regulator-fixed"; 111 reg = <1>; 112 regulator-name = "SATA0 power"; 113 regulator-min-microvolt = <5000000>; 114 regulator-max-microvolt = <5000000>; 115 enable-active-high; 116 regulator-always-on; 117 regulator-boot-on; 118 gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>; 119 }; 120 regulator@2 { 121 compatible = "regulator-fixed"; 122 reg = <2>; 123 regulator-name = "SATA1 power"; 124 regulator-min-microvolt = <5000000>; 125 regulator-max-microvolt = <5000000>; 126 enable-active-high; 127 regulator-always-on; 128 regulator-boot-on; 129 gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; 130 }; 131 }; 132 133 gpio-fan { 134 compatible = "gpio-fan"; 135 gpios = <&gpio2 0 GPIO_ACTIVE_HIGH 136 &gpio2 1 GPIO_ACTIVE_HIGH>; 137 }; 138 139 gpio-keys { 140 compatible = "gpio-keys"; 141 #address-cells = <1>; 142 #size-cells = <0>; 143 144 power { 145 label = "Power button"; 146 linux,code = <KEY_POWER>; 147 gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; 148 debounce-interval = <100>; 149 }; 150 backup { 151 label = "Backup button"; 152 linux,code = <KEY_OPTION>; 153 gpios = <&gpio0 31 GPIO_ACTIVE_LOW>; 154 debounce-interval = <100>; 155 }; 156 reset { 157 label = "Reset Button"; 158 linux,code = <KEY_RESTART>; 159 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; 160 debounce-interval = <100>; 161 }; 162 }; 163 164 gpio-leds { 165 compatible = "gpio-leds"; 166 167 white-power { 168 label = "dart:white:power"; 169 gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; 170 linux,default-trigger = "timer"; 171 172 }; 173 red-power { 174 label = "dart:red:power"; 175 gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>; 176 }; 177 red-sata0 { 178 label = "dart:red:sata0"; 179 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; 180 }; 181 red-sata1 { 182 label = "dart:red:sata1"; 183 gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; 184 }; 185 }; 186 187 gpio_poweroff { 188 compatible = "gpio-poweroff"; 189 gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; 190 }; 191}; 192 193&pciec { 194 status = "okay"; 195 196 /* USB 3.0 bridge ASM1042A */ 197 pcie@2,0 { 198 status = "okay"; 199 }; 200}; 201 202 203&mdio { 204 pinctrl-0 = <&mdio_pins>; 205 pinctrl-names = "default"; 206 207 phy0: ethernet-phy@0 { 208 reg = <0>; 209 }; 210}; 211 212&pinctrl { 213 pinctrl-0 = <&hdd0_led_sata_pin>, <&hdd1_led_sata_pin>; 214 pinctrl-names = "default"; 215 216 hdd0_led_sata_pin: hdd0-led-sata-pin { 217 marvell,pins = "mpp48"; 218 marvell,function = "sata1"; 219 }; 220 hdd0_led_gpio_pin: hdd0-led-gpio-pin { 221 marvell,pins = "mpp48"; 222 marvell,function = "gpio"; 223 }; 224 hdd1_led_sata_pin: hdd1-led-sata-pin { 225 marvell,pins = "mpp57"; 226 marvell,function = "sata0"; 227 }; 228 hdd1_led_gpio_pin: hdd1-led-gpio-pin { 229 marvell,pins = "mpp57"; 230 marvell,function = "gpio"; 231 }; 232}; 233