1/* 2 * Device Tree file for Marvell RD-AXPWiFiAP. 3 * 4 * Note: this board is shipped with a new generation boot loader that 5 * remaps internal registers at 0xf1000000. Therefore, if earlyprintk 6 * is used, the CONFIG_DEBUG_MVEBU_UART0_ALTERNATE option or the 7 * CONFIG_DEBUG_MVEBU_UART1_ALTERNATE option should be used. 8 * 9 * Copyright (C) 2013 Marvell 10 * 11 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 12 * 13 * This file is dual-licensed: you can use it either under the terms 14 * of the GPL or the X11 license, at your option. Note that this dual 15 * licensing only applies to this file, and not this project as a 16 * whole. 17 * 18 * a) This file is free software; you can redistribute it and/or 19 * modify it under the terms of the GNU General Public License as 20 * published by the Free Software Foundation; either version 2 of the 21 * License, or (at your option) any later version. 22 * 23 * This file is distributed in the hope that it will be useful, 24 * but WITHOUT ANY WARRANTY; without even the implied warranty of 25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 26 * GNU General Public License for more details. 27 * 28 * Or, alternatively, 29 * 30 * b) Permission is hereby granted, free of charge, to any person 31 * obtaining a copy of this software and associated documentation 32 * files (the "Software"), to deal in the Software without 33 * restriction, including without limitation the rights to use, 34 * copy, modify, merge, publish, distribute, sublicense, and/or 35 * sell copies of the Software, and to permit persons to whom the 36 * Software is furnished to do so, subject to the following 37 * conditions: 38 * 39 * The above copyright notice and this permission notice shall be 40 * included in all copies or substantial portions of the Software. 41 * 42 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 43 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 44 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 45 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 46 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 47 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 48 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 49 * OTHER DEALINGS IN THE SOFTWARE. 50 */ 51 52/dts-v1/; 53#include <dt-bindings/gpio/gpio.h> 54#include <dt-bindings/input/input.h> 55#include "armada-xp-mv78230.dtsi" 56 57/ { 58 model = "Marvell RD-AXPWiFiAP"; 59 compatible = "marvell,rd-axpwifiap", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp"; 60 61 chosen { 62 stdout-path = "serial0:115200n8"; 63 }; 64 65 memory@0 { 66 device_type = "memory"; 67 reg = <0x00000000 0x00000000 0x00000000 0x40000000>; /* 1GB */ 68 }; 69 70 soc { 71 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 72 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 73 MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000 74 MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>; 75 76 internal-regs { 77 /* UART0 */ 78 serial@12000 { 79 status = "okay"; 80 }; 81 82 /* UART1 */ 83 serial@12100 { 84 status = "okay"; 85 }; 86 87 sata@a0000 { 88 nr-ports = <1>; 89 status = "okay"; 90 }; 91 92 ethernet@70000 { 93 pinctrl-0 = <&ge0_rgmii_pins>; 94 pinctrl-names = "default"; 95 status = "okay"; 96 phy = <&phy0>; 97 phy-mode = "rgmii-id"; 98 }; 99 ethernet@74000 { 100 pinctrl-0 = <&ge1_rgmii_pins>; 101 pinctrl-names = "default"; 102 status = "okay"; 103 phy = <&phy1>; 104 phy-mode = "rgmii-id"; 105 }; 106 }; 107 }; 108 109 gpio_keys { 110 compatible = "gpio-keys"; 111 #address-cells = <1>; 112 #size-cells = <0>; 113 pinctrl-0 = <&keys_pin>; 114 pinctrl-names = "default"; 115 116 reset { 117 label = "Factory Reset Button"; 118 linux,code = <KEY_SETUP>; 119 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; 120 }; 121 }; 122}; 123 124&mdio { 125 phy0: ethernet-phy@0 { 126 reg = <0>; 127 }; 128 129 phy1: ethernet-phy@1 { 130 reg = <1>; 131 }; 132}; 133 134&pciec { 135 status = "okay"; 136 137 /* First mini-PCIe port */ 138 pcie@1,0 { 139 /* Port 0, Lane 0 */ 140 status = "okay"; 141 }; 142 143 /* Second mini-PCIe port */ 144 pcie@2,0 { 145 /* Port 0, Lane 1 */ 146 status = "okay"; 147 }; 148 149 /* Renesas uPD720202 USB 3.0 controller */ 150 pcie@3,0 { 151 /* Port 0, Lane 3 */ 152 status = "okay"; 153 }; 154}; 155 156&pinctrl { 157 pinctrl-0 = <&phy_int_pin>; 158 pinctrl-names = "default"; 159 160 keys_pin: keys-pin { 161 marvell,pins = "mpp33"; 162 marvell,function = "gpio"; 163 }; 164 165 phy_int_pin: phy-int-pin { 166 marvell,pins = "mpp32"; 167 marvell,function = "gpio"; 168 }; 169}; 170 171&spi0 { 172 status = "okay"; 173 174 spi-flash@0 { 175 #address-cells = <1>; 176 #size-cells = <1>; 177 compatible = "n25q128a13", "jedec,spi-nor"; 178 reg = <0>; /* Chip select 0 */ 179 spi-max-frequency = <108000000>; 180 }; 181}; 182