1/* 2 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC 3 * 4 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com> 5 * 6 * Licensed under GPLv2 only. 7 */ 8 9#include "skeleton.dtsi" 10#include <dt-bindings/pinctrl/at91.h> 11#include <dt-bindings/interrupt-controller/irq.h> 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/clock/at91.h> 14 15/ { 16 model = "Atmel AT91SAM9261 family SoC"; 17 compatible = "atmel,at91sam9261"; 18 interrupt-parent = <&aic>; 19 20 aliases { 21 serial0 = &dbgu; 22 serial1 = &usart0; 23 serial2 = &usart1; 24 serial3 = &usart2; 25 gpio0 = &pioA; 26 gpio1 = &pioB; 27 gpio2 = &pioC; 28 tcb0 = &tcb0; 29 i2c0 = &i2c0; 30 ssc0 = &ssc0; 31 ssc1 = &ssc1; 32 ssc2 = &ssc2; 33 }; 34 35 cpus { 36 #address-cells = <0>; 37 #size-cells = <0>; 38 39 cpu { 40 compatible = "arm,arm926ej-s"; 41 device_type = "cpu"; 42 }; 43 }; 44 45 memory { 46 reg = <0x20000000 0x08000000>; 47 }; 48 49 clocks { 50 main_xtal: main_xtal { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 56 slow_xtal: slow_xtal { 57 compatible = "fixed-clock"; 58 #clock-cells = <0>; 59 clock-frequency = <0>; 60 }; 61 }; 62 63 sram: sram@00300000 { 64 compatible = "mmio-sram"; 65 reg = <0x00300000 0x28000>; 66 }; 67 68 ahb { 69 compatible = "simple-bus"; 70 #address-cells = <1>; 71 #size-cells = <1>; 72 ranges; 73 74 usb0: ohci@00500000 { 75 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 76 reg = <0x00500000 0x100000>; 77 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>; 78 clocks = <&ohci_clk>, <&hclk0>, <&uhpck>; 79 clock-names = "ohci_clk", "hclk", "uhpck"; 80 status = "disabled"; 81 }; 82 83 fb0: fb@0x00600000 { 84 compatible = "atmel,at91sam9261-lcdc"; 85 reg = <0x00600000 0x1000>; 86 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; 87 pinctrl-names = "default"; 88 pinctrl-0 = <&pinctrl_fb>; 89 clocks = <&lcd_clk>, <&hclk1>; 90 clock-names = "lcdc_clk", "hclk"; 91 status = "disabled"; 92 }; 93 94 ebi: ebi@10000000 { 95 compatible = "atmel,at91sam9261-ebi"; 96 #address-cells = <2>; 97 #size-cells = <1>; 98 atmel,smc = <&smc>; 99 atmel,matrix = <&matrix>; 100 reg = <0x10000000 0x80000000>; 101 ranges = <0x0 0x0 0x10000000 0x10000000 102 0x1 0x0 0x20000000 0x10000000 103 0x2 0x0 0x30000000 0x10000000 104 0x3 0x0 0x40000000 0x10000000 105 0x4 0x0 0x50000000 0x10000000 106 0x5 0x0 0x60000000 0x10000000 107 0x6 0x0 0x70000000 0x10000000 108 0x7 0x0 0x80000000 0x10000000>; 109 clocks = <&mck>; 110 status = "disabled"; 111 112 nand_controller: nand-controller { 113 compatible = "atmel,at91sam9261-nand-controller"; 114 #address-cells = <2>; 115 #size-cells = <1>; 116 ranges; 117 status = "disabled"; 118 }; 119 }; 120 121 apb { 122 compatible = "simple-bus"; 123 #address-cells = <1>; 124 #size-cells = <1>; 125 ranges; 126 127 tcb0: timer@fffa0000 { 128 compatible = "atmel,at91rm9200-tcb"; 129 reg = <0xfffa0000 0x100>; 130 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>, 131 <18 IRQ_TYPE_LEVEL_HIGH 0>, 132 <19 IRQ_TYPE_LEVEL_HIGH 0>; 133 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>; 134 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; 135 }; 136 137 usb1: gadget@fffa4000 { 138 compatible = "atmel,at91sam9261-udc"; 139 reg = <0xfffa4000 0x4000>; 140 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; 141 clocks = <&udc_clk>, <&udpck>; 142 clock-names = "pclk", "hclk"; 143 atmel,matrix = <&matrix>; 144 status = "disabled"; 145 }; 146 147 mmc0: mmc@fffa8000 { 148 compatible = "atmel,hsmci"; 149 reg = <0xfffa8000 0x600>; 150 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>; 151 pinctrl-names = "default"; 152 pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>; 153 #address-cells = <1>; 154 #size-cells = <0>; 155 clocks = <&mci0_clk>; 156 clock-names = "mci_clk"; 157 status = "disabled"; 158 }; 159 160 i2c0: i2c@fffac000 { 161 compatible = "atmel,at91sam9261-i2c"; 162 pinctrl-names = "default"; 163 pinctrl-0 = <&pinctrl_i2c_twi>; 164 reg = <0xfffac000 0x100>; 165 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; 166 #address-cells = <1>; 167 #size-cells = <0>; 168 clocks = <&twi0_clk>; 169 status = "disabled"; 170 }; 171 172 usart0: serial@fffb0000 { 173 compatible = "atmel,at91sam9260-usart"; 174 reg = <0xfffb0000 0x200>; 175 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; 176 atmel,use-dma-rx; 177 atmel,use-dma-tx; 178 pinctrl-names = "default"; 179 pinctrl-0 = <&pinctrl_usart0>; 180 clocks = <&usart0_clk>; 181 clock-names = "usart"; 182 status = "disabled"; 183 }; 184 185 usart1: serial@fffb4000 { 186 compatible = "atmel,at91sam9260-usart"; 187 reg = <0xfffb4000 0x200>; 188 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 189 atmel,use-dma-rx; 190 atmel,use-dma-tx; 191 pinctrl-names = "default"; 192 pinctrl-0 = <&pinctrl_usart1>; 193 clocks = <&usart1_clk>; 194 clock-names = "usart"; 195 status = "disabled"; 196 }; 197 198 usart2: serial@fffb8000{ 199 compatible = "atmel,at91sam9260-usart"; 200 reg = <0xfffb8000 0x200>; 201 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 202 atmel,use-dma-rx; 203 atmel,use-dma-tx; 204 pinctrl-names = "default"; 205 pinctrl-0 = <&pinctrl_usart2>; 206 clocks = <&usart2_clk>; 207 clock-names = "usart"; 208 status = "disabled"; 209 }; 210 211 ssc0: ssc@fffbc000 { 212 compatible = "atmel,at91rm9200-ssc"; 213 reg = <0xfffbc000 0x4000>; 214 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; 215 pinctrl-names = "default"; 216 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 217 clocks = <&ssc0_clk>; 218 clock-names = "pclk"; 219 status = "disabled"; 220 }; 221 222 ssc1: ssc@fffc0000 { 223 compatible = "atmel,at91rm9200-ssc"; 224 reg = <0xfffc0000 0x4000>; 225 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; 226 pinctrl-names = "default"; 227 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 228 clocks = <&ssc1_clk>; 229 clock-names = "pclk"; 230 status = "disabled"; 231 }; 232 233 ssc2: ssc@fffc4000 { 234 compatible = "atmel,at91rm9200-ssc"; 235 reg = <0xfffc4000 0x4000>; 236 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 237 pinctrl-names = "default"; 238 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>; 239 clocks = <&ssc2_clk>; 240 clock-names = "pclk"; 241 status = "disabled"; 242 }; 243 244 spi0: spi@fffc8000 { 245 #address-cells = <1>; 246 #size-cells = <0>; 247 compatible = "atmel,at91rm9200-spi"; 248 reg = <0xfffc8000 0x200>; 249 cs-gpios = <0>, <0>, <0>, <0>; 250 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; 251 pinctrl-names = "default"; 252 pinctrl-0 = <&pinctrl_spi0>; 253 clocks = <&spi0_clk>; 254 clock-names = "spi_clk"; 255 status = "disabled"; 256 }; 257 258 spi1: spi@fffcc000 { 259 #address-cells = <1>; 260 #size-cells = <0>; 261 compatible = "atmel,at91rm9200-spi"; 262 reg = <0xfffcc000 0x200>; 263 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; 264 pinctrl-names = "default"; 265 pinctrl-0 = <&pinctrl_spi1>; 266 clocks = <&spi1_clk>; 267 clock-names = "spi_clk"; 268 status = "disabled"; 269 }; 270 271 ramc: ramc@ffffea00 { 272 compatible = "atmel,at91sam9260-sdramc"; 273 reg = <0xffffea00 0x200>; 274 }; 275 276 smc: smc@ffffec00 { 277 compatible = "atmel,at91sam9260-smc", "syscon"; 278 reg = <0xffffec00 0x200>; 279 }; 280 281 matrix: matrix@ffffee00 { 282 compatible = "atmel,at91sam9261-matrix", "syscon"; 283 reg = <0xffffee00 0x200>; 284 }; 285 286 aic: interrupt-controller@fffff000 { 287 #interrupt-cells = <3>; 288 compatible = "atmel,at91rm9200-aic"; 289 interrupt-controller; 290 reg = <0xfffff000 0x200>; 291 atmel,external-irqs = <29 30 31>; 292 }; 293 294 dbgu: serial@fffff200 { 295 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 296 reg = <0xfffff200 0x200>; 297 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 298 pinctrl-names = "default"; 299 pinctrl-0 = <&pinctrl_dbgu>; 300 clocks = <&mck>; 301 clock-names = "usart"; 302 status = "disabled"; 303 }; 304 305 pinctrl@fffff400 { 306 #address-cells = <1>; 307 #size-cells = <1>; 308 compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; 309 ranges = <0xfffff400 0xfffff400 0x600>; 310 311 atmel,mux-mask = 312 /* A B */ 313 <0xffffffff 0xfffffff7>, /* pioA */ 314 <0xffffffff 0xfffffff4>, /* pioB */ 315 <0xffffffff 0xffffff07>; /* pioC */ 316 317 /* shared pinctrl settings */ 318 dbgu { 319 pinctrl_dbgu: dbgu-0 { 320 atmel,pins = 321 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 322 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; 323 }; 324 }; 325 326 usart0 { 327 pinctrl_usart0: usart0-0 { 328 atmel,pins = 329 <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 330 <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; 331 }; 332 333 pinctrl_usart0_rts: usart0_rts-0 { 334 atmel,pins = 335 <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; 336 }; 337 338 pinctrl_usart0_cts: usart0_cts-0 { 339 atmel,pins = 340 <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; 341 }; 342 }; 343 344 usart1 { 345 pinctrl_usart1: usart1-0 { 346 atmel,pins = 347 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 348 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; 349 }; 350 351 pinctrl_usart1_rts: usart1_rts-0 { 352 atmel,pins = 353 <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; 354 }; 355 356 pinctrl_usart1_cts: usart1_cts-0 { 357 atmel,pins = 358 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; 359 }; 360 }; 361 362 usart2 { 363 pinctrl_usart2: usart2-0 { 364 atmel,pins = 365 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 366 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 367 }; 368 369 pinctrl_usart2_rts: usart2_rts-0 { 370 atmel,pins = 371 <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; 372 }; 373 374 pinctrl_usart2_cts: usart2_cts-0 { 375 atmel,pins = 376 <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; 377 }; 378 }; 379 380 nand { 381 pinctrl_nand_rb: nand-rb-0 { 382 atmel,pins = 383 <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 384 }; 385 386 pinctrl_nand_cs: nand-cs-0 { 387 atmel,pins = 388 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 389 }; 390 }; 391 392 mmc0 { 393 pinctrl_mmc0_clk: mmc0_clk-0 { 394 atmel,pins = 395 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; 396 }; 397 398 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 399 atmel,pins = 400 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, 401 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; 402 }; 403 404 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 405 atmel,pins = 406 <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, 407 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, 408 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; 409 }; 410 }; 411 412 ssc0 { 413 pinctrl_ssc0_tx: ssc0_tx-0 { 414 atmel,pins = 415 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>, 416 <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>, 417 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; 418 }; 419 420 pinctrl_ssc0_rx: ssc0_rx-0 { 421 atmel,pins = 422 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>, 423 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>, 424 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; 425 }; 426 }; 427 428 ssc1 { 429 pinctrl_ssc1_tx: ssc1_tx-0 { 430 atmel,pins = 431 <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>, 432 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>, 433 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; 434 }; 435 436 pinctrl_ssc1_rx: ssc1_rx-0 { 437 atmel,pins = 438 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>, 439 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>, 440 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; 441 }; 442 }; 443 444 ssc2 { 445 pinctrl_ssc2_tx: ssc2_tx-0 { 446 atmel,pins = 447 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>, 448 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>, 449 <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; 450 }; 451 452 pinctrl_ssc2_rx: ssc2_rx-0 { 453 atmel,pins = 454 <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>, 455 <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>, 456 <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; 457 }; 458 }; 459 460 spi0 { 461 pinctrl_spi0: spi0-0 { 462 atmel,pins = 463 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>, 464 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>, 465 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; 466 }; 467 }; 468 469 spi1 { 470 pinctrl_spi1: spi1-0 { 471 atmel,pins = 472 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>, 473 <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>, 474 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 475 }; 476 }; 477 478 tcb0 { 479 pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 480 atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; 481 }; 482 483 pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 484 atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; 485 }; 486 487 pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 488 atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 489 }; 490 491 pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 492 atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; 493 }; 494 495 pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 496 atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; 497 }; 498 499 pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 500 atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; 501 }; 502 503 pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 504 atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; 505 }; 506 507 pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 508 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; 509 }; 510 511 pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 512 atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; 513 }; 514 }; 515 516 i2c0 { 517 pinctrl_i2c_bitbang: i2c-0-bitbang { 518 atmel,pins = 519 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>, 520 <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 521 }; 522 pinctrl_i2c_twi: i2c-0-twi { 523 atmel,pins = 524 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, 525 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; 526 }; 527 }; 528 529 fb { 530 pinctrl_fb: fb-0 { 531 atmel,pins = 532 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>, 533 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>, 534 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>, 535 <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, 536 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>, 537 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>, 538 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>, 539 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>, 540 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>, 541 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>, 542 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>, 543 <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>, 544 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>, 545 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>, 546 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>, 547 <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>, 548 <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>, 549 <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>, 550 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>, 551 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>, 552 <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; 553 }; 554 }; 555 556 pioA: gpio@fffff400 { 557 compatible = "atmel,at91rm9200-gpio"; 558 reg = <0xfffff400 0x200>; 559 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 560 #gpio-cells = <2>; 561 gpio-controller; 562 interrupt-controller; 563 #interrupt-cells = <2>; 564 clocks = <&pioA_clk>; 565 }; 566 567 pioB: gpio@fffff600 { 568 compatible = "atmel,at91rm9200-gpio"; 569 reg = <0xfffff600 0x200>; 570 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 571 #gpio-cells = <2>; 572 gpio-controller; 573 interrupt-controller; 574 #interrupt-cells = <2>; 575 clocks = <&pioB_clk>; 576 }; 577 578 pioC: gpio@fffff800 { 579 compatible = "atmel,at91rm9200-gpio"; 580 reg = <0xfffff800 0x200>; 581 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 582 #gpio-cells = <2>; 583 gpio-controller; 584 interrupt-controller; 585 #interrupt-cells = <2>; 586 clocks = <&pioC_clk>; 587 }; 588 }; 589 590 pmc: pmc@fffffc00 { 591 compatible = "atmel,at91rm9200-pmc", "syscon"; 592 reg = <0xfffffc00 0x100>; 593 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 594 interrupt-controller; 595 #address-cells = <1>; 596 #size-cells = <0>; 597 #interrupt-cells = <1>; 598 599 main_osc: main_osc { 600 compatible = "atmel,at91rm9200-clk-main-osc"; 601 #clock-cells = <0>; 602 interrupts-extended = <&pmc AT91_PMC_MOSCS>; 603 clocks = <&main_xtal>; 604 }; 605 606 main: mainck { 607 compatible = "atmel,at91rm9200-clk-main"; 608 #clock-cells = <0>; 609 clocks = <&main_osc>; 610 }; 611 612 plla: pllack { 613 compatible = "atmel,at91rm9200-clk-pll"; 614 #clock-cells = <0>; 615 interrupts-extended = <&pmc AT91_PMC_LOCKA>; 616 clocks = <&main>; 617 reg = <0>; 618 atmel,clk-input-range = <1000000 32000000>; 619 #atmel,pll-clk-output-range-cells = <4>; 620 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, 621 <190000000 240000000 2 1>; 622 }; 623 624 pllb: pllbck { 625 compatible = "atmel,at91rm9200-clk-pll"; 626 #clock-cells = <0>; 627 interrupts-extended = <&pmc AT91_PMC_LOCKB>; 628 clocks = <&main>; 629 reg = <1>; 630 atmel,clk-input-range = <1000000 5000000>; 631 #atmel,pll-clk-output-range-cells = <4>; 632 atmel,pll-clk-output-ranges = <70000000 130000000 1 1>; 633 }; 634 635 mck: masterck { 636 compatible = "atmel,at91rm9200-clk-master"; 637 #clock-cells = <0>; 638 interrupts-extended = <&pmc AT91_PMC_MCKRDY>; 639 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; 640 atmel,clk-output-range = <0 94000000>; 641 atmel,clk-divisors = <1 2 4 0>; 642 }; 643 644 usb: usbck { 645 compatible = "atmel,at91rm9200-clk-usb"; 646 #clock-cells = <0>; 647 atmel,clk-divisors = <1 2 4 0>; 648 clocks = <&pllb>; 649 }; 650 651 prog: progck { 652 compatible = "atmel,at91rm9200-clk-programmable"; 653 #address-cells = <1>; 654 #size-cells = <0>; 655 interrupt-parent = <&pmc>; 656 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; 657 658 prog0: prog0 { 659 #clock-cells = <0>; 660 reg = <0>; 661 interrupts = <AT91_PMC_PCKRDY(0)>; 662 }; 663 664 prog1: prog1 { 665 #clock-cells = <0>; 666 reg = <1>; 667 interrupts = <AT91_PMC_PCKRDY(1)>; 668 }; 669 670 prog2: prog2 { 671 #clock-cells = <0>; 672 reg = <2>; 673 interrupts = <AT91_PMC_PCKRDY(2)>; 674 }; 675 676 prog3: prog3 { 677 #clock-cells = <0>; 678 reg = <3>; 679 interrupts = <AT91_PMC_PCKRDY(3)>; 680 }; 681 }; 682 683 systemck { 684 compatible = "atmel,at91rm9200-clk-system"; 685 #address-cells = <1>; 686 #size-cells = <0>; 687 688 uhpck: uhpck { 689 #clock-cells = <0>; 690 reg = <6>; 691 clocks = <&usb>; 692 }; 693 694 udpck: udpck { 695 #clock-cells = <0>; 696 reg = <7>; 697 clocks = <&usb>; 698 }; 699 700 pck0: pck0 { 701 #clock-cells = <0>; 702 reg = <8>; 703 clocks = <&prog0>; 704 }; 705 706 pck1: pck1 { 707 #clock-cells = <0>; 708 reg = <9>; 709 clocks = <&prog1>; 710 }; 711 712 pck2: pck2 { 713 #clock-cells = <0>; 714 reg = <10>; 715 clocks = <&prog2>; 716 }; 717 718 pck3: pck3 { 719 #clock-cells = <0>; 720 reg = <11>; 721 clocks = <&prog3>; 722 }; 723 724 hclk0: hclk0 { 725 #clock-cells = <0>; 726 reg = <16>; 727 clocks = <&mck>; 728 }; 729 730 hclk1: hclk1 { 731 #clock-cells = <0>; 732 reg = <17>; 733 clocks = <&mck>; 734 }; 735 }; 736 737 periphck { 738 compatible = "atmel,at91rm9200-clk-peripheral"; 739 #address-cells = <1>; 740 #size-cells = <0>; 741 clocks = <&mck>; 742 743 pioA_clk: pioA_clk { 744 #clock-cells = <0>; 745 reg = <2>; 746 }; 747 748 pioB_clk: pioB_clk { 749 #clock-cells = <0>; 750 reg = <3>; 751 }; 752 753 pioC_clk: pioC_clk { 754 #clock-cells = <0>; 755 reg = <4>; 756 }; 757 758 usart0_clk: usart0_clk { 759 #clock-cells = <0>; 760 reg = <6>; 761 }; 762 763 usart1_clk: usart1_clk { 764 #clock-cells = <0>; 765 reg = <7>; 766 }; 767 768 usart2_clk: usart2_clk { 769 #clock-cells = <0>; 770 reg = <8>; 771 }; 772 773 mci0_clk: mci0_clk { 774 #clock-cells = <0>; 775 reg = <9>; 776 }; 777 778 udc_clk: udc_clk { 779 #clock-cells = <0>; 780 reg = <10>; 781 }; 782 783 twi0_clk: twi0_clk { 784 reg = <11>; 785 #clock-cells = <0>; 786 }; 787 788 spi0_clk: spi0_clk { 789 #clock-cells = <0>; 790 reg = <12>; 791 }; 792 793 spi1_clk: spi1_clk { 794 #clock-cells = <0>; 795 reg = <13>; 796 }; 797 798 ssc0_clk: ssc0_clk { 799 #clock-cells = <0>; 800 reg = <14>; 801 }; 802 803 ssc1_clk: ssc1_clk { 804 #clock-cells = <0>; 805 reg = <15>; 806 }; 807 808 ssc2_clk: ssc2_clk { 809 #clock-cells = <0>; 810 reg = <16>; 811 }; 812 813 tc0_clk: tc0_clk { 814 #clock-cells = <0>; 815 reg = <17>; 816 }; 817 818 tc1_clk: tc1_clk { 819 #clock-cells = <0>; 820 reg = <18>; 821 }; 822 823 tc2_clk: tc2_clk { 824 #clock-cells = <0>; 825 reg = <19>; 826 }; 827 828 ohci_clk: ohci_clk { 829 #clock-cells = <0>; 830 reg = <20>; 831 }; 832 833 lcd_clk: lcd_clk { 834 #clock-cells = <0>; 835 reg = <21>; 836 }; 837 }; 838 }; 839 840 rstc@fffffd00 { 841 compatible = "atmel,at91sam9260-rstc"; 842 reg = <0xfffffd00 0x10>; 843 clocks = <&slow_xtal>; 844 }; 845 846 shdwc@fffffd10 { 847 compatible = "atmel,at91sam9260-shdwc"; 848 reg = <0xfffffd10 0x10>; 849 clocks = <&slow_xtal>; 850 }; 851 852 pit: timer@fffffd30 { 853 compatible = "atmel,at91sam9260-pit"; 854 reg = <0xfffffd30 0xf>; 855 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 856 clocks = <&mck>; 857 }; 858 859 rtc@fffffd20 { 860 compatible = "atmel,at91sam9260-rtt"; 861 reg = <0xfffffd20 0x10>; 862 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 863 clocks = <&slow_xtal>; 864 status = "disabled"; 865 }; 866 867 watchdog@fffffd40 { 868 compatible = "atmel,at91sam9260-wdt"; 869 reg = <0xfffffd40 0x10>; 870 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 871 clocks = <&slow_xtal>; 872 status = "disabled"; 873 }; 874 875 gpbr: syscon@fffffd50 { 876 compatible = "atmel,at91sam9260-gpbr", "syscon"; 877 reg = <0xfffffd50 0x10>; 878 status = "disabled"; 879 }; 880 }; 881 }; 882 883 i2c-gpio-0 { 884 compatible = "i2c-gpio"; 885 pinctrl-names = "default"; 886 pinctrl-0 = <&pinctrl_i2c_bitbang>; 887 gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */ 888 <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */ 889 i2c-gpio,sda-open-drain; 890 i2c-gpio,scl-open-drain; 891 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 892 #address-cells = <1>; 893 #size-cells = <0>; 894 status = "disabled"; 895 }; 896}; 897