1/* 2 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8/dts-v1/; 9 10#include "dra76x.dtsi" 11#include "dra7-evm-common.dtsi" 12#include <dt-bindings/net/ti-dp83867.h> 13 14/ { 15 model = "TI DRA762 EVM"; 16 compatible = "ti,dra76-evm", "ti,dra762", "ti,dra7"; 17 18 memory@0 { 19 device_type = "memory"; 20 reg = <0x0 0x80000000 0x0 0x80000000>; 21 }; 22 23 vsys_12v0: fixedregulator-vsys12v0 { 24 /* main supply */ 25 compatible = "regulator-fixed"; 26 regulator-name = "vsys_12v0"; 27 regulator-min-microvolt = <12000000>; 28 regulator-max-microvolt = <12000000>; 29 regulator-always-on; 30 regulator-boot-on; 31 }; 32 33 vsys_5v0: fixedregulator-vsys5v0 { 34 /* Output of Cntlr B of TPS43351-Q1 on dra76-evm */ 35 compatible = "regulator-fixed"; 36 regulator-name = "vsys_5v0"; 37 regulator-min-microvolt = <5000000>; 38 regulator-max-microvolt = <5000000>; 39 vin-supply = <&vsys_12v0>; 40 regulator-always-on; 41 regulator-boot-on; 42 }; 43 44 vsys_3v3: fixedregulator-vsys3v3 { 45 /* Output of Cntlr A of TPS43351-Q1 on dra76-evm */ 46 compatible = "regulator-fixed"; 47 regulator-name = "vsys_3v3"; 48 regulator-min-microvolt = <3300000>; 49 regulator-max-microvolt = <3300000>; 50 vin-supply = <&vsys_12v0>; 51 regulator-always-on; 52 regulator-boot-on; 53 }; 54 55 vio_3v3: fixedregulator-vio_3v3 { 56 compatible = "regulator-fixed"; 57 regulator-name = "vio_3v3"; 58 regulator-min-microvolt = <3300000>; 59 regulator-max-microvolt = <3300000>; 60 vin-supply = <&vsys_3v3>; 61 regulator-always-on; 62 regulator-boot-on; 63 }; 64 65 vio_3v3_sd: fixedregulator-sd { 66 compatible = "regulator-fixed"; 67 regulator-name = "vio_3v3_sd"; 68 regulator-min-microvolt = <3300000>; 69 regulator-max-microvolt = <3300000>; 70 vin-supply = <&vio_3v3>; 71 enable-active-high; 72 gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>; 73 }; 74 75 vio_1v8: fixedregulator-vio_1v8 { 76 compatible = "regulator-fixed"; 77 regulator-name = "vio_1v8"; 78 regulator-min-microvolt = <1800000>; 79 regulator-max-microvolt = <1800000>; 80 vin-supply = <&smps5_reg>; 81 }; 82 83 vtt_fixed: fixedregulator-vtt { 84 compatible = "regulator-fixed"; 85 regulator-name = "vtt_fixed"; 86 regulator-min-microvolt = <1350000>; 87 regulator-max-microvolt = <1350000>; 88 vin-supply = <&vsys_3v3>; 89 regulator-always-on; 90 regulator-boot-on; 91 }; 92 93 aic_dvdd: fixedregulator-aic_dvdd { 94 /* TPS77018DBVT */ 95 compatible = "regulator-fixed"; 96 regulator-name = "aic_dvdd"; 97 vin-supply = <&vio_3v3>; 98 regulator-min-microvolt = <1800000>; 99 regulator-max-microvolt = <1800000>; 100 }; 101}; 102 103&dra7_pmx_core { 104 mmc1_pins_default: mmc1_pins_default { 105 pinctrl-single,pins = < 106 DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */ 107 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ 108 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ 109 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ 110 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ 111 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ 112 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ 113 >; 114 }; 115 116 mmc1_pins_sdr12: pinmux_mmc1_sdr12_pins { 117 pinctrl-single,pins = < 118 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ 119 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ 120 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ 121 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ 122 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ 123 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ 124 >; 125 }; 126 127 mmc2_pins_default: mmc2_pins_default { 128 pinctrl-single,pins = < 129 DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 130 DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ 131 DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 132 DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 133 DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 134 DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 135 DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 136 DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 137 DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 138 DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ 139 >; 140 }; 141}; 142 143&i2c1 { 144 status = "okay"; 145 clock-frequency = <400000>; 146 147 tps65917: tps65917@58 { 148 compatible = "ti,tps65917"; 149 reg = <0x58>; 150 ti,system-power-controller; 151 ti,palmas-override-powerhold; 152 interrupt-controller; 153 #interrupt-cells = <2>; 154 155 tps65917_pmic { 156 compatible = "ti,tps65917-pmic"; 157 158 smps12-in-supply = <&vsys_3v3>; 159 smps3-in-supply = <&vsys_3v3>; 160 smps4-in-supply = <&vsys_3v3>; 161 smps5-in-supply = <&vsys_3v3>; 162 ldo1-in-supply = <&vsys_3v3>; 163 ldo2-in-supply = <&vsys_3v3>; 164 ldo3-in-supply = <&vsys_5v0>; 165 ldo4-in-supply = <&vsys_5v0>; 166 ldo5-in-supply = <&vsys_3v3>; 167 168 tps65917_regulators: regulators { 169 smps12_reg: smps12 { 170 /* VDD_DSPEVE */ 171 regulator-name = "smps12"; 172 regulator-min-microvolt = <850000>; 173 regulator-max-microvolt = <1250000>; 174 regulator-always-on; 175 regulator-boot-on; 176 }; 177 178 smps3_reg: smps3 { 179 /* VDD_CORE */ 180 regulator-name = "smps3"; 181 regulator-min-microvolt = <850000>; 182 regulator-max-microvolt = <1250000>; 183 regulator-boot-on; 184 regulator-always-on; 185 }; 186 187 smps4_reg: smps4 { 188 /* VDD_IVA */ 189 regulator-name = "smps4"; 190 regulator-min-microvolt = <850000>; 191 regulator-max-microvolt = <1250000>; 192 regulator-always-on; 193 regulator-boot-on; 194 }; 195 196 smps5_reg: smps5 { 197 /* VDDS1V8 */ 198 regulator-name = "smps5"; 199 regulator-min-microvolt = <1800000>; 200 regulator-max-microvolt = <1800000>; 201 regulator-boot-on; 202 regulator-always-on; 203 }; 204 205 ldo1_reg: ldo1 { 206 /* LDO1_OUT --> VDA_PHY1_1V8 */ 207 regulator-name = "ldo1"; 208 regulator-min-microvolt = <1800000>; 209 regulator-max-microvolt = <1800000>; 210 regulator-always-on; 211 regulator-boot-on; 212 regulator-allow-bypass; 213 }; 214 215 ldo2_reg: ldo2 { 216 /* LDO2_OUT --> VDA_PHY2_1V8 */ 217 regulator-name = "ldo2"; 218 regulator-min-microvolt = <1800000>; 219 regulator-max-microvolt = <1800000>; 220 regulator-allow-bypass; 221 regulator-always-on; 222 }; 223 224 ldo3_reg: ldo3 { 225 /* VDA_USB_3V3 */ 226 regulator-name = "ldo3"; 227 regulator-min-microvolt = <3300000>; 228 regulator-max-microvolt = <3300000>; 229 regulator-boot-on; 230 regulator-always-on; 231 }; 232 233 ldo5_reg: ldo5 { 234 /* VDDA_1V8_PLL */ 235 regulator-name = "ldo5"; 236 regulator-min-microvolt = <1800000>; 237 regulator-max-microvolt = <1800000>; 238 regulator-always-on; 239 regulator-boot-on; 240 }; 241 242 ldo4_reg: ldo4 { 243 /* VDD_SDIO_DV */ 244 regulator-name = "ldo4"; 245 regulator-min-microvolt = <1800000>; 246 regulator-max-microvolt = <3300000>; 247 regulator-boot-on; 248 regulator-always-on; 249 }; 250 }; 251 }; 252 253 tps65917_power_button { 254 compatible = "ti,palmas-pwrbutton"; 255 interrupt-parent = <&tps65917>; 256 interrupts = <1 IRQ_TYPE_NONE>; 257 wakeup-source; 258 ti,palmas-long-press-seconds = <6>; 259 }; 260 }; 261 262 lp87565: lp87565@60 { 263 compatible = "ti,lp87565-q1"; 264 reg = <0x60>; 265 266 buck10-in-supply =<&vsys_3v3>; 267 buck23-in-supply =<&vsys_3v3>; 268 269 regulators: regulators { 270 buck10_reg: buck10 { 271 /*VDD_MPU*/ 272 regulator-name = "buck10"; 273 regulator-min-microvolt = <850000>; 274 regulator-max-microvolt = <1250000>; 275 regulator-always-on; 276 regulator-boot-on; 277 }; 278 279 buck23_reg: buck23 { 280 /* VDD_GPU*/ 281 regulator-name = "buck23"; 282 regulator-min-microvolt = <850000>; 283 regulator-max-microvolt = <1250000>; 284 regulator-boot-on; 285 regulator-always-on; 286 }; 287 }; 288 }; 289 290 pcf_lcd: pcf8757@20 { 291 compatible = "ti,pcf8575", "nxp,pcf8575"; 292 reg = <0x20>; 293 gpio-controller; 294 #gpio-cells = <2>; 295 interrupt-controller; 296 #interrupt-cells = <2>; 297 interrupt-parent = <&gpio1>; 298 interrupts = <3 IRQ_TYPE_EDGE_FALLING>; 299 }; 300 301 pcf_gpio_21: pcf8757@21 { 302 compatible = "ti,pcf8575", "nxp,pcf8575"; 303 reg = <0x21>; 304 gpio-controller; 305 #gpio-cells = <2>; 306 interrupt-parent = <&gpio1>; 307 interrupts = <3 IRQ_TYPE_EDGE_FALLING>; 308 interrupt-controller; 309 #interrupt-cells = <2>; 310 }; 311 312 pcf_hdmi: pcf8575@26 { 313 compatible = "ti,pcf8575", "nxp,pcf8575"; 314 reg = <0x26>; 315 gpio-controller; 316 #gpio-cells = <2>; 317 p1 { 318 /* vin6_sel_s0: high: VIN6, low: audio */ 319 gpio-hog; 320 gpios = <1 GPIO_ACTIVE_HIGH>; 321 output-low; 322 line-name = "vin6_sel_s0"; 323 }; 324 }; 325 326 tlv320aic3106: tlv320aic3106@19 { 327 #sound-dai-cells = <0>; 328 compatible = "ti,tlv320aic3106"; 329 reg = <0x19>; 330 adc-settle-ms = <40>; 331 ai3x-micbias-vg = <1>; /* 2.0V */ 332 status = "okay"; 333 334 /* Regulators */ 335 AVDD-supply = <&vio_3v3>; 336 IOVDD-supply = <&vio_3v3>; 337 DRVDD-supply = <&vio_3v3>; 338 DVDD-supply = <&aic_dvdd>; 339 }; 340}; 341 342&cpu0 { 343 vdd-supply = <&buck10_reg>; 344}; 345 346&mmc1 { 347 status = "okay"; 348 vmmc-supply = <&vio_3v3_sd>; 349 vmmc_aux-supply = <&ldo4_reg>; 350 bus-width = <4>; 351 /* 352 * SDCD signal is not being used here - using the fact that GPIO mode 353 * is always hardwired. 354 */ 355 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; 356 pinctrl-names = "default"; 357 pinctrl-0 = <&mmc1_pins_default>; 358}; 359 360&mmc2 { 361 status = "okay"; 362 vmmc-supply = <&vio_1v8>; 363 bus-width = <8>; 364 pinctrl-names = "default"; 365 pinctrl-0 = <&mmc2_pins_default>; 366}; 367 368/* No RTC on this device */ 369&rtc { 370 status = "disabled"; 371}; 372 373&mac { 374 status = "okay"; 375 376 dual_emac; 377}; 378 379&cpsw_emac0 { 380 phy_id = <&davinci_mdio>, <2>; 381 phy-mode = "rgmii-id"; 382 dual_emac_res_vlan = <1>; 383}; 384 385&cpsw_emac1 { 386 phy_id = <&davinci_mdio>, <3>; 387 phy-mode = "rgmii-id"; 388 dual_emac_res_vlan = <2>; 389}; 390 391&davinci_mdio { 392 dp83867_0: ethernet-phy@2 { 393 reg = <2>; 394 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; 395 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; 396 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; 397 ti,min-output-impedance; 398 ti,dp83867-rxctrl-strap-quirk; 399 }; 400 401 dp83867_1: ethernet-phy@3 { 402 reg = <3>; 403 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; 404 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; 405 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; 406 ti,min-output-impedance; 407 ti,dp83867-rxctrl-strap-quirk; 408 }; 409}; 410 411&usb2_phy1 { 412 phy-supply = <&ldo3_reg>; 413}; 414 415&usb2_phy2 { 416 phy-supply = <&ldo3_reg>; 417}; 418 419&qspi { 420 spi-max-frequency = <96000000>; 421 m25p80@0 { 422 spi-max-frequency = <96000000>; 423 }; 424}; 425