1/* 2 * Copyright 2011 Freescale Semiconductor, Inc. 3 * Copyright 2011 Linaro Ltd. 4 * 5 * The code contained herein is licensed under the GNU General Public 6 * License. You may obtain a copy of the GNU General Public License 7 * Version 2 or later at the following locations: 8 * 9 * http://www.opensource.org/licenses/gpl-license.html 10 * http://www.gnu.org/copyleft/gpl.html 11 */ 12 13/dts-v1/; 14#include "imx53.dtsi" 15 16/ { 17 model = "Freescale i.MX53 Smart Mobile Reference Design Board"; 18 compatible = "fsl,imx53-smd", "fsl,imx53"; 19 20 memory { 21 reg = <0x70000000 0x40000000>; 22 }; 23 24 gpio-keys { 25 compatible = "gpio-keys"; 26 27 volume-up { 28 label = "Volume Up"; 29 gpios = <&gpio2 14 0>; 30 linux,code = <115>; /* KEY_VOLUMEUP */ 31 }; 32 33 volume-down { 34 label = "Volume Down"; 35 gpios = <&gpio2 15 0>; 36 linux,code = <114>; /* KEY_VOLUMEDOWN */ 37 }; 38 }; 39}; 40 41&esdhc1 { 42 pinctrl-names = "default"; 43 pinctrl-0 = <&pinctrl_esdhc1>; 44 cd-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>; 45 wp-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; 46 status = "okay"; 47}; 48 49&esdhc2 { 50 pinctrl-names = "default"; 51 pinctrl-0 = <&pinctrl_esdhc2>; 52 non-removable; 53 status = "okay"; 54}; 55 56&uart3 { 57 pinctrl-names = "default"; 58 pinctrl-0 = <&pinctrl_uart3>; 59 uart-has-rtscts; 60 status = "okay"; 61}; 62 63&ecspi1 { 64 pinctrl-names = "default"; 65 pinctrl-0 = <&pinctrl_ecspi1>; 66 cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; 67 status = "okay"; 68 69 zigbee: mc1323@0 { 70 compatible = "fsl,mc1323"; 71 spi-max-frequency = <8000000>; 72 reg = <0>; 73 }; 74 75 flash: m25p32@1 { 76 #address-cells = <1>; 77 #size-cells = <1>; 78 compatible = "st,m25p32", "st,m25p", "jedec,spi-nor"; 79 spi-max-frequency = <20000000>; 80 reg = <1>; 81 82 partition@0 { 83 label = "U-Boot"; 84 reg = <0x0 0x40000>; 85 read-only; 86 }; 87 88 partition@40000 { 89 label = "Kernel"; 90 reg = <0x40000 0x3c0000>; 91 }; 92 }; 93}; 94 95&esdhc3 { 96 pinctrl-names = "default"; 97 pinctrl-0 = <&pinctrl_esdhc3>; 98 non-removable; 99 status = "okay"; 100}; 101 102&iomuxc { 103 pinctrl-names = "default"; 104 pinctrl-0 = <&pinctrl_hog>; 105 106 imx53-smd { 107 pinctrl_hog: hoggrp { 108 fsl,pins = < 109 MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000 110 MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000 111 MX53_PAD_EIM_EB2__GPIO2_30 0x80000000 112 MX53_PAD_EIM_DA13__GPIO3_13 0x80000000 113 MX53_PAD_EIM_D19__GPIO3_19 0x80000000 114 MX53_PAD_KEY_ROW2__GPIO4_11 0x80000000 115 MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 116 >; 117 }; 118 119 pinctrl_ecspi1: ecspi1grp { 120 fsl,pins = < 121 MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000 122 MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000 123 MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000 124 >; 125 }; 126 127 pinctrl_esdhc1: esdhc1grp { 128 fsl,pins = < 129 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 130 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 131 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 132 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 133 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 134 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 135 >; 136 }; 137 138 pinctrl_esdhc2: esdhc2grp { 139 fsl,pins = < 140 MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5 141 MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5 142 MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5 143 MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5 144 MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5 145 MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5 146 >; 147 }; 148 149 pinctrl_esdhc3: esdhc3grp { 150 fsl,pins = < 151 MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5 152 MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5 153 MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5 154 MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5 155 MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5 156 MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5 157 MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5 158 MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5 159 MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5 160 MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5 161 >; 162 }; 163 164 pinctrl_fec: fecgrp { 165 fsl,pins = < 166 MX53_PAD_FEC_MDC__FEC_MDC 0x80000000 167 MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000 168 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000 169 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000 170 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000 171 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000 172 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000 173 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 174 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000 175 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000 176 >; 177 }; 178 179 pinctrl_i2c1: i2c1grp { 180 fsl,pins = < 181 MX53_PAD_CSI0_DAT8__I2C1_SDA 0xc0000000 182 MX53_PAD_CSI0_DAT9__I2C1_SCL 0xc0000000 183 >; 184 }; 185 186 pinctrl_i2c2: i2c2grp { 187 fsl,pins = < 188 MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000 189 MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000 190 >; 191 }; 192 193 pinctrl_uart1: uart1grp { 194 fsl,pins = < 195 MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4 196 MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1e4 197 >; 198 }; 199 200 pinctrl_uart2: uart2grp { 201 fsl,pins = < 202 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4 203 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4 204 >; 205 }; 206 207 pinctrl_uart3: uart3grp { 208 fsl,pins = < 209 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4 210 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4 211 MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4 212 MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4 213 >; 214 }; 215 }; 216}; 217 218&uart1 { 219 pinctrl-names = "default"; 220 pinctrl-0 = <&pinctrl_uart1>; 221 status = "okay"; 222}; 223 224&uart2 { 225 pinctrl-names = "default"; 226 pinctrl-0 = <&pinctrl_uart2>; 227 status = "okay"; 228}; 229 230&i2c2 { 231 pinctrl-names = "default"; 232 pinctrl-0 = <&pinctrl_i2c2>; 233 status = "okay"; 234 235 codec: sgtl5000@0a { 236 compatible = "fsl,sgtl5000"; 237 reg = <0x0a>; 238 }; 239 240 magnetometer: mag3110@0e { 241 compatible = "fsl,mag3110"; 242 reg = <0x0e>; 243 }; 244 245 touchkey: mpr121@5a { 246 compatible = "fsl,mpr121"; 247 reg = <0x5a>; 248 }; 249}; 250 251&i2c1 { 252 pinctrl-names = "default"; 253 pinctrl-0 = <&pinctrl_i2c1>; 254 status = "okay"; 255 256 accelerometer: mma8450@1c { 257 compatible = "fsl,mma8450"; 258 reg = <0x1c>; 259 }; 260 261 camera: ov5642@3c { 262 compatible = "ovti,ov5642"; 263 reg = <0x3c>; 264 }; 265 266 pmic: dialog@48 { 267 compatible = "dlg,da9053", "dlg,da9052"; 268 reg = <0x48>; 269 }; 270}; 271 272&fec { 273 pinctrl-names = "default"; 274 pinctrl-0 = <&pinctrl_fec>; 275 phy-mode = "rmii"; 276 phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; 277 status = "okay"; 278}; 279