1/* 2 * Support for imx6 based Advantech DMS-BA16 Qseven module 3 * 4 * Copyright 2015 Timesys Corporation. 5 * Copyright 2015 General Electric Company 6 * 7 * This file is dual-licensed: you can use it either under the terms 8 * of the GPL or the X11 license, at your option. Note that this dual 9 * licensing only applies to this file, and not this project as a 10 * whole. 11 * 12 * a) This file is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License 14 * version 2 as published by the Free Software Foundation. 15 * 16 * This file is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * Or, alternatively, 22 * 23 * b) Permission is hereby granted, free of charge, to any person 24 * obtaining a copy of this software and associated documentation 25 * files (the "Software"), to deal in the Software without 26 * restriction, including without limitation the rights to use, 27 * copy, modify, merge, publish, distribute, sublicense, and/or 28 * sell copies of the Software, and to permit persons to whom the 29 * Software is furnished to do so, subject to the following 30 * conditions: 31 * 32 * The above copyright notice and this permission notice shall be 33 * included in all copies or substantial portions of the Software. 34 * 35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 42 * OTHER DEALINGS IN THE SOFTWARE. 43 */ 44 45#include "imx6q.dtsi" 46#include <dt-bindings/gpio/gpio.h> 47 48/ { 49 memory { 50 reg = <0x10000000 0x40000000>; 51 }; 52 53 backlight_lvds: backlight { 54 compatible = "pwm-backlight"; 55 pinctrl-names = "default"; 56 pinctrl-0 = <&pinctrl_display>; 57 pwms = <&pwm1 0 5000000>; 58 brightness-levels = < 0 1 2 3 4 5 6 7 8 9 59 10 11 12 13 14 15 16 17 18 19 60 20 21 22 23 24 25 26 27 28 29 61 30 31 32 33 34 35 36 37 38 39 62 40 41 42 43 44 45 46 47 48 49 63 50 51 52 53 54 55 56 57 58 59 64 60 61 62 63 64 65 66 67 68 69 65 70 71 72 73 74 75 76 77 78 79 66 80 81 82 83 84 85 86 87 88 89 67 90 91 92 93 94 95 96 97 98 99 68 100 101 102 103 104 105 106 107 108 109 69 110 111 112 113 114 115 116 117 118 119 70 120 121 122 123 124 125 126 127 128 129 71 130 131 132 133 134 135 136 137 138 139 72 140 141 142 143 144 145 146 147 148 149 73 150 151 152 153 154 155 156 157 158 159 74 160 161 162 163 164 165 166 167 168 169 75 170 171 172 173 174 175 176 177 178 179 76 180 181 182 183 184 185 186 187 188 189 77 190 191 192 193 194 195 196 197 198 199 78 200 201 202 203 204 205 206 207 208 209 79 210 211 212 213 214 215 216 217 218 219 80 220 221 222 223 224 225 226 227 228 229 81 230 231 232 233 234 235 236 237 238 239 82 240 241 242 243 244 245 246 247 248 249 83 250 251 252 253 254 255>; 84 default-brightness-level = <255>; 85 enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; 86 }; 87 88 reg_1p8v: regulator-1p8v { 89 compatible = "regulator-fixed"; 90 regulator-name = "1P8V"; 91 regulator-min-microvolt = <1800000>; 92 regulator-max-microvolt = <1800000>; 93 regulator-always-on; 94 }; 95 96 reg_3p3v: regulator-3p3v { 97 compatible = "regulator-fixed"; 98 regulator-name = "3P3V"; 99 regulator-min-microvolt = <3300000>; 100 regulator-max-microvolt = <3300000>; 101 regulator-always-on; 102 }; 103 104 reg_lvds: regulator-lvds { 105 compatible = "regulator-fixed"; 106 regulator-name = "lvds_ppen"; 107 regulator-min-microvolt = <3300000>; 108 regulator-max-microvolt = <3300000>; 109 regulator-boot-on; 110 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 111 enable-active-high; 112 }; 113 114 reg_usb_h1_vbus: regulator-usbh1vbus { 115 compatible = "regulator-fixed"; 116 regulator-name = "usb_h1_vbus"; 117 regulator-min-microvolt = <5000000>; 118 regulator-max-microvolt = <5000000>; 119 }; 120 121 reg_usb_otg_vbus: regulator-usbotgvbus { 122 compatible = "regulator-fixed"; 123 regulator-name = "usb_otg_vbus"; 124 regulator-min-microvolt = <5000000>; 125 regulator-max-microvolt = <5000000>; 126 }; 127}; 128 129&audmux { 130 pinctrl-names = "default"; 131 pinctrl-0 = <&pinctrl_audmux>; 132 status = "okay"; 133}; 134 135&ecspi1 { 136 cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>; 137 pinctrl-names = "default"; 138 pinctrl-0 = <&pinctrl_ecspi1>; 139 status = "okay"; 140 141 flash: n25q032@0 { 142 compatible = "jedec,spi-nor"; 143 #address-cells = <1>; 144 #size-cells = <1>; 145 spi-max-frequency = <20000000>; 146 reg = <0>; 147 148 partition@0 { 149 label = "U-Boot"; 150 reg = <0x0 0xc0000>; 151 }; 152 153 partition@c0000 { 154 label = "env"; 155 reg = <0xc0000 0x10000>; 156 }; 157 158 partition@d0000 { 159 label = "spare"; 160 reg = <0xd0000 0x130000>; 161 }; 162 }; 163}; 164 165&fec { 166 pinctrl-names = "default"; 167 pinctrl-0 = <&pinctrl_enet>; 168 phy-mode = "rgmii"; 169 status = "okay"; 170}; 171 172&hdmi { 173 ddc-i2c-bus = <&i2c2>; 174 status = "okay"; 175}; 176 177&i2c1 { 178 clock-frequency = <100000>; 179 pinctrl-names = "default"; 180 pinctrl-0 = <&pinctrl_i2c1>; 181 status = "okay"; 182}; 183 184&i2c2 { 185 clock-frequency = <100000>; 186 pinctrl-names = "default"; 187 pinctrl-0 = <&pinctrl_i2c2>; 188 status = "okay"; 189}; 190 191&i2c3 { 192 clock-frequency = <100000>; 193 pinctrl-names = "default"; 194 pinctrl-0 = <&pinctrl_i2c3>; 195 status = "okay"; 196 197 pmic@58 { 198 compatible = "dlg,da9063"; 199 reg = <0x58>; 200 pinctrl-names = "default"; 201 pinctrl-0 = <&pinctrl_pmic>; 202 interrupt-parent = <&gpio7>; 203 interrupts = <13 IRQ_TYPE_LEVEL_LOW>; 204 205 onkey { 206 compatible = "dlg,da9063-onkey"; 207 }; 208 209 regulators { 210 vdd_bcore1: bcore1 { 211 regulator-min-microvolt = <1420000>; 212 regulator-max-microvolt = <1420000>; 213 regulator-always-on; 214 regulator-boot-on; 215 }; 216 217 vdd_bcore2: bcore2 { 218 regulator-min-microvolt = <1420000>; 219 regulator-max-microvolt = <1420000>; 220 regulator-always-on; 221 regulator-boot-on; 222 }; 223 224 vdd_bpro: bpro { 225 regulator-min-microvolt = <1500000>; 226 regulator-max-microvolt = <1500000>; 227 regulator-always-on; 228 regulator-boot-on; 229 }; 230 231 vdd_bmem: bmem { 232 regulator-min-microvolt = <1800000>; 233 regulator-max-microvolt = <1800000>; 234 regulator-always-on; 235 regulator-boot-on; 236 }; 237 238 vdd_bio: bio { 239 regulator-min-microvolt = <1800000>; 240 regulator-max-microvolt = <1800000>; 241 regulator-always-on; 242 regulator-boot-on; 243 }; 244 245 vdd_bperi: bperi { 246 regulator-min-microvolt = <3300000>; 247 regulator-max-microvolt = <3300000>; 248 regulator-always-on; 249 regulator-boot-on; 250 }; 251 252 vdd_ldo1: ldo1 { 253 regulator-min-microvolt = <600000>; 254 regulator-max-microvolt = <1860000>; 255 }; 256 257 vdd_ldo2: ldo2 { 258 regulator-min-microvolt = <600000>; 259 regulator-max-microvolt = <1860000>; 260 }; 261 262 vdd_ldo3: ldo3 { 263 regulator-min-microvolt = <900000>; 264 regulator-max-microvolt = <3440000>; 265 }; 266 267 vdd_ldo4: ldo4 { 268 regulator-min-microvolt = <900000>; 269 regulator-max-microvolt = <3440000>; 270 }; 271 272 vdd_ldo5: ldo5 { 273 regulator-min-microvolt = <900000>; 274 regulator-max-microvolt = <3600000>; 275 }; 276 277 vdd_ldo6: ldo6 { 278 regulator-min-microvolt = <900000>; 279 regulator-max-microvolt = <3600000>; 280 }; 281 282 vdd_ldo7: ldo7 { 283 regulator-min-microvolt = <900000>; 284 regulator-max-microvolt = <3600000>; 285 }; 286 287 vdd_ldo8: ldo8 { 288 regulator-min-microvolt = <900000>; 289 regulator-max-microvolt = <3600000>; 290 }; 291 292 vdd_ldo9: ldo9 { 293 regulator-min-microvolt = <950000>; 294 regulator-max-microvolt = <3600000>; 295 }; 296 297 vdd_ldo10: ldo10 { 298 regulator-min-microvolt = <900000>; 299 regulator-max-microvolt = <3600000>; 300 }; 301 302 vdd_ldo11: ldo11 { 303 regulator-min-microvolt = <900000>; 304 regulator-max-microvolt = <3600000>; 305 regulator-always-on; 306 regulator-boot-on; 307 }; 308 }; 309 }; 310 311 rtc@32 { 312 compatible = "epson,rx8010"; 313 pinctrl-names = "default"; 314 pinctrl-0 = <&pinctrl_rtc>; 315 reg = <0x32>; 316 interrupt-parent = <&gpio4>; 317 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; 318 }; 319}; 320 321&pcie { 322 pinctrl-names = "default"; 323 pinctrl-0 = <&pinctrl_pcie>; 324 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>; 325 fsl,tx-swing-full = <103>; 326 fsl,tx-swing-low = <103>; 327 status = "okay"; 328}; 329 330&pwm1 { 331 pinctrl-names = "default"; 332 pinctrl-0 = <&pinctrl_pwm1>; 333 status = "okay"; 334}; 335 336&pwm2 { 337 pinctrl-names = "default"; 338 pinctrl-0 = <&pinctrl_pwm2>; 339 status = "disabled"; 340}; 341 342&sata { 343 status = "okay"; 344}; 345 346&ssi1 { 347 status = "okay"; 348}; 349 350&uart3 { 351 pinctrl-names = "default"; 352 pinctrl-0 = <&pinctrl_uart3>; 353 uart-has-rtscts; 354 status = "okay"; 355}; 356 357&uart4 { 358 pinctrl-names = "default"; 359 pinctrl-0 = <&pinctrl_uart4>; 360 status = "okay"; 361}; 362 363&usbh1 { 364 pinctrl-names = "default"; 365 pinctrl-0 = <&pinctrl_usbhub>; 366 vbus-supply = <®_usb_h1_vbus>; 367 reset-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>; 368 status = "okay"; 369}; 370 371&usbotg { 372 vbus-supply = <®_usb_otg_vbus>; 373 pinctrl-names = "default"; 374 pinctrl-0 = <&pinctrl_usbotg>; 375 disable-over-current; 376 status = "okay"; 377}; 378 379&usdhc2 { 380 pinctrl-names = "default"; 381 pinctrl-0 = <&pinctrl_usdhc2>; 382 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 383 no-1-8-v; 384 keep-power-in-suspend; 385 wakeup-source; 386 status = "okay"; 387}; 388 389&usdhc3 { 390 pinctrl-names = "default"; 391 pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>; 392 bus-width = <8>; 393 vmmc-supply = <&vdd_bperi>; 394 non-removable; 395 keep-power-in-suspend; 396 status = "okay"; 397}; 398 399&wdog1 { 400 pinctrl-names = "default"; 401 pinctrl-0 = <&pinctrl_wdog>; 402 fsl,ext-reset-output; 403}; 404 405&iomuxc { 406 pinctrl-names = "default"; 407 pinctrl-0 = <&pinctrl_hog>; 408 409 pinctrl_audmux: audmuxgrp { 410 fsl,pins = < 411 MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0 412 MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0 413 MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0 414 MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0 415 >; 416 }; 417 418 pinctrl_display: dispgrp { 419 fsl,pins = < 420 /* BLEN_OUT */ 421 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 422 /* LVDS_PPEN_OUT */ 423 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 424 >; 425 }; 426 427 pinctrl_ecspi1: ecspi1grp { 428 fsl,pins = < 429 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 430 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 431 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 432 /* SPI1 CS */ 433 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 434 >; 435 }; 436 437 pinctrl_ecspi5: ecspi5grp { 438 fsl,pins = < 439 MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x1b0b0 440 MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x1b0b0 441 MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x1b0b0 442 MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0 443 >; 444 }; 445 446 pinctrl_enet: enetgrp { 447 fsl,pins = < 448 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 449 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 450 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 451 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 452 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 453 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 454 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 455 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 456 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 457 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 458 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 459 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 460 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 461 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 462 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 463 /* FEC Reset */ 464 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 465 /* AR8033 Interrupt */ 466 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 467 >; 468 }; 469 470 pinctrl_hog: hoggrp { 471 fsl,pins = < 472 /* GPIO 0-7 */ 473 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0 474 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 475 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 476 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 477 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0 478 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b0 479 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 480 MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x1b0b0 481 /* SUS_S3_OUT to CPLD */ 482 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 483 >; 484 }; 485 486 pinctrl_i2c1: i2c1grp { 487 fsl,pins = < 488 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 489 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 490 >; 491 }; 492 493 pinctrl_i2c2: i2c2grp { 494 fsl,pins = < 495 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 496 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 497 >; 498 }; 499 500 pinctrl_i2c3: i2c3grp { 501 fsl,pins = < 502 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 503 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 504 >; 505 }; 506 507 pinctrl_pcie: pciegrp { 508 fsl,pins = < 509 /* PCIe Reset */ 510 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 511 /* PCIe Wake */ 512 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0 513 >; 514 }; 515 516 pinctrl_pmic: pmicgrp { 517 fsl,pins = < 518 /* PMIC Interrupt */ 519 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0 520 >; 521 }; 522 523 pinctrl_pwm1: pwm1grp { 524 fsl,pins = < 525 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 526 >; 527 }; 528 529 pinctrl_pwm2: pwm2grp { 530 fsl,pins = < 531 MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1 532 >; 533 }; 534 535 pinctrl_rtc: rtcgrp { 536 fsl,pins = < 537 /* RTC_INT */ 538 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 539 >; 540 }; 541 542 pinctrl_uart3: uart3grp { 543 fsl,pins = < 544 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 545 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 546 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 547 MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1 548 >; 549 }; 550 551 pinctrl_uart4: uart4grp { 552 fsl,pins = < 553 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 554 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 555 >; 556 }; 557 558 pinctrl_usbhub: usbhubgrp { 559 fsl,pins = < 560 /* HUB_RESET */ 561 MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x1b0b0 562 >; 563 }; 564 565 pinctrl_usbotg: usbotggrp { 566 fsl,pins = < 567 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 568 >; 569 }; 570 571 pinctrl_usdhc2: usdhc2grp { 572 fsl,pins = < 573 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 574 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 575 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 576 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 577 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 578 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 579 /* uSDHC2 CD */ 580 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 581 >; 582 }; 583 584 pinctrl_usdhc3: usdhc3grp { 585 fsl,pins = < 586 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 587 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 588 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 589 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 590 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 591 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 592 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 593 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 594 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 595 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 596 >; 597 }; 598 599 pinctrl_usdhc3_reset: usdhc3grp-reset { 600 fsl,pins = < 601 MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9 602 >; 603 }; 604 605 pinctrl_usdhc4: usdhc4grp { 606 fsl,pins = < 607 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 608 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x17059 609 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 610 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 611 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 612 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 613 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 614 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 615 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 616 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 617 /* uSDHC4 CD */ 618 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0 619 /* uSDHC4 SDIO PWR */ 620 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0 621 /* uSDHC4 SDIO WP */ 622 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 623 /* uSDHC4 SDIO LED */ 624 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0 625 >; 626 }; 627 628 pinctrl_wdog: wdoggrp { 629 fsl,pins = < 630 MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0 631 >; 632 }; 633}; 634