1/* 2 * support for the imx6 based aristainetos2 board 3 * 4 * Copyright (C) 2015 Heiko Schocher <hs@denx.de> 5 * 6 * This file is dual-licensed: you can use it either under the terms 7 * of the GPL or the X11 license, at your option. Note that this dual 8 * licensing only applies to this file, and not this project as a 9 * whole. 10 * 11 * a) This file is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License 13 * version 2 as published by the Free Software Foundation. 14 * 15 * This file is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * Or, alternatively, 21 * 22 * b) Permission is hereby granted, free of charge, to any person 23 * obtaining a copy of this software and associated documentation 24 * files (the "Software"), to deal in the Software without 25 * restriction, including without limitation the rights to use, 26 * copy, modify, merge, publish, distribute, sublicense, and/or 27 * sell copies of the Software, and to permit persons to whom the 28 * Software is furnished to do so, subject to the following 29 * conditions: 30 * 31 * The above copyright notice and this permission notice shall be 32 * included in all copies or substantial portions of the Software. 33 * 34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 41 * OTHER DEALINGS IN THE SOFTWARE. 42 */ 43#include <dt-bindings/gpio/gpio.h> 44#include <dt-bindings/clock/imx6qdl-clock.h> 45 46/ { 47 backlight: backlight { 48 compatible = "pwm-backlight"; 49 pwms = <&pwm1 0 5000000>; 50 brightness-levels = <0 4 8 16 32 64 128 255>; 51 default-brightness-level = <7>; 52 enable-gpios = <&gpio6 31 GPIO_ACTIVE_HIGH>; 53 }; 54 55 regulators { 56 compatible = "simple-bus"; 57 58 reg_2p5v: 2p5v { 59 compatible = "regulator-fixed"; 60 regulator-name = "2P5V"; 61 regulator-min-microvolt = <2500000>; 62 regulator-max-microvolt = <2500000>; 63 regulator-always-on; 64 }; 65 66 reg_3p3v: 3p3v { 67 compatible = "regulator-fixed"; 68 regulator-name = "3P3V"; 69 regulator-min-microvolt = <3300000>; 70 regulator-max-microvolt = <3300000>; 71 regulator-always-on; 72 }; 73 74 reg_usbh1_vbus: usb-h1-vbus { 75 compatible = "regulator-fixed"; 76 enable-active-high; 77 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; 78 pinctrl-names = "default"; 79 pinctrl-0 = <&pinctrl_aristainetos2_usbh1_vbus>; 80 regulator-name = "usb_h1_vbus"; 81 regulator-min-microvolt = <5000000>; 82 regulator-max-microvolt = <5000000>; 83 }; 84 85 reg_usbotg_vbus: usb-otg-vbus { 86 compatible = "regulator-fixed"; 87 enable-active-high; 88 gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>; 89 pinctrl-names = "default"; 90 pinctrl-0 = <&pinctrl_aristainetos2_usbotg_vbus>; 91 regulator-name = "usb_otg_vbus"; 92 regulator-min-microvolt = <5000000>; 93 regulator-max-microvolt = <5000000>; 94 }; 95 }; 96}; 97 98&audmux { 99 pinctrl-names = "default"; 100 pinctrl-0 = <&pinctrl_audmux>; 101 status = "okay"; 102}; 103 104&can1 { 105 pinctrl-names = "default"; 106 pinctrl-0 = <&pinctrl_flexcan1>; 107 status = "okay"; 108}; 109 110&can2 { 111 pinctrl-names = "default"; 112 pinctrl-0 = <&pinctrl_flexcan2>; 113 status = "okay"; 114}; 115 116&ecspi1 { 117 cs-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH 118 &gpio4 10 GPIO_ACTIVE_HIGH 119 &gpio4 11 GPIO_ACTIVE_HIGH>; 120 pinctrl-names = "default"; 121 pinctrl-0 = <&pinctrl_ecspi1>; 122 status = "okay"; 123}; 124 125&ecspi2 { 126 cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH &gpio2 27 GPIO_ACTIVE_HIGH>; 127 pinctrl-names = "default"; 128 pinctrl-0 = <&pinctrl_ecspi2>; 129 status = "okay"; 130}; 131 132&ecspi4 { 133 cs-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH &gpio5 2 GPIO_ACTIVE_HIGH>; 134 pinctrl-names = "default"; 135 pinctrl-0 = <&pinctrl_ecspi4>; 136 status = "okay"; 137 138 flash: m25p80@1 { 139 #address-cells = <1>; 140 #size-cells = <1>; 141 compatible = "micron,n25q128a11", "jedec,spi-nor"; 142 spi-max-frequency = <20000000>; 143 reg = <1>; 144 }; 145}; 146 147&i2c1 { 148 pinctrl-names = "default"; 149 pinctrl-0 = <&pinctrl_i2c1>; 150 status = "okay"; 151 152 pmic@58 { 153 compatible = "dlg,da9063"; 154 reg = <0x58>; 155 interrupt-parent = <&gpio1>; 156 interrupts = <04 0x8>; 157 158 regulators { 159 bcore1 { 160 regulator-name = "bcore1"; 161 regulator-always-on = <1>; 162 regulator-min-microvolt = <300000>; 163 regulator-max-microvolt = <3300000>; 164 }; 165 166 bcore2 { 167 regulator-name = "bcore2"; 168 regulator-always-on = <1>; 169 regulator-min-microvolt = <300000>; 170 regulator-max-microvolt = <3300000>; 171 }; 172 173 bpro { 174 regulator-name = "bpro"; 175 regulator-always-on = <1>; 176 regulator-min-microvolt = <300000>; 177 regulator-max-microvolt = <3300000>; 178 }; 179 180 bperi { 181 regulator-name = "bperi"; 182 regulator-always-on = <1>; 183 regulator-min-microvolt = <300000>; 184 regulator-max-microvolt = <3300000>; 185 }; 186 187 bmem { 188 regulator-name = "bmem"; 189 regulator-always-on = <1>; 190 regulator-min-microvolt = <300000>; 191 regulator-max-microvolt = <3300000>; 192 }; 193 194 ldo2 { 195 regulator-name = "ldo2"; 196 regulator-always-on = <1>; 197 regulator-min-microvolt = <300000>; 198 regulator-max-microvolt = <1800000>; 199 }; 200 201 ldo3 { 202 regulator-name = "ldo3"; 203 regulator-always-on = <1>; 204 regulator-min-microvolt = <300000>; 205 regulator-max-microvolt = <3300000>; 206 }; 207 208 ldo4 { 209 regulator-name = "ldo4"; 210 regulator-always-on = <1>; 211 regulator-min-microvolt = <300000>; 212 regulator-max-microvolt = <3300000>; 213 }; 214 215 ldo5 { 216 regulator-name = "ldo5"; 217 regulator-always-on = <1>; 218 regulator-min-microvolt = <300000>; 219 regulator-max-microvolt = <3300000>; 220 }; 221 222 ldo6 { 223 regulator-name = "ldo6"; 224 regulator-always-on = <1>; 225 regulator-min-microvolt = <300000>; 226 regulator-max-microvolt = <3300000>; 227 }; 228 229 ldo7 { 230 regulator-name = "ldo7"; 231 regulator-always-on = <1>; 232 regulator-min-microvolt = <300000>; 233 regulator-max-microvolt = <3300000>; 234 }; 235 236 ldo8 { 237 regulator-name = "ldo8"; 238 regulator-always-on = <1>; 239 regulator-min-microvolt = <300000>; 240 regulator-max-microvolt = <3300000>; 241 }; 242 243 ldo9 { 244 regulator-name = "ldo9"; 245 regulator-always-on = <1>; 246 regulator-min-microvolt = <300000>; 247 regulator-max-microvolt = <3300000>; 248 }; 249 250 ldo10 { 251 regulator-name = "ldo10"; 252 regulator-always-on = <1>; 253 regulator-min-microvolt = <300000>; 254 regulator-max-microvolt = <3300000>; 255 }; 256 257 ldo11 { 258 regulator-name = "ldo11"; 259 regulator-always-on = <1>; 260 regulator-min-microvolt = <300000>; 261 regulator-max-microvolt = <3300000>; 262 }; 263 264 bio { 265 regulator-name = "bio"; 266 regulator-always-on = <1>; 267 regulator-min-microvolt = <1800000>; 268 regulator-max-microvolt = <1800000>; 269 }; 270 }; 271 }; 272 273 tmp103: tmp103@71 { 274 compatible = "ti,tmp103"; 275 reg = <0x71>; 276 }; 277}; 278 279&i2c2 { 280 pinctrl-names = "default"; 281 pinctrl-0 = <&pinctrl_i2c2>; 282 status = "okay"; 283}; 284 285&i2c3 { 286 pinctrl-names = "default"; 287 pinctrl-0 = <&pinctrl_i2c3>; 288 status = "okay"; 289 290 expander: tca6416@20 { 291 compatible = "ti,tca6416"; 292 reg = <0x20>; 293 #gpio-cells = <2>; 294 gpio-controller; 295 }; 296 297 rtc@68 { 298 compatible = "dallas,m41t00"; 299 reg = <0x68>; 300 }; 301}; 302 303&i2c4 { 304 pinctrl-names = "default"; 305 pinctrl-0 = <&pinctrl_i2c4>; 306 status = "okay"; 307 308 eeprom@50{ 309 compatible = "atmel,24c64"; 310 reg = <0x50>; 311 }; 312 313 eeprom@57{ 314 compatible = "atmel,24c64"; 315 reg = <0x57>; 316 }; 317}; 318 319&fec { 320 pinctrl-names = "default"; 321 pinctrl-0 = <&pinctrl_enet>; 322 phy-mode = "rgmii"; 323 phy-reset-gpios = <&gpio7 18 GPIO_ACTIVE_LOW>; 324 txd0-skew-ps = <0>; 325 txd1-skew-ps = <0>; 326 txd2-skew-ps = <0>; 327 txd3-skew-ps = <0>; 328 status = "okay"; 329}; 330 331&gpmi { 332 pinctrl-names = "default"; 333 pinctrl-0 = <&pinctrl_gpmi_nand>; 334 status = "okay"; 335}; 336 337&pcie { 338 reset-gpio = <&gpio2 16 GPIO_ACTIVE_LOW>; 339 status = "okay"; 340}; 341 342&pwm1 { 343 pinctrl-names = "default"; 344 pinctrl-0 = <&pinctrl_pwm1>; 345 status = "okay"; 346}; 347 348&uart1 { 349 pinctrl-names = "default"; 350 pinctrl-0 = <&pinctrl_uart1>; 351 uart-has-rtscts; 352 status = "okay"; 353}; 354 355&uart2 { 356 pinctrl-names = "default"; 357 pinctrl-0 = <&pinctrl_uart2>; 358 status = "okay"; 359}; 360 361&uart3 { 362 pinctrl-names = "default"; 363 pinctrl-0 = <&pinctrl_uart3>; 364 uart-has-rtscts; 365 status = "okay"; 366}; 367 368&uart4 { 369 pinctrl-names = "default"; 370 pinctrl-0 = <&pinctrl_uart4>; 371 status = "okay"; 372}; 373 374&usbh1 { 375 vbus-supply = <®_usbh1_vbus>; 376 dr_mode = "host"; 377 status = "okay"; 378}; 379 380&usbotg { 381 vbus-supply = <®_usbotg_vbus>; 382 pinctrl-names = "default"; 383 pinctrl-0 = <&pinctrl_usbotg>; 384 disable-over-current; 385 dr_mode = "host"; 386 status = "okay"; 387}; 388 389&usdhc1 { 390 pinctrl-names = "default"; 391 pinctrl-0 = <&pinctrl_usdhc1>; 392 cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; 393 no-1-8-v; 394 status = "okay"; 395}; 396 397&usdhc2 { 398 pinctrl-names = "default"; 399 pinctrl-0 = <&pinctrl_usdhc2>; 400 cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; 401 wp-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; 402 no-1-8-v; 403 status = "okay"; 404}; 405 406&iomuxc { 407 pinctrl-names = "default"; 408 pinctrl-0 = <&pinctrl_gpio>; 409 410 pinctrl_audmux: audmux { 411 fsl,pins = < 412 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x1b0b0 413 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x1b0b0 414 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x1b0b0 415 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0 416 >; 417 }; 418 419 pinctrl_ecspi1: ecspi1grp { 420 fsl,pins = < 421 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 422 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 423 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 424 MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x100b1 /* SS0# */ 425 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x100b1 /* SS1# */ 426 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x100b1 /* SS2# */ 427 >; 428 }; 429 430 pinctrl_ecspi2: ecspi2grp { 431 fsl,pins = < 432 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 433 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1 434 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1 435 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1 /* SS0# */ 436 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x100b1 /* SS1# */ 437 >; 438 }; 439 440 pinctrl_ecspi4: ecspi4grp { 441 fsl,pins = < 442 MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1 443 MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1 444 MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1 445 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x100b1 /* SS0# */ 446 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b1 /* SS1# */ 447 MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x1b0b0 /* WP pin */ 448 >; 449 }; 450 451 pinctrl_enet: enetgrp { 452 fsl,pins = < 453 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 454 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 455 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 456 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 457 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 458 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 459 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 460 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 461 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 462 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 463 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 464 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 465 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 466 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 467 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 468 >; 469 }; 470 471 pinctrl_flexcan1: flexcan1grp { 472 fsl,pins = < 473 MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x1b0b0 474 MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x1b0b0 475 >; 476 }; 477 478 pinctrl_flexcan2: flexcan2grp { 479 fsl,pins = < 480 MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX 0x1b0b0 481 MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX 0x1b0b0 482 >; 483 }; 484 485 pinctrl_gpio: gpiogrp { 486 fsl,pins = < 487 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 /* led enable */ 488 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 /* LCD power enable */ 489 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0 /* led yellow */ 490 MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x1b0b0 /* led red */ 491 MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b0b0 /* led green */ 492 MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x1b0b0 /* led blue */ 493 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* Profibus IRQ */ 494 MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b0 /* FPGA IRQ */ 495 MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x1b0b0 /* spi bus #2 SS driver enable */ 496 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0 /* RST_LOC# PHY reset input (has pull-down!)*/ 497 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x1b0b0 /* USB_OTG_ID = GPIO1_24*/ 498 MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x1b0b0 /* Touchscreen IRQ */ 499 MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x1b0b0 /* PCIe reset */ 500 >; 501 }; 502 503 pinctrl_gpmi_nand: gpmi-nand { 504 fsl,pins = < 505 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 506 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 507 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 508 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 509 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 510 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 511 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 512 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 513 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 514 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 515 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 516 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 517 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 518 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 519 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 520 >; 521 }; 522 523 pinctrl_i2c1: i2c1grp { 524 fsl,pins = < 525 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 526 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 527 >; 528 }; 529 530 pinctrl_i2c2: i2c2grp { 531 fsl,pins = < 532 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 533 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 534 >; 535 }; 536 537 pinctrl_i2c3: i2c3grp { 538 fsl,pins = < 539 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 540 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 541 >; 542 }; 543 544 pinctrl_i2c4: i2c4grp { 545 fsl,pins = < 546 MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1 547 MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1 548 >; 549 }; 550 551 pinctrl_pwm1: pwm1grp { 552 fsl,pins = < 553 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b0 554 MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0 /* backlight enable */ 555 >; 556 }; 557 558 pinctrl_uart1: uart1grp { 559 fsl,pins = < 560 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 561 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 562 MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1 563 MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x1b0b1 564 >; 565 }; 566 567 pinctrl_uart2: uart2grp { 568 fsl,pins = < 569 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 570 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 571 >; 572 }; 573 574 pinctrl_uart3: uart3grp { 575 fsl,pins = < 576 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 577 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 578 MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1 579 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 580 >; 581 }; 582 583 pinctrl_uart4: uart4grp { 584 fsl,pins = < 585 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 586 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 587 >; 588 }; 589 590 pinctrl_usbotg: usbotggrp { 591 fsl,pins = < 592 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 593 >; 594 }; 595 596 pinctrl_aristainetos2_usbh1_vbus: aristainetos-usbh1-vbus { 597 fsl,pins = <MX6QDL_PAD_GPIO_0__USB_H1_PWR 0x130b0>; 598 }; 599 600 pinctrl_aristainetos2_usbotg_vbus: aristainetos-usbotg-vbus { 601 fsl,pins = <MX6QDL_PAD_KEY_ROW4__USB_OTG_PWR 0x130b0>; 602 }; 603 604 pinctrl_usdhc1: usdhc1grp { 605 fsl,pins = < 606 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059 607 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059 608 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059 609 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059 610 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059 611 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059 612 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1b0b0 /* SD1 card detect input */ 613 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b0b0 /* SD1 write protect input */ 614 >; 615 }; 616 617 pinctrl_usdhc2: usdhc2grp { 618 fsl,pins = < 619 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x71 620 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x71 621 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x71 622 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x71 623 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x71 624 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x71 625 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b0 /* SD2 level shifter output enable */ 626 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 /* SD2 card detect input */ 627 MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0 /* SD2 write protect input */ 628 >; 629 }; 630}; 631