1/* 2 * Copyright (C) 2016 Amarula Solutions B.V. 3 * Copyright (C) 2016 Engicam S.r.l. 4 * 5 * This file is dual-licensed: you can use it either under the terms 6 * of the GPL or the X11 license, at your option. Note that this dual 7 * licensing only applies to this file, and not this project as a 8 * whole. 9 * 10 * a) This file is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * version 2 as published by the Free Software Foundation. 13 * 14 * This file is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * Or, alternatively, 20 * 21 * b) Permission is hereby granted, free of charge, to any person 22 * obtaining a copy of this software and associated documentation 23 * files (the "Software"), to deal in the Software without 24 * restriction, including without limitation the rights to use, 25 * copy, modify, merge, publish, distribute, sublicense, and/or 26 * sell copies of the Software, and to permit persons to whom the 27 * Software is furnished to do so, subject to the following 28 * conditions: 29 * 30 * The above copyright notice and this permission notice shall be 31 * included in all copies or substantial portions of the Software. 32 * 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43#include <dt-bindings/gpio/gpio.h> 44#include <dt-bindings/input/input.h> 45 46/ { 47 memory { 48 reg = <0x10000000 0x80000000>; 49 }; 50 51 backlight { 52 compatible = "pwm-backlight"; 53 pwms = <&pwm3 0 100000>; 54 brightness-levels = <0 4 8 16 32 64 128 255>; 55 default-brightness-level = <7>; 56 }; 57 58 reg_3p3v: regulator-3p3v { 59 compatible = "regulator-fixed"; 60 regulator-name = "3P3V"; 61 regulator-min-microvolt = <3300000>; 62 regulator-max-microvolt = <3300000>; 63 regulator-boot-on; 64 regulator-always-on; 65 }; 66 67 reg_usb_h1_vbus: regulator-usb-h1-vbus { 68 compatible = "regulator-fixed"; 69 regulator-name = "usb_h1_vbus"; 70 regulator-min-microvolt = <5000000>; 71 regulator-max-microvolt = <5000000>; 72 regulator-boot-on; 73 regulator-always-on; 74 }; 75 76 reg_usb_otg_vbus: regulator-usb-otg-vbus { 77 compatible = "regulator-fixed"; 78 regulator-name = "usb_otg_vbus"; 79 regulator-min-microvolt = <5000000>; 80 regulator-max-microvolt = <5000000>; 81 regulator-boot-on; 82 regulator-always-on; 83 }; 84 85 rmii_clk: clock-rmii-clk { 86 compatible = "fixed-clock"; 87 #clock-cells = <0>; 88 clock-frequency = <25000000>; /* 25MHz for example */ 89 }; 90}; 91 92&can1 { 93 pinctrl-names = "default"; 94 pinctrl-0 = <&pinctrl_flexcan1>; 95 xceiver-supply = <®_3p3v>; 96}; 97 98&can2 { 99 pinctrl-names = "default"; 100 pinctrl-0 = <&pinctrl_flexcan2>; 101 xceiver-supply = <®_3p3v>; 102}; 103 104&clks { 105 assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>; 106 assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>; 107}; 108 109&fec { 110 pinctrl-names = "default"; 111 pinctrl-0 = <&pinctrl_enet>; 112 phy-reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; 113 clocks = <&clks IMX6QDL_CLK_ENET>, <&clks IMX6QDL_CLK_ENET>, <&rmii_clk>; 114 phy-mode = "rmii"; 115 status = "okay"; 116}; 117 118&gpmi { 119 pinctrl-names = "default"; 120 pinctrl-0 = <&pinctrl_gpmi_nand>; 121 nand-on-flash-bbt; 122 status = "okay"; 123}; 124 125&i2c1 { 126 clock-frequency = <100000>; 127 pinctrl-names = "default"; 128 pinctrl-0 = <&pinctrl_i2c1>; 129 status = "okay"; 130}; 131 132&i2c2 { 133 clock-frequency = <100000>; 134 pinctrl-names = "default"; 135 pinctrl-0 = <&pinctrl_i2c2>; 136 status = "okay"; 137}; 138 139&i2c3 { 140 clock-frequency = <100000>; 141 pinctrl-names = "default"; 142 pinctrl-0 = <&pinctrl_i2c3>; 143 status = "okay"; 144}; 145 146&pwm3 { 147 pinctrl-names = "default"; 148 pinctrl-0 = <&pinctrl_pwm3>; 149 status = "okay"; 150}; 151 152&uart4 { 153 pinctrl-names = "default"; 154 pinctrl-0 = <&pinctrl_uart4>; 155 status = "okay"; 156}; 157 158&usbh1 { 159 vbus-supply = <®_usb_h1_vbus>; 160 disable-over-current; 161 status = "okay"; 162}; 163 164&usbotg { 165 vbus-supply = <®_usb_otg_vbus>; 166 pinctrl-names = "default"; 167 pinctrl-0 = <&pinctrl_usbotg>; 168 disable-over-current; 169 status = "okay"; 170}; 171 172&usdhc1 { 173 pinctrl-names = "default"; 174 pinctrl-0 = <&pinctrl_usdhc1>; 175 cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; 176 no-1-8-v; 177 status = "okay"; 178}; 179 180&iomuxc { 181 pinctrl_enet: enetgrp { 182 fsl,pins = < 183 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 184 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b1 185 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 186 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 187 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 188 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 189 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 190 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 191 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 192 MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1b0b0 193 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 194 >; 195 }; 196 197 pinctrl_flexcan1: flexcan1grp { 198 fsl,pins = < 199 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b020 200 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b020 201 >; 202 }; 203 204 pinctrl_flexcan2: flexcan2grp { 205 fsl,pins = < 206 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b020 207 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b020 208 >; 209 }; 210 211 pinctrl_gpmi_nand: gpmi-nand { 212 fsl,pins = < 213 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 214 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 215 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 216 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 217 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 218 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 219 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 220 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 221 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 222 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 223 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 224 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 225 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 226 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 227 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 228 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 229 MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 230 >; 231 }; 232 233 pinctrl_i2c1: i2c1grp { 234 fsl,pins = < 235 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 236 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 237 >; 238 }; 239 240 pinctrl_i2c2: i2c2grp { 241 fsl,pins = < 242 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 243 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 244 >; 245 }; 246 247 pinctrl_i2c3: i2c3grp { 248 fsl,pins = < 249 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 250 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 251 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 252 >; 253 }; 254 255 pinctrl_uart4: uart4grp { 256 fsl,pins = < 257 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 258 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 259 >; 260 }; 261 262 pinctrl_pwm3: pwm3grp { 263 fsl,pins = < 264 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 265 >; 266 }; 267 268 pinctrl_usbotg: usbotggrp { 269 fsl,pins = < 270 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 271 >; 272 }; 273 274 pinctrl_usdhc1: usdhc1grp { 275 fsl,pins = < 276 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17070 277 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10070 278 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17070 279 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17070 280 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17070 281 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17070 282 >; 283 }; 284}; 285