1/* 2 * Copyright 2017 NXP 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPL or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This file is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of the 12 * License, or (at your option) any later version. 13 * 14 * This file is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * Or, alternatively, 20 * 21 * b) Permission is hereby granted, free of charge, to any person 22 * obtaining a copy of this software and associated documentation 23 * files (the "Software"), to deal in the Software without 24 * restriction, including without limitation the rights to use, 25 * copy, modify, merge, publish, distribute, sublicense, and/or 26 * sell copies of the Software, and to permit persons to whom the 27 * Software is furnished to do so, subject to the following 28 * conditions: 29 * 30 * The above copyright notice and this permission notice shall be 31 * included in all copies or substantial portions of the Software. 32 * 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43/dts-v1/; 44 45#include "imx7d.dtsi" 46 47/ { 48 model = "Technexion Pico i.MX7D Board"; 49 compatible = "technexion,imx7d-pico", "fsl,imx7d"; 50 51 memory { 52 reg = <0x80000000 0x80000000>; 53 }; 54 55 reg_2p5v: regulator-2p5v { 56 compatible = "regulator-fixed"; 57 regulator-name = "2P5V"; 58 regulator-min-microvolt = <2500000>; 59 regulator-max-microvolt = <2500000>; 60 regulator-always-on; 61 }; 62 63 reg_3p3v: regulator-3p3v { 64 compatible = "regulator-fixed"; 65 regulator-name = "3P3V"; 66 regulator-min-microvolt = <3300000>; 67 regulator-max-microvolt = <3300000>; 68 regulator-always-on; 69 }; 70 71 reg_usb_otg1_vbus: regulator-usb-otg1-vbus { 72 compatible = "regulator-fixed"; 73 regulator-name = "usb_otg1_vbus"; 74 regulator-min-microvolt = <5000000>; 75 regulator-max-microvolt = <5000000>; 76 gpio = <&gpio4 5 GPIO_ACTIVE_LOW>; 77 }; 78 79 reg_usb_otg2_vbus: regulator-usb-otg2-vbus { 80 compatible = "regulator-fixed"; 81 regulator-name = "usb_otg2_vbus"; 82 regulator-min-microvolt = <5000000>; 83 regulator-max-microvolt = <5000000>; 84 }; 85 86 reg_vref_1v8: regulator-vref-1v8 { 87 compatible = "regulator-fixed"; 88 regulator-name = "vref-1v8"; 89 regulator-min-microvolt = <1800000>; 90 regulator-max-microvolt = <1800000>; 91 }; 92 93 sound { 94 compatible = "simple-audio-card"; 95 simple-audio-card,name = "imx7-sgtl5000"; 96 simple-audio-card,format = "i2s"; 97 simple-audio-card,bitclock-master = <&dailink_master>; 98 simple-audio-card,frame-master = <&dailink_master>; 99 simple-audio-card,cpu { 100 sound-dai = <&sai1>; 101 }; 102 103 dailink_master: simple-audio-card,codec { 104 sound-dai = <&codec>; 105 clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; 106 }; 107 }; 108}; 109 110&fec1 { 111 pinctrl-names = "default"; 112 pinctrl-0 = <&pinctrl_enet1>; 113 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, 114 <&clks IMX7D_ENET1_TIME_ROOT_CLK>; 115 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; 116 assigned-clock-rates = <0>, <100000000>; 117 phy-mode = "rgmii"; 118 phy-handle = <ðphy0>; 119 fsl,magic-packet; 120 status = "okay"; 121 122 mdio { 123 #address-cells = <1>; 124 #size-cells = <0>; 125 126 ethphy0: ethernet-phy@1 { 127 compatible = "ethernet-phy-ieee802.3-c22"; 128 reg = <1>; 129 status = "okay"; 130 }; 131 }; 132}; 133 134&i2c1 { 135 clock-frequency = <100000>; 136 pinctrl-names = "default"; 137 pinctrl-0 = <&pinctrl_i2c1>; 138 status = "okay"; 139 140 codec: sgtl5000@0a { 141 #sound-dai-cells = <0>; 142 reg = <0x0a>; 143 compatible = "fsl,sgtl5000"; 144 clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; 145 VDDA-supply = <®_2p5v>; 146 VDDIO-supply = <®_vref_1v8>; 147 }; 148}; 149 150&i2c4 { 151 pinctrl-names = "default"; 152 pinctrl-0 = <&pinctrl_i2c4>; 153 status = "okay"; 154 155 pmic: pfuze3000@08 { 156 compatible = "fsl,pfuze3000"; 157 reg = <0x08>; 158 159 regulators { 160 sw1a_reg: sw1a { 161 regulator-min-microvolt = <700000>; 162 regulator-max-microvolt = <3300000>; 163 regulator-boot-on; 164 regulator-always-on; 165 regulator-ramp-delay = <6250>; 166 }; 167 /* use sw1c_reg to align with pfuze100/pfuze200 */ 168 sw1c_reg: sw1b { 169 regulator-min-microvolt = <700000>; 170 regulator-max-microvolt = <1475000>; 171 regulator-boot-on; 172 regulator-always-on; 173 regulator-ramp-delay = <6250>; 174 }; 175 176 sw2_reg: sw2 { 177 regulator-min-microvolt = <1800000>; 178 regulator-max-microvolt = <1850000>; 179 regulator-boot-on; 180 regulator-always-on; 181 }; 182 183 sw3a_reg: sw3 { 184 regulator-min-microvolt = <900000>; 185 regulator-max-microvolt = <1650000>; 186 regulator-boot-on; 187 regulator-always-on; 188 }; 189 190 swbst_reg: swbst { 191 regulator-min-microvolt = <5000000>; 192 regulator-max-microvolt = <5150000>; 193 }; 194 195 snvs_reg: vsnvs { 196 regulator-min-microvolt = <1000000>; 197 regulator-max-microvolt = <3000000>; 198 regulator-boot-on; 199 regulator-always-on; 200 }; 201 202 vref_reg: vrefddr { 203 regulator-boot-on; 204 regulator-always-on; 205 }; 206 207 vgen1_reg: vldo1 { 208 regulator-min-microvolt = <1800000>; 209 regulator-max-microvolt = <3300000>; 210 regulator-always-on; 211 }; 212 213 vgen2_reg: vldo2 { 214 regulator-min-microvolt = <800000>; 215 regulator-max-microvolt = <1550000>; 216 }; 217 218 vgen3_reg: vccsd { 219 regulator-min-microvolt = <2850000>; 220 regulator-max-microvolt = <3300000>; 221 regulator-always-on; 222 }; 223 224 vgen4_reg: v33 { 225 regulator-min-microvolt = <2850000>; 226 regulator-max-microvolt = <3300000>; 227 regulator-always-on; 228 }; 229 230 vgen5_reg: vldo3 { 231 regulator-min-microvolt = <1800000>; 232 regulator-max-microvolt = <3300000>; 233 regulator-always-on; 234 }; 235 236 vgen6_reg: vldo4 { 237 regulator-min-microvolt = <1800000>; 238 regulator-max-microvolt = <3300000>; 239 regulator-always-on; 240 }; 241 }; 242 }; 243}; 244 245&sai1 { 246 pinctrl-names = "default"; 247 pinctrl-0 = <&pinctrl_sai1>; 248 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>, 249 <&clks IMX7D_SAI1_ROOT_CLK>; 250 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>; 251 assigned-clock-rates = <0>, <24576000>; 252 status = "okay"; 253}; 254 255&uart5 { 256 pinctrl-names = "default"; 257 pinctrl-0 = <&pinctrl_uart5>; 258 assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>; 259 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; 260 status = "okay"; 261}; 262 263&usbotg1 { 264 vbus-supply = <®_usb_otg1_vbus>; 265 status = "okay"; 266}; 267 268&usbotg2 { 269 vbus-supply = <®_usb_otg2_vbus>; 270 dr_mode = "host"; 271 status = "okay"; 272}; 273 274&usdhc3 { 275 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 276 pinctrl-0 = <&pinctrl_usdhc3>; 277 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 278 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 279 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; 280 assigned-clock-rates = <400000000>; 281 bus-width = <8>; 282 no-1-8-v; 283 fsl,tuning-step = <2>; 284 non-removable; 285 status = "okay"; 286}; 287 288&wdog1 { 289 pinctrl-names = "default"; 290 pinctrl-0 = <&pinctrl_wdog>; 291 fsl,ext-reset-output; 292 status = "okay"; 293}; 294 295&iomuxc { 296 pinctrl_enet1: enet1grp { 297 fsl,pins = < 298 MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3 299 MX7D_PAD_SD2_WP__ENET1_MDC 0x3 300 MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1 301 MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1 302 MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1 303 MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1 304 MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1 305 MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1 306 MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1 307 MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1 308 MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1 309 MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1 310 MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1 311 MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1 312 >; 313 }; 314 315 pinctrl_i2c1: i2c1grp { 316 fsl,pins = < 317 MX7D_PAD_UART1_TX_DATA__I2C1_SDA 0x4000007f 318 MX7D_PAD_UART1_RX_DATA__I2C1_SCL 0x4000007f 319 >; 320 }; 321 322 pinctrl_i2c4: i2c4grp { 323 fsl,pins = < 324 MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f 325 MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f 326 >; 327 }; 328 329 pinctrl_sai1: sai1grp { 330 fsl,pins = < 331 MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f 332 MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC 0x1f 333 MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30 334 MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0 0x1f 335 >; 336 }; 337 338 pinctrl_uart5: uart5grp { 339 fsl,pins = < 340 MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x79 341 MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x79 342 >; 343 }; 344 345 pinctrl_usbotg1_pwr: usbotg_pwr { 346 fsl,pins = < 347 MX7D_PAD_UART3_TX_DATA__GPIO4_IO5 0x14 348 >; 349 }; 350 351 pinctrl_usdhc3: usdhc3grp { 352 fsl,pins = < 353 MX7D_PAD_SD3_CMD__SD3_CMD 0x59 354 MX7D_PAD_SD3_CLK__SD3_CLK 0x19 355 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 356 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 357 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 358 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 359 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 360 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 361 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 362 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 363 >; 364 }; 365 366 pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { 367 fsl,pins = < 368 MX7D_PAD_SD3_CMD__SD3_CMD 0x5a 369 MX7D_PAD_SD3_CLK__SD3_CLK 0x1a 370 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a 371 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a 372 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a 373 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a 374 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a 375 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a 376 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a 377 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a 378 >; 379 }; 380 381 pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { 382 fsl,pins = < 383 MX7D_PAD_SD3_CMD__SD3_CMD 0x5b 384 MX7D_PAD_SD3_CLK__SD3_CLK 0x1b 385 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b 386 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b 387 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b 388 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b 389 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b 390 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b 391 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b 392 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b 393 >; 394 }; 395}; 396 397&iomuxc_lpsr { 398 pinctrl_wdog: wdoggrp { 399 fsl,pins = < 400 MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74 401 >; 402 }; 403}; 404