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1/*
2 * Copyright 2013-2014 Texas Instruments, Inc.
3 *
4 * Keystone 2 Edison soc device tree
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <dt-bindings/reset/ti-syscon.h>
12
13/ {
14	compatible = "ti,k2e", "ti,keystone";
15	model = "Texas Instruments Keystone 2 Edison SoC";
16
17	cpus {
18		#address-cells = <1>;
19		#size-cells = <0>;
20
21		interrupt-parent = <&gic>;
22
23		cpu@0 {
24			compatible = "arm,cortex-a15";
25			device_type = "cpu";
26			reg = <0>;
27		};
28
29		cpu@1 {
30			compatible = "arm,cortex-a15";
31			device_type = "cpu";
32			reg = <1>;
33		};
34
35		cpu@2 {
36			compatible = "arm,cortex-a15";
37			device_type = "cpu";
38			reg = <2>;
39		};
40
41		cpu@3 {
42			compatible = "arm,cortex-a15";
43			device_type = "cpu";
44			reg = <3>;
45		};
46	};
47
48	aliases {
49		rproc0 = &dsp0;
50	};
51
52	soc {
53		/include/ "keystone-k2e-clocks.dtsi"
54
55		usb: usb@2680000 {
56			interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
57			dwc3@2690000 {
58				interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
59			};
60		};
61
62		usb1_phy: usb_phy@2620750 {
63			compatible = "ti,keystone-usbphy";
64			#address-cells = <1>;
65			#size-cells = <1>;
66			reg = <0x2620750 24>;
67			status = "disabled";
68		};
69
70		keystone_usb1: usb@25000000 {
71			compatible = "ti,keystone-dwc3";
72			#address-cells = <1>;
73			#size-cells = <1>;
74			reg = <0x25000000 0x10000>;
75			clocks = <&clkusb1>;
76			clock-names = "usb";
77			interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
78			ranges;
79			dma-coherent;
80			dma-ranges;
81			status = "disabled";
82
83			usb1: dwc3@25010000 {
84				compatible = "synopsys,dwc3";
85				reg = <0x25010000 0x70000>;
86				interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
87				usb-phy = <&usb1_phy>, <&usb1_phy>;
88			};
89		};
90
91		msm_ram: msmram@0c000000 {
92			compatible = "mmio-sram";
93			reg = <0x0c000000 0x200000>;
94			ranges = <0x0 0x0c000000 0x200000>;
95			#address-cells = <1>;
96			#size-cells = <1>;
97
98			sram-bm@1f0000 {
99				reg = <0x001f0000 0x8000>;
100			};
101		};
102
103		psc: power-sleep-controller@02350000 {
104			pscrst: reset-controller {
105				compatible = "ti,k2e-pscrst", "ti,syscon-reset";
106				#reset-cells = <1>;
107
108				ti,reset-bits = <
109					0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
110				>;
111			};
112		};
113
114		dspgpio0: keystone_dsp_gpio@02620240 {
115			compatible = "ti,keystone-dsp-gpio";
116			gpio-controller;
117			#gpio-cells = <2>;
118			gpio,syscon-dev = <&devctrl 0x240>;
119		};
120
121		dsp0: dsp@10800000 {
122			compatible = "ti,k2e-dsp";
123			reg = <0x10800000 0x00080000>,
124			      <0x10e00000 0x00008000>,
125			      <0x10f00000 0x00008000>;
126			reg-names = "l2sram", "l1pram", "l1dram";
127			clocks = <&clkgem0>;
128			ti,syscon-dev = <&devctrl 0x844>;
129			resets = <&pscrst 0>;
130			interrupt-parent = <&kirq0>;
131			interrupts = <0 8>;
132			interrupt-names = "vring", "exception";
133			kick-gpios = <&dspgpio0 27 0>;
134			status = "disabled";
135		};
136
137		pcie1: pcie@21020000 {
138			compatible = "ti,keystone-pcie","snps,dw-pcie";
139			clocks = <&clkpcie1>;
140			clock-names = "pcie";
141			#address-cells = <3>;
142			#size-cells = <2>;
143			reg =  <0x21021000 0x2000>, <0x21020000 0x1000>, <0x02620128 4>;
144			ranges = <0x82000000 0 0x60000000 0x60000000
145				  0 0x10000000>;
146
147			status = "disabled";
148			device_type = "pci";
149			num-lanes = <2>;
150			bus-range = <0x00 0xff>;
151
152			/* error interrupt */
153			interrupts = <GIC_SPI 385 IRQ_TYPE_EDGE_RISING>;
154			#interrupt-cells = <1>;
155			interrupt-map-mask = <0 0 0 7>;
156			interrupt-map = <0 0 0 1 &pcie_intc1 0>, /* INT A */
157					<0 0 0 2 &pcie_intc1 1>, /* INT B */
158					<0 0 0 3 &pcie_intc1 2>, /* INT C */
159					<0 0 0 4 &pcie_intc1 3>; /* INT D */
160
161			pcie_msi_intc1: msi-interrupt-controller {
162				interrupt-controller;
163				#interrupt-cells = <1>;
164				interrupt-parent = <&gic>;
165				interrupts = <GIC_SPI 377 IRQ_TYPE_EDGE_RISING>,
166					<GIC_SPI 378 IRQ_TYPE_EDGE_RISING>,
167					<GIC_SPI 379 IRQ_TYPE_EDGE_RISING>,
168					<GIC_SPI 380 IRQ_TYPE_EDGE_RISING>,
169					<GIC_SPI 381 IRQ_TYPE_EDGE_RISING>,
170					<GIC_SPI 382 IRQ_TYPE_EDGE_RISING>,
171					<GIC_SPI 383 IRQ_TYPE_EDGE_RISING>,
172					<GIC_SPI 384 IRQ_TYPE_EDGE_RISING>;
173			};
174
175			pcie_intc1: legacy-interrupt-controller {
176				interrupt-controller;
177				#interrupt-cells = <1>;
178				interrupt-parent = <&gic>;
179				interrupts = <GIC_SPI 373 IRQ_TYPE_EDGE_RISING>,
180					<GIC_SPI 374 IRQ_TYPE_EDGE_RISING>,
181					<GIC_SPI 375 IRQ_TYPE_EDGE_RISING>,
182					<GIC_SPI 376 IRQ_TYPE_EDGE_RISING>;
183			};
184		};
185
186		mdio: mdio@24200f00 {
187			compatible	= "ti,keystone_mdio", "ti,davinci_mdio";
188			#address-cells = <1>;
189			#size-cells = <0>;
190			reg = <0x24200f00 0x100>;
191			status = "disabled";
192			clocks = <&clkcpgmac>;
193			clock-names = "fck";
194			bus_freq	= <2500000>;
195		};
196		/include/ "keystone-k2e-netcp.dtsi"
197	};
198};
199