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1/*
2 * Copyright 2017 Sean Wang <sean.wang@mediatek.com>
3 *
4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 */
6
7/dts-v1/;
8#include <dt-bindings/input/input.h>
9#include "mt7623.dtsi"
10#include "mt6323.dtsi"
11
12/ {
13	model = "Bananapi BPI-R2";
14	compatible = "bananapi,bpi-r2", "mediatek,mt7623";
15
16	aliases {
17		serial2 = &uart2;
18	};
19
20	chosen {
21		stdout-path = "serial2:115200n8";
22	};
23
24	cpus {
25		cpu@0 {
26			proc-supply = <&mt6323_vproc_reg>;
27		};
28
29		cpu@1 {
30			proc-supply = <&mt6323_vproc_reg>;
31		};
32
33		cpu@2 {
34			proc-supply = <&mt6323_vproc_reg>;
35		};
36
37		cpu@3 {
38			proc-supply = <&mt6323_vproc_reg>;
39		};
40	};
41
42	reg_3p3v: regulator-3p3v {
43		compatible = "regulator-fixed";
44		regulator-name = "fixed-3.3V";
45		regulator-min-microvolt = <3300000>;
46		regulator-max-microvolt = <3300000>;
47		regulator-boot-on;
48		regulator-always-on;
49	};
50
51	reg_5v: regulator-5v {
52		compatible = "regulator-fixed";
53		regulator-name = "fixed-5V";
54		regulator-min-microvolt = <5000000>;
55		regulator-max-microvolt = <5000000>;
56		regulator-boot-on;
57		regulator-always-on;
58	};
59
60	gpio_keys {
61		compatible = "gpio-keys";
62		pinctrl-names = "default";
63		pinctrl-0 = <&key_pins_a>;
64
65		factory {
66			label = "factory";
67			linux,code = <BTN_0>;
68			gpios = <&pio 256 GPIO_ACTIVE_LOW>;
69		};
70
71		wps {
72			label = "wps";
73			linux,code = <KEY_WPS_BUTTON>;
74			gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
75		};
76	};
77
78	leds {
79		compatible = "gpio-leds";
80		pinctrl-names = "default";
81		pinctrl-0 = <&led_pins_a>;
82
83		blue {
84			label = "bpi-r2:pio:blue";
85			gpios = <&pio 241 GPIO_ACTIVE_HIGH>;
86			default-state = "off";
87		};
88
89		green {
90			label = "bpi-r2:pio:green";
91			gpios = <&pio 240 GPIO_ACTIVE_HIGH>;
92			default-state = "off";
93		};
94
95		red {
96			label = "bpi-r2:pio:red";
97			gpios = <&pio 239 GPIO_ACTIVE_HIGH>;
98			default-state = "off";
99		};
100	};
101
102	memory@80000000 {
103		device_type = "memory";
104		reg = <0 0x80000000 0 0x40000000>;
105	};
106};
107
108&cir {
109	pinctrl-names = "default";
110	pinctrl-0 = <&cir_pins_a>;
111	status = "okay";
112};
113
114&crypto {
115	status = "okay";
116};
117
118&eth {
119	status = "okay";
120
121	gmac0: mac@0 {
122		compatible = "mediatek,eth-mac";
123		reg = <0>;
124		phy-mode = "trgmii";
125
126		fixed-link {
127			speed = <1000>;
128			full-duplex;
129			pause;
130		};
131	};
132
133	mdio: mdio-bus {
134		#address-cells = <1>;
135		#size-cells = <0>;
136
137		switch@0 {
138			compatible = "mediatek,mt7530";
139			#address-cells = <1>;
140			#size-cells = <0>;
141			reg = <0>;
142			pinctrl-names = "default";
143			reset-gpios = <&pio 33 0>;
144			core-supply = <&mt6323_vpa_reg>;
145			io-supply = <&mt6323_vemc3v3_reg>;
146
147			ports {
148				#address-cells = <1>;
149				#size-cells = <0>;
150				reg = <0>;
151
152				port@0 {
153					reg = <0>;
154					label = "wan";
155				};
156
157				port@1 {
158					reg = <1>;
159					label = "lan0";
160				};
161
162				port@2 {
163					reg = <2>;
164					label = "lan1";
165				};
166
167				port@3 {
168					reg = <3>;
169					label = "lan2";
170				};
171
172				port@4 {
173					reg = <4>;
174					label = "lan3";
175				};
176
177				port@6 {
178					reg = <6>;
179					label = "cpu";
180					ethernet = <&gmac0>;
181					phy-mode = "trgmii";
182
183					fixed-link {
184						speed = <1000>;
185						full-duplex;
186					};
187				};
188			};
189		};
190	};
191};
192
193&i2c0 {
194	pinctrl-names = "default";
195	pinctrl-0 = <&i2c0_pins_a>;
196	status = "okay";
197};
198
199&i2c1 {
200	pinctrl-names = "default";
201	pinctrl-0 = <&i2c1_pins_a>;
202	status = "okay";
203};
204
205&mmc0 {
206	pinctrl-names = "default", "state_uhs";
207	pinctrl-0 = <&mmc0_pins_default>;
208	pinctrl-1 = <&mmc0_pins_uhs>;
209	status = "okay";
210	bus-width = <8>;
211	max-frequency = <50000000>;
212	cap-mmc-highspeed;
213	vmmc-supply = <&mt6323_vemc3v3_reg>;
214	vqmmc-supply = <&mt6323_vio18_reg>;
215	non-removable;
216};
217
218&mmc1 {
219	pinctrl-names = "default", "state_uhs";
220	pinctrl-0 = <&mmc1_pins_default>;
221	pinctrl-1 = <&mmc1_pins_uhs>;
222	status = "okay";
223	bus-width = <4>;
224	max-frequency = <50000000>;
225	cap-sd-highspeed;
226	cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
227	vmmc-supply = <&mt6323_vmch_reg>;
228	vqmmc-supply = <&mt6323_vio18_reg>;
229};
230
231&pio {
232	cir_pins_a:cir@0 {
233		pins_cir {
234			pinmux = <MT7623_PIN_46_IR_FUNC_IR>;
235			bias-disable;
236		};
237	};
238
239	i2c0_pins_a: i2c@0 {
240		pins_i2c0 {
241			pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
242				 <MT7623_PIN_76_SCL0_FUNC_SCL0>;
243			bias-disable;
244		};
245	};
246
247	i2c1_pins_a: i2c@1 {
248		pin_i2c1 {
249			pinmux = <MT7623_PIN_57_SDA1_FUNC_SDA1>,
250				 <MT7623_PIN_58_SCL1_FUNC_SCL1>;
251			bias-disable;
252		};
253	};
254
255	i2s0_pins_a: i2s@0 {
256		pin_i2s0 {
257			pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>,
258				 <MT7623_PIN_72_I2S0_DATA_IN_FUNC_I2S0_DATA_IN>,
259				 <MT7623_PIN_73_I2S0_LRCK_FUNC_I2S0_LRCK>,
260				 <MT7623_PIN_74_I2S0_BCK_FUNC_I2S0_BCK>,
261				 <MT7623_PIN_126_I2S0_MCLK_FUNC_I2S0_MCLK>;
262			drive-strength = <MTK_DRIVE_12mA>;
263			bias-pull-down;
264		};
265	};
266
267	i2s1_pins_a: i2s@1 {
268		pin_i2s1 {
269			pinmux = <MT7623_PIN_33_I2S1_DATA_FUNC_I2S1_DATA>,
270				 <MT7623_PIN_34_I2S1_DATA_IN_FUNC_I2S1_DATA_IN>,
271				 <MT7623_PIN_35_I2S1_BCK_FUNC_I2S1_BCK>,
272				 <MT7623_PIN_36_I2S1_LRCK_FUNC_I2S1_LRCK>,
273				 <MT7623_PIN_37_I2S1_MCLK_FUNC_I2S1_MCLK>;
274			drive-strength = <MTK_DRIVE_12mA>;
275			bias-pull-down;
276		};
277	};
278
279	key_pins_a: keys@0 {
280		pins_keys {
281			pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
282				 <MT7623_PIN_257_GPIO257_FUNC_GPIO257> ;
283			input-enable;
284		};
285	};
286
287	led_pins_a: leds@0 {
288		pins_leds {
289			pinmux = <MT7623_PIN_239_EXT_SDIO0_FUNC_GPIO239>,
290				 <MT7623_PIN_240_EXT_XCS_FUNC_GPIO240>,
291				 <MT7623_PIN_241_EXT_SCK_FUNC_GPIO241>;
292		};
293	};
294
295	mmc0_pins_default: mmc0default {
296		pins_cmd_dat {
297			pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
298				 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
299				 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
300				 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
301				 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
302				 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
303				 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
304				 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
305				 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
306			input-enable;
307			bias-pull-up;
308		};
309
310		pins_clk {
311			pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
312			bias-pull-down;
313		};
314
315		pins_rst {
316			pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
317			bias-pull-up;
318		};
319	};
320
321	mmc0_pins_uhs: mmc0 {
322		pins_cmd_dat {
323			pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
324				 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
325				 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
326				 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
327				 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
328				 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
329				 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
330				 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
331				 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
332			input-enable;
333			drive-strength = <MTK_DRIVE_2mA>;
334			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
335		};
336
337		pins_clk {
338			pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
339			drive-strength = <MTK_DRIVE_2mA>;
340			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
341		};
342
343		pins_rst {
344			pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
345			bias-pull-up;
346		};
347	};
348
349	mmc1_pins_default: mmc1default {
350		pins_cmd_dat {
351			pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
352				 <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
353				 <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
354				 <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
355				 <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
356			input-enable;
357			drive-strength = <MTK_DRIVE_4mA>;
358			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
359		};
360
361		pins_clk {
362			pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
363			bias-pull-down;
364			drive-strength = <MTK_DRIVE_4mA>;
365		};
366
367		pins_wp {
368			pinmux = <MT7623_PIN_29_EINT7_FUNC_MSDC1_WP>;
369			input-enable;
370			bias-pull-up;
371		};
372
373		pins_insert {
374			pinmux = <MT7623_PIN_261_MSDC1_INS_FUNC_GPIO261>;
375			bias-pull-up;
376		};
377	};
378
379	mmc1_pins_uhs: mmc1 {
380		pins_cmd_dat {
381			pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
382				 <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
383				 <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
384				 <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
385				 <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
386			input-enable;
387			drive-strength = <MTK_DRIVE_4mA>;
388			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
389		};
390
391		pins_clk {
392			pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
393			drive-strength = <MTK_DRIVE_4mA>;
394			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
395		};
396	};
397
398	pwm_pins_a: pwm@0 {
399		pins_pwm {
400			pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
401				 <MT7623_PIN_204_PWM1_FUNC_PWM1>,
402				 <MT7623_PIN_205_PWM2_FUNC_PWM2>,
403				 <MT7623_PIN_206_PWM3_FUNC_PWM3>,
404				 <MT7623_PIN_207_PWM4_FUNC_PWM4>;
405		};
406	};
407
408	spi0_pins_a: spi@0 {
409		pins_spi {
410			pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>,
411				<MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>,
412				<MT7623_PIN_55_SPI0_MI_FUNC_SPI0_MI>,
413				<MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MO>;
414			bias-disable;
415		};
416	};
417
418	uart0_pins_a: uart@0 {
419		pins_dat {
420			pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
421				 <MT7623_PIN_80_UTXD0_FUNC_UTXD0>;
422		};
423	};
424
425	uart1_pins_a: uart@1 {
426		pins_dat {
427			pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>,
428				 <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
429		};
430	};
431};
432
433&pwm {
434	pinctrl-names = "default";
435	pinctrl-0 = <&pwm_pins_a>;
436	status = "okay";
437};
438
439&pwrap {
440	mt6323 {
441		mt6323led: led {
442			compatible = "mediatek,mt6323-led";
443			#address-cells = <1>;
444			#size-cells = <0>;
445
446			led@0 {
447				reg = <0>;
448				label = "bpi-r2:isink:green";
449				default-state = "off";
450			};
451
452			led@1 {
453				reg = <1>;
454				label = "bpi-r2:isink:red";
455				default-state = "off";
456			};
457
458			led@2 {
459				reg = <2>;
460				label = "bpi-r2:isink:blue";
461				default-state = "off";
462			};
463		};
464	};
465};
466
467&spi0 {
468	pinctrl-names = "default";
469	pinctrl-0 = <&spi0_pins_a>;
470	status = "okay";
471};
472
473&uart0 {
474	pinctrl-names = "default";
475	pinctrl-0 = <&uart0_pins_a>;
476	status = "disabled";
477};
478
479&uart1 {
480	pinctrl-names = "default";
481	pinctrl-0 = <&uart1_pins_a>;
482	status = "disabled";
483};
484
485&uart2 {
486	status = "okay";
487};
488
489&usb1 {
490	vusb33-supply = <&reg_3p3v>;
491	vbus-supply = <&reg_5v>;
492	status = "okay";
493};
494
495&usb2 {
496	vusb33-supply = <&reg_3p3v>;
497	vbus-supply = <&reg_5v>;
498	status = "okay";
499};
500
501&u3phy1 {
502	status = "okay";
503};
504
505&u3phy2 {
506	status = "okay";
507};
508
509