1/* 2 * Copyright (C) 2012 Florian Vaussard, EPFL Mobots group 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9/* 10 * The Gumstix Overo must be combined with an expansion board. 11 */ 12 13/ { 14 15 memory@0 { 16 device_type = "memory"; 17 reg = <0 0>; 18 }; 19 20 pwmleds { 21 compatible = "pwm-leds"; 22 23 overo { 24 label = "overo:blue:COM"; 25 pwms = <&twl_pwmled 1 7812500>; 26 max-brightness = <127>; 27 linux,default-trigger = "mmc0"; 28 }; 29 }; 30 31 sound { 32 compatible = "ti,omap-twl4030"; 33 ti,model = "overo"; 34 35 ti,mcbsp = <&mcbsp2>; 36 }; 37 38 /* HS USB Port 2 Power */ 39 hsusb2_power: hsusb2_power_reg { 40 compatible = "regulator-fixed"; 41 regulator-name = "hsusb2_vbus"; 42 regulator-min-microvolt = <5000000>; 43 regulator-max-microvolt = <5000000>; 44 gpio = <&gpio6 8 GPIO_ACTIVE_HIGH>; /* gpio_168: vbus enable */ 45 startup-delay-us = <70000>; 46 enable-active-high; 47 }; 48 49 /* HS USB Host PHY on PORT 2 */ 50 hsusb2_phy: hsusb2_phy { 51 compatible = "usb-nop-xceiv"; 52 reset-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>; /* gpio_183 */ 53 vcc-supply = <&hsusb2_power>; 54 }; 55 56 /* Regulator to trigger the nPoweron signal of the Wifi module */ 57 w3cbw003c_npoweron: regulator-w3cbw003c-npoweron { 58 compatible = "regulator-fixed"; 59 regulator-name = "regulator-w3cbw003c-npoweron"; 60 regulator-min-microvolt = <3300000>; 61 regulator-max-microvolt = <3300000>; 62 gpio = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* gpio_54: nPoweron */ 63 enable-active-high; 64 }; 65 66 /* Regulator to trigger the nReset signal of the Wifi module */ 67 w3cbw003c_wifi_nreset: regulator-w3cbw003c-wifi-nreset { 68 pinctrl-names = "default"; 69 pinctrl-0 = <&w3cbw003c_pins &w3cbw003c_2_pins>; 70 compatible = "regulator-fixed"; 71 regulator-name = "regulator-w3cbw003c-wifi-nreset"; 72 regulator-min-microvolt = <3300000>; 73 regulator-max-microvolt = <3300000>; 74 gpio = <&gpio1 16 GPIO_ACTIVE_HIGH>; /* gpio_16: WiFi nReset */ 75 startup-delay-us = <10000>; 76 }; 77}; 78 79&omap3_pmx_core { 80 pinctrl-names = "default"; 81 pinctrl-0 = < 82 &hsusb2_pins 83 >; 84 85 uart2_pins: pinmux_uart2_pins { 86 pinctrl-single,pins = < 87 OMAP3_CORE1_IOPAD(0x216c, PIN_INPUT | MUX_MODE1) /* mcbsp3_dx.uart2_cts */ 88 OMAP3_CORE1_IOPAD(0x216e, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_dr.uart2_rts */ 89 OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_clk.uart2_tx */ 90 OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1) /* mcbsp3_fsx.uart2_rx */ 91 >; 92 }; 93 94 i2c1_pins: pinmux_i2c1_pins { 95 pinctrl-single,pins = < 96 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ 97 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */ 98 >; 99 }; 100 101 mmc1_pins: pinmux_mmc1_pins { 102 pinctrl-single,pins = < 103 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ 104 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ 105 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ 106 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ 107 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ 108 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ 109 >; 110 }; 111 112 mmc2_pins: pinmux_mmc2_pins { 113 pinctrl-single,pins = < 114 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */ 115 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */ 116 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */ 117 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ 118 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ 119 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ 120 >; 121 }; 122 123 /* WiFi/BT combo */ 124 w3cbw003c_pins: pinmux_w3cbw003c_pins { 125 pinctrl-single,pins = < 126 OMAP3_CORE1_IOPAD(0x20b4, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs3.gpio_54 */ 127 OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4) /* uart3_rts_sd.gpio_164 */ 128 >; 129 }; 130 131 hsusb2_pins: pinmux_hsusb2_pins { 132 pinctrl-single,pins = < 133 OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */ 134 OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */ 135 OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */ 136 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */ 137 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */ 138 OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */ 139 OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT | MUX_MODE4) /* i2c2_scl.gpio_168 */ 140 OMAP3_CORE1_IOPAD(0x21c0, PIN_OUTPUT | MUX_MODE4) /* i2c2_sda.gpio_183 */ 141 >; 142 }; 143}; 144 145&i2c1 { 146 pinctrl-names = "default"; 147 pinctrl-0 = <&i2c1_pins>; 148 clock-frequency = <2600000>; 149 150 twl: twl@48 { 151 reg = <0x48>; 152 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 153 interrupt-parent = <&intc>; 154 155 twl_audio: audio { 156 compatible = "ti,twl4030-audio"; 157 codec { 158 }; 159 }; 160 }; 161}; 162 163#include "twl4030.dtsi" 164#include "twl4030_omap3.dtsi" 165 166/* i2c2 pins are used for gpio */ 167&i2c2 { 168 status = "disabled"; 169}; 170 171/* on board microSD slot */ 172&mmc1 { 173 pinctrl-names = "default"; 174 pinctrl-0 = <&mmc1_pins>; 175 vmmc-supply = <&vmmc1>; 176 bus-width = <4>; 177}; 178 179/* optional on board WiFi */ 180&mmc2 { 181 pinctrl-names = "default"; 182 pinctrl-0 = <&mmc2_pins>; 183 vmmc-supply = <&w3cbw003c_npoweron>; 184 vqmmc-supply = <&w3cbw003c_wifi_nreset>; 185 bus-width = <4>; 186 cap-sdio-irq; 187 non-removable; 188}; 189 190&twl_gpio { 191 ti,use-leds; 192}; 193 194&usb_otg_hs { 195 interface-type = <0>; 196 usb-phy = <&usb2_phy>; 197 phys = <&usb2_phy>; 198 phy-names = "usb2-phy"; 199 mode = <3>; 200 power = <50>; 201}; 202 203&usbhshost { 204 port2-mode = "ehci-phy"; 205}; 206 207&usbhsehci { 208 phys = <0 &hsusb2_phy>; 209}; 210 211&uart2 { 212 pinctrl-names = "default"; 213 pinctrl-0 = <&uart2_pins>; 214}; 215 216&mcbsp2 { 217 status = "okay"; 218}; 219 220&gpmc { 221 ranges = <0 0 0x30000000 0x1000000>, /* CS0 */ 222 <4 0 0x2b000000 0x1000000>, /* CS4 */ 223 <5 0 0x2c000000 0x1000000>; /* CS5 */ 224 225 nand@0,0 { 226 compatible = "ti,omap2-nand"; 227 linux,mtd-name= "micron,mt29c4g96maz"; 228 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 229 interrupt-parent = <&gpmc>; 230 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 231 <1 IRQ_TYPE_NONE>; /* termcount */ 232 nand-bus-width = <16>; 233 gpmc,device-width = <2>; 234 ti,nand-ecc-opt = "bch8"; 235 236 gpmc,sync-clk-ps = <0>; 237 gpmc,cs-on-ns = <0>; 238 gpmc,cs-rd-off-ns = <44>; 239 gpmc,cs-wr-off-ns = <44>; 240 gpmc,adv-on-ns = <6>; 241 gpmc,adv-rd-off-ns = <34>; 242 gpmc,adv-wr-off-ns = <44>; 243 gpmc,we-off-ns = <40>; 244 gpmc,oe-off-ns = <54>; 245 gpmc,access-ns = <64>; 246 gpmc,rd-cycle-ns = <82>; 247 gpmc,wr-cycle-ns = <82>; 248 gpmc,wr-access-ns = <40>; 249 gpmc,wr-data-mux-bus-ns = <0>; 250 251 #address-cells = <1>; 252 #size-cells = <1>; 253 254 partition@0 { 255 label = "SPL"; 256 reg = <0 0x80000>; /* 512KiB */ 257 }; 258 partition@80000 { 259 label = "U-Boot"; 260 reg = <0x80000 0x1C0000>; /* 1792KiB */ 261 }; 262 partition@1c0000 { 263 label = "Environment"; 264 reg = <0x240000 0x40000>; /* 256KiB */ 265 }; 266 partition@280000 { 267 label = "Kernel"; 268 reg = <0x280000 0x800000>; /* 8192KiB */ 269 }; 270 partition@780000 { 271 label = "Filesystem"; 272 reg = <0xA80000 0>; 273 /* HACK: MTDPART_SIZ_FULL=0 so fill to end */ 274 }; 275 }; 276}; 277