1/* 2 * Device tree file for Phytec phyCORE-RK3288 SoM 3 * Copyright (C) 2017 PHYTEC Messtechnik GmbH 4 * Author: Wadim Egorov <w.egorov@phytec.de> 5 * 6 * This file is dual-licensed: you can use it either under the terms 7 * of the GPL or the X11 license, at your option. Note that this dual 8 * licensing only applies to this file, and not this project as a 9 * whole. 10 * 11 * a) This file is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of the 14 * License, or (at your option) any later version. 15 * 16 * This file is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * Or, alternatively, 22 * 23 * b) Permission is hereby granted, free of charge, to any person 24 * obtaining a copy of this software and associated documentation 25 * files (the "Software"), to deal in the Software without 26 * restriction, including without limitation the rights to use, 27 * copy, modify, merge, publish, distribute, sublicense, and/or 28 * sell copies of the Software, and to permit persons to whom the 29 * Software is furnished to do so, subject to the following 30 * conditions: 31 * 32 * The above copyright notice and this permission notice shall be 33 * included in all copies or substantial portions of the Software. 34 * 35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 42 * OTHER DEALINGS IN THE SOFTWARE. 43 */ 44 45#include <dt-bindings/net/ti-dp83867.h> 46#include "rk3288.dtsi" 47 48/ { 49 model = "Phytec RK3288 phyCORE"; 50 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288"; 51 52 /* 53 * Set the minimum memory size here and 54 * let the bootloader set the real size. 55 */ 56 memory { 57 device_type = "memory"; 58 reg = <0x0 0x0 0x0 0x8000000>; 59 }; 60 61 aliases { 62 rtc0 = &i2c_rtc; 63 rtc1 = &rk818; 64 }; 65 66 ext_gmac: external-gmac-clock { 67 compatible = "fixed-clock"; 68 #clock-cells = <0>; 69 clock-frequency = <125000000>; 70 clock-output-names = "ext_gmac"; 71 }; 72 73 leds: user-leds { 74 compatible = "gpio-leds"; 75 pinctrl-names = "default"; 76 pinctrl-0 = <&user_led>; 77 78 user { 79 label = "green_led"; 80 gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>; 81 linux,default-trigger = "heartbeat"; 82 default-state = "keep"; 83 }; 84 }; 85 86 vdd_emmc_io: vdd-emmc-io { 87 compatible = "regulator-fixed"; 88 regulator-name = "vdd_emmc_io"; 89 regulator-min-microvolt = <1800000>; 90 regulator-max-microvolt = <1800000>; 91 vin-supply = <&vdd_3v3_io>; 92 }; 93 94 vdd_in_otg_out: vdd-in-otg-out { 95 compatible = "regulator-fixed"; 96 regulator-name = "vdd_in_otg_out"; 97 regulator-always-on; 98 regulator-boot-on; 99 regulator-min-microvolt = <5000000>; 100 regulator-max-microvolt = <5000000>; 101 }; 102 103 vdd_misc_1v8: vdd-misc-1v8 { 104 compatible = "regulator-fixed"; 105 regulator-name = "vdd_misc_1v8"; 106 regulator-always-on; 107 regulator-boot-on; 108 regulator-min-microvolt = <1800000>; 109 regulator-max-microvolt = <1800000>; 110 }; 111}; 112 113&emmc { 114 status = "okay"; 115 bus-width = <8>; 116 cap-mmc-highspeed; 117 disable-wp; 118 non-removable; 119 pinctrl-names = "default"; 120 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; 121 vmmc-supply = <&vdd_3v3_io>; 122 vqmmc-supply = <&vdd_emmc_io>; 123}; 124 125&gmac { 126 assigned-clocks = <&cru SCLK_MAC>; 127 assigned-clock-parents = <&ext_gmac>; 128 clock_in_out = "input"; 129 pinctrl-names = "default"; 130 pinctrl-0 = <&rgmii_pins &phy_rst &phy_int>; 131 phy-handle = <&phy0>; 132 phy-supply = <&vdd_eth_2v5>; 133 phy-mode = "rgmii-id"; 134 snps,reset-active-low; 135 snps,reset-delays-us = <0 10000 1000000>; 136 snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>; 137 tx_delay = <0x0>; 138 rx_delay = <0x0>; 139 140 mdio0 { 141 compatible = "snps,dwmac-mdio"; 142 #address-cells = <1>; 143 #size-cells = <0>; 144 145 phy0: ethernet-phy@0 { 146 compatible = "ethernet-phy-ieee802.3-c22"; 147 reg = <0>; 148 interrupt-parent = <&gpio4>; 149 interrupts = <2 IRQ_TYPE_EDGE_FALLING>; 150 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 151 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 152 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 153 enet-phy-lane-no-swap; 154 }; 155 }; 156}; 157 158&hdmi { 159 ddc-i2c-bus = <&i2c5>; 160}; 161 162&io_domains { 163 status = "okay"; 164 sdcard-supply = <&vdd_io_sd>; 165 flash0-supply = <&vdd_emmc_io>; 166 flash1-supply = <&vdd_misc_1v8>; 167 gpio1830-supply = <&vdd_3v3_io>; 168 gpio30-supply = <&vdd_3v3_io>; 169 bb-supply = <&vdd_3v3_io>; 170 dvp-supply = <&vdd_3v3_io>; 171 lcdc-supply = <&vdd_3v3_io>; 172 wifi-supply = <&vdd_3v3_io>; 173 audio-supply = <&vdd_3v3_io>; 174}; 175 176&i2c0 { 177 status = "okay"; 178 clock-frequency = <400000>; 179 180 rk818: pmic@1c { 181 compatible = "rockchip,rk818"; 182 reg = <0x1c>; 183 interrupt-parent = <&gpio0>; 184 interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 185 pinctrl-names = "default"; 186 pinctrl-0 = <&pmic_int>; 187 rockchip,system-power-controller; 188 wakeup-source; 189 #clock-cells = <1>; 190 191 vcc1-supply = <&vdd_sys>; 192 vcc2-supply = <&vdd_sys>; 193 vcc3-supply = <&vdd_sys>; 194 vcc4-supply = <&vdd_sys>; 195 boost-supply = <&vdd_in_otg_out>; 196 vcc6-supply = <&vdd_sys>; 197 vcc7-supply = <&vdd_misc_1v8>; 198 vcc8-supply = <&vdd_misc_1v8>; 199 vcc9-supply = <&vdd_3v3_io>; 200 vddio-supply = <&vdd_3v3_io>; 201 202 regulators { 203 vdd_log: DCDC_REG1 { 204 regulator-name = "vdd_log"; 205 regulator-always-on; 206 regulator-boot-on; 207 regulator-min-microvolt = <1100000>; 208 regulator-max-microvolt = <1100000>; 209 regulator-state-mem { 210 regulator-off-in-suspend; 211 }; 212 }; 213 214 vdd_gpu: DCDC_REG2 { 215 regulator-name = "vdd_gpu"; 216 regulator-always-on; 217 regulator-boot-on; 218 regulator-min-microvolt = <800000>; 219 regulator-max-microvolt = <1250000>; 220 regulator-state-mem { 221 regulator-on-in-suspend; 222 regulator-suspend-microvolt = <1000000>; 223 }; 224 }; 225 226 vcc_ddr: DCDC_REG3 { 227 regulator-name = "vcc_ddr"; 228 regulator-always-on; 229 regulator-boot-on; 230 regulator-state-mem { 231 regulator-on-in-suspend; 232 }; 233 }; 234 235 vdd_3v3_io: DCDC_REG4 { 236 regulator-name = "vdd_3v3_io"; 237 regulator-always-on; 238 regulator-boot-on; 239 regulator-min-microvolt = <3300000>; 240 regulator-max-microvolt = <3300000>; 241 regulator-state-mem { 242 regulator-on-in-suspend; 243 regulator-suspend-microvolt = <3300000>; 244 }; 245 }; 246 247 vdd_sys: DCDC_BOOST { 248 regulator-name = "vdd_sys"; 249 regulator-always-on; 250 regulator-boot-on; 251 regulator-min-microvolt = <5000000>; 252 regulator-max-microvolt = <5000000>; 253 regulator-state-mem { 254 regulator-on-in-suspend; 255 regulator-suspend-microvolt = <5000000>; 256 }; 257 }; 258 259 /* vcc9 */ 260 vdd_sd: SWITCH_REG { 261 regulator-name = "vdd_sd"; 262 regulator-always-on; 263 regulator-boot-on; 264 regulator-state-mem { 265 regulator-off-in-suspend; 266 }; 267 }; 268 269 /* vcc6 */ 270 vdd_eth_2v5: LDO_REG2 { 271 regulator-name = "vdd_eth_2v5"; 272 regulator-always-on; 273 regulator-boot-on; 274 regulator-min-microvolt = <2500000>; 275 regulator-max-microvolt = <2500000>; 276 regulator-state-mem { 277 regulator-on-in-suspend; 278 regulator-suspend-microvolt = <2500000>; 279 }; 280 }; 281 282 /* vcc7 */ 283 vdd_1v0: LDO_REG3 { 284 regulator-name = "vdd_1v0"; 285 regulator-always-on; 286 regulator-boot-on; 287 regulator-min-microvolt = <1000000>; 288 regulator-max-microvolt = <1000000>; 289 regulator-state-mem { 290 regulator-on-in-suspend; 291 regulator-suspend-microvolt = <1000000>; 292 }; 293 }; 294 295 /* vcc8 */ 296 vdd_1v8_lcd_ldo: LDO_REG4 { 297 regulator-name = "vdd_1v8_lcd_ldo"; 298 regulator-always-on; 299 regulator-boot-on; 300 regulator-min-microvolt = <1800000>; 301 regulator-max-microvolt = <1800000>; 302 regulator-state-mem { 303 regulator-on-in-suspend; 304 regulator-suspend-microvolt = <1800000>; 305 }; 306 }; 307 308 /* vcc8 */ 309 vdd_1v0_lcd: LDO_REG6 { 310 regulator-name = "vdd_1v0_lcd"; 311 regulator-always-on; 312 regulator-boot-on; 313 regulator-min-microvolt = <1000000>; 314 regulator-max-microvolt = <1000000>; 315 regulator-state-mem { 316 regulator-on-in-suspend; 317 regulator-suspend-microvolt = <1000000>; 318 }; 319 }; 320 321 /* vcc7 */ 322 vdd_1v8_ldo: LDO_REG7 { 323 regulator-name = "vdd_1v8_ldo"; 324 regulator-always-on; 325 regulator-boot-on; 326 regulator-min-microvolt = <1800000>; 327 regulator-max-microvolt = <1800000>; 328 regulator-state-mem { 329 regulator-off-in-suspend; 330 regulator-suspend-microvolt = <1800000>; 331 }; 332 }; 333 334 /* vcc9 */ 335 vdd_io_sd: LDO_REG9 { 336 regulator-name = "vdd_io_sd"; 337 regulator-always-on; 338 regulator-boot-on; 339 regulator-min-microvolt = <3300000>; 340 regulator-max-microvolt = <3300000>; 341 regulator-state-mem { 342 regulator-on-in-suspend; 343 regulator-suspend-microvolt = <3300000>; 344 }; 345 }; 346 }; 347 }; 348 349 /* M24C32-D */ 350 i2c_eeprom: eeprom@50 { 351 compatible = "atmel,24c32"; 352 reg = <0x50>; 353 pagesize = <32>; 354 }; 355 356 vdd_cpu: regulator@60 { 357 compatible = "fcs,fan53555"; 358 reg = <0x60>; 359 fcs,suspend-voltage-selector = <1>; 360 regulator-always-on; 361 regulator-boot-on; 362 regulator-enable-ramp-delay = <300>; 363 regulator-name = "vdd_cpu"; 364 regulator-min-microvolt = <800000>; 365 regulator-max-microvolt = <1430000>; 366 regulator-ramp-delay = <8000>; 367 vin-supply = <&vdd_sys>; 368 }; 369}; 370 371&pinctrl { 372 pcfg_output_high: pcfg-output-high { 373 output-high; 374 }; 375 376 emmc { 377 /* 378 * We run eMMC at max speed; bump up drive strength. 379 * We also have external pulls, so disable the internal ones. 380 */ 381 emmc_clk: emmc-clk { 382 rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_12ma>; 383 }; 384 385 emmc_cmd: emmc-cmd { 386 rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_12ma>; 387 }; 388 389 emmc_bus8: emmc-bus8 { 390 rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_12ma>, 391 <3 1 RK_FUNC_2 &pcfg_pull_none_12ma>, 392 <3 2 RK_FUNC_2 &pcfg_pull_none_12ma>, 393 <3 3 RK_FUNC_2 &pcfg_pull_none_12ma>, 394 <3 4 RK_FUNC_2 &pcfg_pull_none_12ma>, 395 <3 5 RK_FUNC_2 &pcfg_pull_none_12ma>, 396 <3 6 RK_FUNC_2 &pcfg_pull_none_12ma>, 397 <3 7 RK_FUNC_2 &pcfg_pull_none_12ma>; 398 }; 399 }; 400 401 gmac { 402 phy_int: phy-int { 403 rockchip,pins = <4 2 RK_FUNC_GPIO &pcfg_pull_up>; 404 }; 405 406 phy_rst: phy-rst { 407 rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>; 408 }; 409 }; 410 411 leds { 412 user_led: user-led { 413 rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_output_high>; 414 }; 415 }; 416 417 pmic { 418 pmic_int: pmic-int { 419 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>; 420 }; 421 422 /* Pin for switching state between sleep and non-sleep state */ 423 pmic_sleep: pmic-sleep { 424 rockchip,pins = <RK_GPIO0 0 RK_FUNC_GPIO &pcfg_pull_up>; 425 }; 426 }; 427}; 428 429&pwm1 { 430 status = "okay"; 431}; 432 433&saradc { 434 status = "okay"; 435 vref-supply = <&vdd_1v8_ldo>; 436}; 437 438&spi2 { 439 status = "okay"; 440 441 serial_flash: flash@0 { 442 compatible = "micron,n25q128a13", "jedec,spi-nor"; 443 reg = <0x0>; 444 spi-max-frequency = <50000000>; 445 m25p,fast-read; 446 #address-cells = <1>; 447 #size-cells = <1>; 448 status = "okay"; 449 }; 450}; 451 452&tsadc { 453 status = "okay"; 454 rockchip,hw-tshut-mode = <0>; 455 rockchip,hw-tshut-polarity = <0>; 456}; 457 458&vopb { 459 status = "okay"; 460}; 461 462&vopb_mmu { 463 status = "okay"; 464}; 465 466&vopl { 467 status = "okay"; 468}; 469 470&vopl_mmu { 471 status = "okay"; 472}; 473 474&wdt { 475 status = "okay"; 476}; 477