1/* 2 * Google Veyron Brain Rev 0 board device tree source 3 * 4 * Copyright 2014 Google, Inc 5 * 6 * This file is dual-licensed: you can use it either under the terms 7 * of the GPL or the X11 license, at your option. Note that this dual 8 * licensing only applies to this file, and not this project as a 9 * whole. 10 * 11 * a) This file is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of the 14 * License, or (at your option) any later version. 15 * 16 * This file is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * Or, alternatively, 22 * 23 * b) Permission is hereby granted, free of charge, to any person 24 * obtaining a copy of this software and associated documentation 25 * files (the "Software"), to deal in the Software without 26 * restriction, including without limitation the rights to use, 27 * copy, modify, merge, publish, distribute, sublicense, and/or 28 * sell copies of the Software, and to permit persons to whom the 29 * Software is furnished to do so, subject to the following 30 * conditions: 31 * 32 * The above copyright notice and this permission notice shall be 33 * included in all copies or substantial portions of the Software. 34 * 35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 42 * OTHER DEALINGS IN THE SOFTWARE. 43 */ 44 45/dts-v1/; 46#include "rk3288-veyron.dtsi" 47 48/ { 49 model = "Google Brain"; 50 compatible = "google,veyron-brain-rev0", "google,veyron-brain", 51 "google,veyron", "rockchip,rk3288"; 52 53 vcc33_sys: vcc33-sys { 54 vin-supply = <&vcc_5v>; 55 }; 56 57 vcc33_io: vcc33_io { 58 compatible = "regulator-fixed"; 59 regulator-name = "vcc33_io"; 60 regulator-always-on; 61 regulator-boot-on; 62 vin-supply = <&vcc33_sys>; 63 /* This is gated by vcc_18 too */ 64 }; 65 66 /* This turns on vbus for host2 and otg (dwc2) */ 67 vcc5_host2: vcc5-host2-regulator { 68 compatible = "regulator-fixed"; 69 enable-active-high; 70 gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; 71 pinctrl-names = "default"; 72 pinctrl-0 = <&usb2_pwr_en>; 73 regulator-name = "vcc5_host2"; 74 regulator-always-on; 75 regulator-boot-on; 76 }; 77}; 78 79&pinctrl { 80 hdmi { 81 vcc50_hdmi_en: vcc50-hdmi-en { 82 rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>; 83 }; 84 }; 85 86 pmic { 87 dvs_1: dvs-1 { 88 rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_down>; 89 }; 90 91 dvs_2: dvs-2 { 92 rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>; 93 }; 94 }; 95 96 usb-host { 97 usb2_pwr_en: usb2-pwr-en { 98 rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>; 99 }; 100 }; 101}; 102 103&rk808 { 104 pinctrl-names = "default"; 105 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>; 106 dvs-gpios = <&gpio7 RK_PB3 GPIO_ACTIVE_HIGH>, 107 <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>; 108 109 /delete-property/ vcc6-supply; 110 111 regulators { 112 /* vcc33_io is sourced directly from vcc33_sys */ 113 /delete-node/ LDO_REG1; 114 115 /* This is not a pwren anymore, but the real power supply */ 116 vdd10_lcd: LDO_REG7 { 117 regulator-always-on; 118 regulator-boot-on; 119 regulator-min-microvolt = <1000000>; 120 regulator-max-microvolt = <1000000>; 121 regulator-name = "vdd10_lcd"; 122 regulator-suspend-mem-disabled; 123 }; 124 125 vcc18_hdmi: SWITCH_REG2 { 126 regulator-always-on; 127 regulator-boot-on; 128 regulator-name = "vcc18_hdmi"; 129 regulator-suspend-mem-disabled; 130 }; 131 }; 132}; 133 134&vcc50_hdmi { 135 enable-active-high; 136 gpio = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>; 137 pinctrl-names = "default"; 138 pinctrl-0 = <&vcc50_hdmi_en>; 139}; 140