1/* 2 * Samsung's S3C64xx SoC series common device tree source 3 * 4 * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com> 5 * 6 * Samsung's S3C64xx SoC series device nodes are listed in this file. 7 * Particular SoCs from S3C64xx series can include this file and provide 8 * values for SoCs specfic bindings. 9 * 10 * Note: This file does not include device nodes for all the controllers in 11 * S3C64xx SoCs. As device tree coverage for S3C64xx increases, additional 12 * nodes can be added to this file. 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License version 2 as 16 * published by the Free Software Foundation. 17 */ 18 19#include "skeleton.dtsi" 20#include <dt-bindings/clock/samsung,s3c64xx-clock.h> 21 22/ { 23 aliases { 24 i2c0 = &i2c0; 25 pinctrl0 = &pinctrl0; 26 serial0 = &uart0; 27 serial1 = &uart1; 28 serial2 = &uart2; 29 serial3 = &uart3; 30 }; 31 32 cpus { 33 #address-cells = <1>; 34 #size-cells = <0>; 35 36 cpu@0 { 37 device_type = "cpu"; 38 compatible = "arm,arm1176jzf-s", "arm,arm1176"; 39 reg = <0x0>; 40 }; 41 }; 42 43 soc: soc { 44 compatible = "simple-bus"; 45 #address-cells = <1>; 46 #size-cells = <1>; 47 ranges; 48 49 vic0: interrupt-controller@71200000 { 50 compatible = "arm,pl192-vic"; 51 interrupt-controller; 52 reg = <0x71200000 0x1000>; 53 #interrupt-cells = <1>; 54 }; 55 56 vic1: interrupt-controller@71300000 { 57 compatible = "arm,pl192-vic"; 58 interrupt-controller; 59 reg = <0x71300000 0x1000>; 60 #interrupt-cells = <1>; 61 }; 62 63 sdhci0: sdhci@7c200000 { 64 compatible = "samsung,s3c6410-sdhci"; 65 reg = <0x7c200000 0x100>; 66 interrupt-parent = <&vic1>; 67 interrupts = <24>; 68 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 69 clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>, 70 <&clocks SCLK_MMC0>; 71 status = "disabled"; 72 }; 73 74 sdhci1: sdhci@7c300000 { 75 compatible = "samsung,s3c6410-sdhci"; 76 reg = <0x7c300000 0x100>; 77 interrupt-parent = <&vic1>; 78 interrupts = <25>; 79 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 80 clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>, 81 <&clocks SCLK_MMC1>; 82 status = "disabled"; 83 }; 84 85 sdhci2: sdhci@7c400000 { 86 compatible = "samsung,s3c6410-sdhci"; 87 reg = <0x7c400000 0x100>; 88 interrupt-parent = <&vic1>; 89 interrupts = <17>; 90 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 91 clocks = <&clocks HCLK_HSMMC2>, <&clocks HCLK_HSMMC2>, 92 <&clocks SCLK_MMC2>; 93 status = "disabled"; 94 }; 95 96 watchdog: watchdog@7e004000 { 97 compatible = "samsung,s3c6410-wdt"; 98 reg = <0x7e004000 0x1000>; 99 interrupt-parent = <&vic0>; 100 interrupts = <26>; 101 clock-names = "watchdog"; 102 clocks = <&clocks PCLK_WDT>; 103 }; 104 105 i2c0: i2c@7f004000 { 106 compatible = "samsung,s3c2440-i2c"; 107 reg = <0x7f004000 0x1000>; 108 interrupt-parent = <&vic1>; 109 interrupts = <18>; 110 clock-names = "i2c"; 111 clocks = <&clocks PCLK_IIC0>; 112 status = "disabled"; 113 #address-cells = <1>; 114 #size-cells = <0>; 115 }; 116 117 uart0: serial@7f005000 { 118 compatible = "samsung,s3c6400-uart"; 119 reg = <0x7f005000 0x100>; 120 interrupt-parent = <&vic1>; 121 interrupts = <5>; 122 clock-names = "uart", "clk_uart_baud2", 123 "clk_uart_baud3"; 124 clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>, 125 <&clocks SCLK_UART>; 126 status = "disabled"; 127 }; 128 129 uart1: serial@7f005400 { 130 compatible = "samsung,s3c6400-uart"; 131 reg = <0x7f005400 0x100>; 132 interrupt-parent = <&vic1>; 133 interrupts = <6>; 134 clock-names = "uart", "clk_uart_baud2", 135 "clk_uart_baud3"; 136 clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>, 137 <&clocks SCLK_UART>; 138 status = "disabled"; 139 }; 140 141 uart2: serial@7f005800 { 142 compatible = "samsung,s3c6400-uart"; 143 reg = <0x7f005800 0x100>; 144 interrupt-parent = <&vic1>; 145 interrupts = <7>; 146 clock-names = "uart", "clk_uart_baud2", 147 "clk_uart_baud3"; 148 clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>, 149 <&clocks SCLK_UART>; 150 status = "disabled"; 151 }; 152 153 uart3: serial@7f005c00 { 154 compatible = "samsung,s3c6400-uart"; 155 reg = <0x7f005c00 0x100>; 156 interrupt-parent = <&vic1>; 157 interrupts = <8>; 158 clock-names = "uart", "clk_uart_baud2", 159 "clk_uart_baud3"; 160 clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>, 161 <&clocks SCLK_UART>; 162 status = "disabled"; 163 }; 164 165 pwm: pwm@7f006000 { 166 compatible = "samsung,s3c6400-pwm"; 167 reg = <0x7f006000 0x1000>; 168 interrupt-parent = <&vic0>; 169 interrupts = <23>, <24>, <25>, <27>, <28>; 170 clock-names = "timers"; 171 clocks = <&clocks PCLK_PWM>; 172 samsung,pwm-outputs = <0>, <1>; 173 #pwm-cells = <3>; 174 }; 175 176 pinctrl0: pinctrl@7f008000 { 177 compatible = "samsung,s3c64xx-pinctrl"; 178 reg = <0x7f008000 0x1000>; 179 interrupt-parent = <&vic1>; 180 interrupts = <21>; 181 182 pctrl_int_map: pinctrl-interrupt-map { 183 interrupt-map = <0 &vic0 0>, 184 <1 &vic0 1>, 185 <2 &vic1 0>, 186 <3 &vic1 1>; 187 #address-cells = <0>; 188 #size-cells = <0>; 189 #interrupt-cells = <1>; 190 }; 191 192 wakeup-interrupt-controller { 193 compatible = "samsung,s3c64xx-wakeup-eint"; 194 interrupts = <0>, <1>, <2>, <3>; 195 interrupt-parent = <&pctrl_int_map>; 196 }; 197 }; 198 }; 199}; 200 201#include "s3c64xx-pinctrl.dtsi" 202