1/* 2 * Samsung's S5PV210 SoC device tree source 3 * 4 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. 5 * 6 * Mateusz Krawczuk <m.krawczuk@partner.samsung.com> 7 * Tomasz Figa <t.figa@samsung.com> 8 * 9 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210 10 * based board files can include this file and provide values for board specfic 11 * bindings. 12 * 13 * Note: This file does not include device nodes for all the controllers in 14 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional 15 * nodes can be added to this file. 16 * 17 * This program is free software; you can redistribute it and/or modify 18 * it under the terms of the GNU General Public License version 2 as 19 * published by the Free Software Foundation. 20*/ 21 22#include <dt-bindings/clock/s5pv210.h> 23#include <dt-bindings/clock/s5pv210-audss.h> 24 25/ { 26 #address-cells = <1>; 27 #size-cells = <1>; 28 29 aliases { 30 csis0 = &csis0; 31 fimc0 = &fimc0; 32 fimc1 = &fimc1; 33 fimc2 = &fimc2; 34 i2c0 = &i2c0; 35 i2c1 = &i2c1; 36 i2c2 = &i2c2; 37 i2s0 = &i2s0; 38 i2s1 = &i2s1; 39 i2s2 = &i2s2; 40 pinctrl0 = &pinctrl0; 41 spi0 = &spi0; 42 spi1 = &spi1; 43 }; 44 45 cpus { 46 #address-cells = <1>; 47 #size-cells = <0>; 48 49 cpu@0 { 50 device_type = "cpu"; 51 compatible = "arm,cortex-a8"; 52 reg = <0>; 53 }; 54 }; 55 56 soc { 57 compatible = "simple-bus"; 58 #address-cells = <1>; 59 #size-cells = <1>; 60 ranges; 61 62 external-clocks { 63 compatible = "simple-bus"; 64 #address-cells = <1>; 65 #size-cells = <0>; 66 67 xxti: oscillator@0 { 68 compatible = "fixed-clock"; 69 reg = <0>; 70 clock-frequency = <0>; 71 clock-output-names = "xxti"; 72 #clock-cells = <0>; 73 }; 74 75 xusbxti: oscillator@1 { 76 compatible = "fixed-clock"; 77 reg = <1>; 78 clock-frequency = <0>; 79 clock-output-names = "xusbxti"; 80 #clock-cells = <0>; 81 }; 82 }; 83 84 onenand: onenand@b0000000 { 85 compatible = "samsung,s5pv210-onenand"; 86 reg = <0xb0600000 0x2000>, 87 <0xb0000000 0x20000>, 88 <0xb0040000 0x20000>; 89 interrupt-parent = <&vic1>; 90 interrupts = <31>; 91 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>; 92 clock-names = "bus", "onenand"; 93 #address-cells = <1>; 94 #size-cells = <1>; 95 status = "disabled"; 96 }; 97 98 chipid@e0000000 { 99 compatible = "samsung,s5pv210-chipid"; 100 reg = <0xe0000000 0x1000>; 101 }; 102 103 clocks: clock-controller@e0100000 { 104 compatible = "samsung,s5pv210-clock", "simple-bus"; 105 reg = <0xe0100000 0x10000>; 106 clock-names = "xxti", "xusbxti"; 107 clocks = <&xxti>, <&xusbxti>; 108 #clock-cells = <1>; 109 #address-cells = <1>; 110 #size-cells = <1>; 111 ranges; 112 113 pmu_syscon: syscon@e0108000 { 114 compatible = "samsung-s5pv210-pmu", "syscon"; 115 reg = <0xe0108000 0x8000>; 116 }; 117 }; 118 119 pinctrl0: pinctrl@e0200000 { 120 compatible = "samsung,s5pv210-pinctrl"; 121 reg = <0xe0200000 0x1000>; 122 interrupt-parent = <&vic0>; 123 interrupts = <30>; 124 125 wakeup-interrupt-controller { 126 compatible = "samsung,exynos4210-wakeup-eint"; 127 interrupts = <16>; 128 interrupt-parent = <&vic0>; 129 }; 130 }; 131 132 amba { 133 #address-cells = <1>; 134 #size-cells = <1>; 135 compatible = "simple-bus"; 136 ranges; 137 138 pdma0: dma@e0900000 { 139 compatible = "arm,pl330", "arm,primecell"; 140 reg = <0xe0900000 0x1000>; 141 interrupt-parent = <&vic0>; 142 interrupts = <19>; 143 clocks = <&clocks CLK_PDMA0>; 144 clock-names = "apb_pclk"; 145 #dma-cells = <1>; 146 #dma-channels = <8>; 147 #dma-requests = <32>; 148 }; 149 150 pdma1: dma@e0a00000 { 151 compatible = "arm,pl330", "arm,primecell"; 152 reg = <0xe0a00000 0x1000>; 153 interrupt-parent = <&vic0>; 154 interrupts = <20>; 155 clocks = <&clocks CLK_PDMA1>; 156 clock-names = "apb_pclk"; 157 #dma-cells = <1>; 158 #dma-channels = <8>; 159 #dma-requests = <32>; 160 }; 161 }; 162 163 spi0: spi@e1300000 { 164 compatible = "samsung,s5pv210-spi"; 165 reg = <0xe1300000 0x1000>; 166 interrupt-parent = <&vic1>; 167 interrupts = <15>; 168 dmas = <&pdma0 7>, <&pdma0 6>; 169 dma-names = "tx", "rx"; 170 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>; 171 clock-names = "spi", "spi_busclk0"; 172 pinctrl-names = "default"; 173 pinctrl-0 = <&spi0_bus>; 174 #address-cells = <1>; 175 #size-cells = <0>; 176 status = "disabled"; 177 }; 178 179 spi1: spi@e1400000 { 180 compatible = "samsung,s5pv210-spi"; 181 reg = <0xe1400000 0x1000>; 182 interrupt-parent = <&vic1>; 183 interrupts = <16>; 184 dmas = <&pdma1 7>, <&pdma1 6>; 185 dma-names = "tx", "rx"; 186 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>; 187 clock-names = "spi", "spi_busclk0"; 188 pinctrl-names = "default"; 189 pinctrl-0 = <&spi1_bus>; 190 #address-cells = <1>; 191 #size-cells = <0>; 192 status = "disabled"; 193 }; 194 195 keypad: keypad@e1600000 { 196 compatible = "samsung,s5pv210-keypad"; 197 reg = <0xe1600000 0x1000>; 198 interrupt-parent = <&vic2>; 199 interrupts = <25>; 200 clocks = <&clocks CLK_KEYIF>; 201 clock-names = "keypad"; 202 status = "disabled"; 203 }; 204 205 i2c0: i2c@e1800000 { 206 compatible = "samsung,s3c2440-i2c"; 207 reg = <0xe1800000 0x1000>; 208 interrupt-parent = <&vic1>; 209 interrupts = <14>; 210 clocks = <&clocks CLK_I2C0>; 211 clock-names = "i2c"; 212 pinctrl-names = "default"; 213 pinctrl-0 = <&i2c0_bus>; 214 #address-cells = <1>; 215 #size-cells = <0>; 216 status = "disabled"; 217 }; 218 219 i2c2: i2c@e1a00000 { 220 compatible = "samsung,s3c2440-i2c"; 221 reg = <0xe1a00000 0x1000>; 222 interrupt-parent = <&vic1>; 223 interrupts = <19>; 224 clocks = <&clocks CLK_I2C2>; 225 clock-names = "i2c"; 226 pinctrl-0 = <&i2c2_bus>; 227 pinctrl-names = "default"; 228 #address-cells = <1>; 229 #size-cells = <0>; 230 status = "disabled"; 231 }; 232 233 audio-subsystem { 234 compatible = "samsung,s5pv210-audss", "simple-bus"; 235 #address-cells = <1>; 236 #size-cells = <1>; 237 ranges; 238 239 clk_audss: clock-controller@eee10000 { 240 compatible = "samsung,s5pv210-audss-clock"; 241 reg = <0xeee10000 0x1000>; 242 clock-names = "hclk", "xxti", 243 "fout_epll", 244 "sclk_audio0"; 245 clocks = <&clocks DOUT_HCLKP>, <&xxti>, 246 <&clocks FOUT_EPLL>, 247 <&clocks SCLK_AUDIO0>; 248 #clock-cells = <1>; 249 }; 250 251 i2s0: i2s@eee30000 { 252 compatible = "samsung,s5pv210-i2s"; 253 reg = <0xeee30000 0x1000>; 254 interrupt-parent = <&vic2>; 255 interrupts = <16>; 256 dma-names = "rx", "tx", "tx-sec"; 257 dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>; 258 clock-names = "iis", 259 "i2s_opclk0", 260 "i2s_opclk1"; 261 clocks = <&clk_audss CLK_I2S>, 262 <&clk_audss CLK_I2S>, 263 <&clk_audss CLK_DOUT_AUD_BUS>; 264 samsung,idma-addr = <0xc0010000>; 265 pinctrl-names = "default"; 266 pinctrl-0 = <&i2s0_bus>; 267 #sound-dai-cells = <0>; 268 status = "disabled"; 269 }; 270 }; 271 272 i2s1: i2s@e2100000 { 273 compatible = "samsung,s3c6410-i2s"; 274 reg = <0xe2100000 0x1000>; 275 interrupt-parent = <&vic2>; 276 interrupts = <17>; 277 dma-names = "rx", "tx"; 278 dmas = <&pdma1 12>, <&pdma1 13>; 279 clock-names = "iis", "i2s_opclk0"; 280 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>; 281 pinctrl-names = "default"; 282 pinctrl-0 = <&i2s1_bus>; 283 #sound-dai-cells = <0>; 284 status = "disabled"; 285 }; 286 287 i2s2: i2s@e2a00000 { 288 compatible = "samsung,s3c6410-i2s"; 289 reg = <0xe2a00000 0x1000>; 290 interrupt-parent = <&vic2>; 291 interrupts = <18>; 292 dma-names = "rx", "tx"; 293 dmas = <&pdma1 14>, <&pdma1 15>; 294 clock-names = "iis", "i2s_opclk0"; 295 clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>; 296 pinctrl-names = "default"; 297 pinctrl-0 = <&i2s2_bus>; 298 #sound-dai-cells = <0>; 299 status = "disabled"; 300 }; 301 302 pwm: pwm@e2500000 { 303 compatible = "samsung,s5pc100-pwm"; 304 reg = <0xe2500000 0x1000>; 305 interrupt-parent = <&vic0>; 306 interrupts = <21>, <22>, <23>, <24>, <25>; 307 clock-names = "timers"; 308 clocks = <&clocks CLK_PWM>; 309 #pwm-cells = <3>; 310 }; 311 312 watchdog: watchdog@e2700000 { 313 compatible = "samsung,s3c6410-wdt"; 314 reg = <0xe2700000 0x1000>; 315 interrupt-parent = <&vic0>; 316 interrupts = <26>; 317 clock-names = "watchdog"; 318 clocks = <&clocks CLK_WDT>; 319 }; 320 321 rtc: rtc@e2800000 { 322 compatible = "samsung,s3c6410-rtc"; 323 reg = <0xe2800000 0x100>; 324 interrupt-parent = <&vic0>; 325 interrupts = <28>, <29>; 326 clocks = <&clocks CLK_RTC>; 327 clock-names = "rtc"; 328 status = "disabled"; 329 }; 330 331 uart0: serial@e2900000 { 332 compatible = "samsung,s5pv210-uart"; 333 reg = <0xe2900000 0x400>; 334 interrupt-parent = <&vic1>; 335 interrupts = <10>; 336 clock-names = "uart", "clk_uart_baud0", 337 "clk_uart_baud1"; 338 clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>, 339 <&clocks SCLK_UART0>; 340 status = "disabled"; 341 }; 342 343 uart1: serial@e2900400 { 344 compatible = "samsung,s5pv210-uart"; 345 reg = <0xe2900400 0x400>; 346 interrupt-parent = <&vic1>; 347 interrupts = <11>; 348 clock-names = "uart", "clk_uart_baud0", 349 "clk_uart_baud1"; 350 clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>, 351 <&clocks SCLK_UART1>; 352 status = "disabled"; 353 }; 354 355 uart2: serial@e2900800 { 356 compatible = "samsung,s5pv210-uart"; 357 reg = <0xe2900800 0x400>; 358 interrupt-parent = <&vic1>; 359 interrupts = <12>; 360 clock-names = "uart", "clk_uart_baud0", 361 "clk_uart_baud1"; 362 clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>, 363 <&clocks SCLK_UART2>; 364 status = "disabled"; 365 }; 366 367 uart3: serial@e2900c00 { 368 compatible = "samsung,s5pv210-uart"; 369 reg = <0xe2900c00 0x400>; 370 interrupt-parent = <&vic1>; 371 interrupts = <13>; 372 clock-names = "uart", "clk_uart_baud0", 373 "clk_uart_baud1"; 374 clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>, 375 <&clocks SCLK_UART3>; 376 status = "disabled"; 377 }; 378 379 sdhci0: sdhci@eb000000 { 380 compatible = "samsung,s3c6410-sdhci"; 381 reg = <0xeb000000 0x100000>; 382 interrupt-parent = <&vic1>; 383 interrupts = <26>; 384 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 385 clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>, 386 <&clocks SCLK_MMC0>; 387 status = "disabled"; 388 }; 389 390 sdhci1: sdhci@eb100000 { 391 compatible = "samsung,s3c6410-sdhci"; 392 reg = <0xeb100000 0x100000>; 393 interrupt-parent = <&vic1>; 394 interrupts = <27>; 395 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 396 clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>, 397 <&clocks SCLK_MMC1>; 398 status = "disabled"; 399 }; 400 401 sdhci2: sdhci@eb200000 { 402 compatible = "samsung,s3c6410-sdhci"; 403 reg = <0xeb200000 0x100000>; 404 interrupt-parent = <&vic1>; 405 interrupts = <28>; 406 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 407 clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>, 408 <&clocks SCLK_MMC2>; 409 status = "disabled"; 410 }; 411 412 sdhci3: sdhci@eb300000 { 413 compatible = "samsung,s3c6410-sdhci"; 414 reg = <0xeb300000 0x100000>; 415 interrupt-parent = <&vic3>; 416 interrupts = <2>; 417 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3"; 418 clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>, 419 <&clocks SCLK_MMC3>; 420 status = "disabled"; 421 }; 422 423 hsotg: hsotg@ec000000 { 424 compatible = "samsung,s3c6400-hsotg"; 425 reg = <0xec000000 0x20000>; 426 interrupt-parent = <&vic1>; 427 interrupts = <24>; 428 clocks = <&clocks CLK_USB_OTG>; 429 clock-names = "otg"; 430 phy-names = "usb2-phy"; 431 phys = <&usbphy 0>; 432 status = "disabled"; 433 }; 434 435 usbphy: usbphy@ec100000 { 436 compatible = "samsung,s5pv210-usb2-phy"; 437 reg = <0xec100000 0x100>; 438 samsung,pmureg-phandle = <&pmu_syscon>; 439 clocks = <&clocks CLK_USB_OTG>, <&xusbxti>; 440 clock-names = "phy", "ref"; 441 #phy-cells = <1>; 442 status = "disabled"; 443 }; 444 445 ehci: ehci@ec200000 { 446 compatible = "samsung,exynos4210-ehci"; 447 reg = <0xec200000 0x100>; 448 interrupts = <23>; 449 interrupt-parent = <&vic1>; 450 clocks = <&clocks CLK_USB_HOST>; 451 clock-names = "usbhost"; 452 #address-cells = <1>; 453 #size-cells = <0>; 454 status = "disabled"; 455 456 port@0 { 457 reg = <0>; 458 phys = <&usbphy 1>; 459 }; 460 }; 461 462 ohci: ohci@ec300000 { 463 compatible = "samsung,exynos4210-ohci"; 464 reg = <0xec300000 0x100>; 465 interrupts = <23>; 466 interrupt-parent = <&vic1>; 467 clocks = <&clocks CLK_USB_HOST>; 468 clock-names = "usbhost"; 469 #address-cells = <1>; 470 #size-cells = <0>; 471 status = "disabled"; 472 473 port@0 { 474 reg = <0>; 475 phys = <&usbphy 1>; 476 }; 477 }; 478 479 mfc: codec@f1700000 { 480 compatible = "samsung,mfc-v5"; 481 reg = <0xf1700000 0x10000>; 482 interrupt-parent = <&vic2>; 483 interrupts = <14>; 484 clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>; 485 clock-names = "sclk_mfc", "mfc"; 486 }; 487 488 vic0: interrupt-controller@f2000000 { 489 compatible = "arm,pl192-vic"; 490 interrupt-controller; 491 reg = <0xf2000000 0x1000>; 492 #interrupt-cells = <1>; 493 }; 494 495 vic1: interrupt-controller@f2100000 { 496 compatible = "arm,pl192-vic"; 497 interrupt-controller; 498 reg = <0xf2100000 0x1000>; 499 #interrupt-cells = <1>; 500 }; 501 502 vic2: interrupt-controller@f2200000 { 503 compatible = "arm,pl192-vic"; 504 interrupt-controller; 505 reg = <0xf2200000 0x1000>; 506 #interrupt-cells = <1>; 507 }; 508 509 vic3: interrupt-controller@f2300000 { 510 compatible = "arm,pl192-vic"; 511 interrupt-controller; 512 reg = <0xf2300000 0x1000>; 513 #interrupt-cells = <1>; 514 }; 515 516 fimd: fimd@f8000000 { 517 compatible = "samsung,exynos4210-fimd"; 518 interrupt-parent = <&vic2>; 519 reg = <0xf8000000 0x20000>; 520 interrupt-names = "fifo", "vsync", "lcd_sys"; 521 interrupts = <0>, <1>, <2>; 522 clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>; 523 clock-names = "sclk_fimd", "fimd"; 524 status = "disabled"; 525 }; 526 527 g2d: g2d@fa000000 { 528 compatible = "samsung,s5pv210-g2d"; 529 reg = <0xfa000000 0x1000>; 530 interrupt-parent = <&vic2>; 531 interrupts = <9>; 532 clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>; 533 clock-names = "sclk_fimg2d", "fimg2d"; 534 }; 535 536 mdma1: mdma@fa200000 { 537 compatible = "arm,pl330", "arm,primecell"; 538 reg = <0xfa200000 0x1000>; 539 interrupt-parent = <&vic0>; 540 interrupts = <18>; 541 clocks = <&clocks CLK_MDMA>; 542 clock-names = "apb_pclk"; 543 #dma-cells = <1>; 544 #dma-channels = <8>; 545 #dma-requests = <1>; 546 }; 547 548 i2c1: i2c@fab00000 { 549 compatible = "samsung,s3c2440-i2c"; 550 reg = <0xfab00000 0x1000>; 551 interrupt-parent = <&vic2>; 552 interrupts = <13>; 553 clocks = <&clocks CLK_I2C1>; 554 clock-names = "i2c"; 555 pinctrl-names = "default"; 556 pinctrl-0 = <&i2c1_bus>; 557 #address-cells = <1>; 558 #size-cells = <0>; 559 status = "disabled"; 560 }; 561 562 camera: camera { 563 compatible = "samsung,fimc", "simple-bus"; 564 pinctrl-names = "default"; 565 pinctrl-0 = <>; 566 clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>; 567 clock-names = "sclk_cam0", "sclk_cam1"; 568 #address-cells = <1>; 569 #size-cells = <1>; 570 ranges; 571 572 clock_cam: clock-controller { 573 #clock-cells = <1>; 574 }; 575 576 csis0: csis@fa600000 { 577 compatible = "samsung,s5pv210-csis"; 578 reg = <0xfa600000 0x4000>; 579 interrupt-parent = <&vic2>; 580 interrupts = <29>; 581 clocks = <&clocks CLK_CSIS>, 582 <&clocks SCLK_CSIS>; 583 clock-names = "clk_csis", 584 "sclk_csis"; 585 bus-width = <4>; 586 status = "disabled"; 587 #address-cells = <1>; 588 #size-cells = <0>; 589 }; 590 591 fimc0: fimc@fb200000 { 592 compatible = "samsung,s5pv210-fimc"; 593 reg = <0xfb200000 0x1000>; 594 interrupts = <5>; 595 interrupt-parent = <&vic2>; 596 clocks = <&clocks CLK_FIMC0>, 597 <&clocks SCLK_FIMC0>; 598 clock-names = "fimc", 599 "sclk_fimc"; 600 samsung,pix-limits = <4224 8192 1920 4224>; 601 samsung,mainscaler-ext; 602 samsung,cam-if; 603 }; 604 605 fimc1: fimc@fb300000 { 606 compatible = "samsung,s5pv210-fimc"; 607 reg = <0xfb300000 0x1000>; 608 interrupt-parent = <&vic2>; 609 interrupts = <6>; 610 clocks = <&clocks CLK_FIMC1>, 611 <&clocks SCLK_FIMC1>; 612 clock-names = "fimc", 613 "sclk_fimc"; 614 samsung,pix-limits = <4224 8192 1920 4224>; 615 samsung,mainscaler-ext; 616 samsung,cam-if; 617 }; 618 619 fimc2: fimc@fb400000 { 620 compatible = "samsung,s5pv210-fimc"; 621 reg = <0xfb400000 0x1000>; 622 interrupt-parent = <&vic2>; 623 interrupts = <7>; 624 clocks = <&clocks CLK_FIMC2>, 625 <&clocks SCLK_FIMC2>; 626 clock-names = "fimc", 627 "sclk_fimc"; 628 samsung,pix-limits = <4224 8192 1920 4224>; 629 samsung,mainscaler-ext; 630 samsung,lcd-wb; 631 }; 632 }; 633 }; 634}; 635 636#include "s5pv210-pinctrl.dtsi" 637