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1/*
2 * clock specification for Xilinx ZynqMP ep108 development board
3 *
4 * (C) Copyright 2015, Xilinx, Inc.
5 *
6 * Michal Simek <michal.simek@xilinx.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 */
13
14/ {
15	misc_clk: misc_clk {
16		compatible = "fixed-clock";
17		#clock-cells = <0>;
18		clock-frequency = <25000000>;
19	};
20
21	i2c_clk: i2c_clk {
22		compatible = "fixed-clock";
23		#clock-cells = <0x0>;
24		clock-frequency = <111111111>;
25	};
26
27	sata_clk: sata_clk {
28		compatible = "fixed-clock";
29		#clock-cells = <0>;
30		clock-frequency = <75000000>;
31	};
32
33	clk100: clk100 {
34		compatible = "fixed-clock";
35		#clock-cells = <0>;
36		clock-frequency = <100000000>;
37	};
38
39	clk600: clk600 {
40		compatible = "fixed-clock";
41		#clock-cells = <0>;
42		clock-frequency = <600000000>;
43	};
44};
45
46&can0 {
47	clocks = <&misc_clk &misc_clk>;
48};
49
50&can1 {
51	clocks = <&misc_clk &misc_clk>;
52};
53
54&fpd_dma_chan1 {
55	clocks = <&clk600>, <&clk100>;
56};
57
58&fpd_dma_chan2 {
59	clocks = <&clk600>, <&clk100>;
60};
61
62&fpd_dma_chan3 {
63	clocks = <&clk600>, <&clk100>;
64};
65
66&fpd_dma_chan4 {
67	clocks = <&clk600>, <&clk100>;
68};
69
70&fpd_dma_chan5 {
71	clocks = <&clk600>, <&clk100>;
72};
73
74&fpd_dma_chan6 {
75	clocks = <&clk600>, <&clk100>;
76};
77
78&fpd_dma_chan7 {
79	clocks = <&clk600>, <&clk100>;
80};
81
82&fpd_dma_chan8 {
83	clocks = <&clk600>, <&clk100>;
84};
85
86&gem0 {
87	clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>;
88};
89
90&gpio {
91	clocks = <&misc_clk>;
92};
93
94&i2c0 {
95	clocks = <&i2c_clk>;
96};
97
98&i2c1 {
99	clocks = <&i2c_clk>;
100};
101
102&sata {
103	clocks = <&sata_clk>;
104};
105
106&sdhci0 {
107	clocks = <&misc_clk>, <&misc_clk>;
108};
109
110&sdhci1 {
111	clocks = <&misc_clk>, <&misc_clk>;
112};
113
114&spi0 {
115	clocks = <&misc_clk &misc_clk>;
116};
117
118&spi1 {
119	clocks = <&misc_clk &misc_clk>;
120};
121
122&uart0 {
123	clocks = <&misc_clk &misc_clk>;
124};
125
126&usb0 {
127	clocks = <&misc_clk>, <&misc_clk>;
128};
129
130&usb1 {
131	clocks = <&misc_clk>, <&misc_clk>;
132};
133
134&watchdog0 {
135	clocks= <&misc_clk>;
136};
137