1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _DT_BINDINGS_STM32H7_PINFUNC_H 3 #define _DT_BINDINGS_STM32H7_PINFUNC_H 4 5 #define STM32H7_PA0_FUNC_GPIO 0x0 6 #define STM32H7_PA0_FUNC_TIM2_CH1_TIM2_ETR 0x2 7 #define STM32H7_PA0_FUNC_TIM5_CH1 0x3 8 #define STM32H7_PA0_FUNC_TIM8_ETR 0x4 9 #define STM32H7_PA0_FUNC_TIM15_BKIN 0x5 10 #define STM32H7_PA0_FUNC_USART2_CTS_NSS 0x8 11 #define STM32H7_PA0_FUNC_UART4_TX 0x9 12 #define STM32H7_PA0_FUNC_SDMMC2_CMD 0xa 13 #define STM32H7_PA0_FUNC_SAI2_SD_B 0xb 14 #define STM32H7_PA0_FUNC_ETH_MII_CRS 0xc 15 #define STM32H7_PA0_FUNC_EVENTOUT 0x10 16 #define STM32H7_PA0_FUNC_ANALOG 0x11 17 18 #define STM32H7_PA1_FUNC_GPIO 0x100 19 #define STM32H7_PA1_FUNC_TIM2_CH2 0x102 20 #define STM32H7_PA1_FUNC_TIM5_CH2 0x103 21 #define STM32H7_PA1_FUNC_LPTIM3_OUT 0x104 22 #define STM32H7_PA1_FUNC_TIM15_CH1N 0x105 23 #define STM32H7_PA1_FUNC_USART2_RTS 0x108 24 #define STM32H7_PA1_FUNC_UART4_RX 0x109 25 #define STM32H7_PA1_FUNC_QUADSPI_BK1_IO3 0x10a 26 #define STM32H7_PA1_FUNC_SAI2_MCK_B 0x10b 27 #define STM32H7_PA1_FUNC_ETH_MII_RX_CLK_ETH_RMII_REF_CLK 0x10c 28 #define STM32H7_PA1_FUNC_LCD_R2 0x10f 29 #define STM32H7_PA1_FUNC_EVENTOUT 0x110 30 #define STM32H7_PA1_FUNC_ANALOG 0x111 31 32 #define STM32H7_PA2_FUNC_GPIO 0x200 33 #define STM32H7_PA2_FUNC_TIM2_CH3 0x202 34 #define STM32H7_PA2_FUNC_TIM5_CH3 0x203 35 #define STM32H7_PA2_FUNC_LPTIM4_OUT 0x204 36 #define STM32H7_PA2_FUNC_TIM15_CH1 0x205 37 #define STM32H7_PA2_FUNC_USART2_TX 0x208 38 #define STM32H7_PA2_FUNC_SAI2_SCK_B 0x209 39 #define STM32H7_PA2_FUNC_ETH_MDIO 0x20c 40 #define STM32H7_PA2_FUNC_MDIOS_MDIO 0x20d 41 #define STM32H7_PA2_FUNC_LCD_R1 0x20f 42 #define STM32H7_PA2_FUNC_EVENTOUT 0x210 43 #define STM32H7_PA2_FUNC_ANALOG 0x211 44 45 #define STM32H7_PA3_FUNC_GPIO 0x300 46 #define STM32H7_PA3_FUNC_TIM2_CH4 0x302 47 #define STM32H7_PA3_FUNC_TIM5_CH4 0x303 48 #define STM32H7_PA3_FUNC_LPTIM5_OUT 0x304 49 #define STM32H7_PA3_FUNC_TIM15_CH2 0x305 50 #define STM32H7_PA3_FUNC_USART2_RX 0x308 51 #define STM32H7_PA3_FUNC_LCD_B2 0x30a 52 #define STM32H7_PA3_FUNC_OTG_HS_ULPI_D0 0x30b 53 #define STM32H7_PA3_FUNC_ETH_MII_COL 0x30c 54 #define STM32H7_PA3_FUNC_LCD_B5 0x30f 55 #define STM32H7_PA3_FUNC_EVENTOUT 0x310 56 #define STM32H7_PA3_FUNC_ANALOG 0x311 57 58 #define STM32H7_PA4_FUNC_GPIO 0x400 59 #define STM32H7_PA4_FUNC_TIM5_ETR 0x403 60 #define STM32H7_PA4_FUNC_SPI1_NSS_I2S1_WS 0x406 61 #define STM32H7_PA4_FUNC_SPI3_NSS_I2S3_WS 0x407 62 #define STM32H7_PA4_FUNC_USART2_CK 0x408 63 #define STM32H7_PA4_FUNC_SPI6_NSS 0x409 64 #define STM32H7_PA4_FUNC_OTG_HS_SOF 0x40d 65 #define STM32H7_PA4_FUNC_DCMI_HSYNC 0x40e 66 #define STM32H7_PA4_FUNC_LCD_VSYNC 0x40f 67 #define STM32H7_PA4_FUNC_EVENTOUT 0x410 68 #define STM32H7_PA4_FUNC_ANALOG 0x411 69 70 #define STM32H7_PA5_FUNC_GPIO 0x500 71 #define STM32H7_PA5_FUNC_TIM2_CH1_TIM2_ETR 0x502 72 #define STM32H7_PA5_FUNC_TIM8_CH1N 0x504 73 #define STM32H7_PA5_FUNC_SPI1_SCK_I2S1_CK 0x506 74 #define STM32H7_PA5_FUNC_SPI6_SCK 0x509 75 #define STM32H7_PA5_FUNC_OTG_HS_ULPI_CK 0x50b 76 #define STM32H7_PA5_FUNC_LCD_R4 0x50f 77 #define STM32H7_PA5_FUNC_EVENTOUT 0x510 78 #define STM32H7_PA5_FUNC_ANALOG 0x511 79 80 #define STM32H7_PA6_FUNC_GPIO 0x600 81 #define STM32H7_PA6_FUNC_TIM1_BKIN 0x602 82 #define STM32H7_PA6_FUNC_TIM3_CH1 0x603 83 #define STM32H7_PA6_FUNC_TIM8_BKIN 0x604 84 #define STM32H7_PA6_FUNC_SPI1_MISO_I2S1_SDI 0x606 85 #define STM32H7_PA6_FUNC_SPI6_MISO 0x609 86 #define STM32H7_PA6_FUNC_TIM13_CH1 0x60a 87 #define STM32H7_PA6_FUNC_TIM8_BKIN_COMP12 0x60b 88 #define STM32H7_PA6_FUNC_MDIOS_MDC 0x60c 89 #define STM32H7_PA6_FUNC_TIM1_BKIN_COMP12 0x60d 90 #define STM32H7_PA6_FUNC_DCMI_PIXCLK 0x60e 91 #define STM32H7_PA6_FUNC_LCD_G2 0x60f 92 #define STM32H7_PA6_FUNC_EVENTOUT 0x610 93 #define STM32H7_PA6_FUNC_ANALOG 0x611 94 95 #define STM32H7_PA7_FUNC_GPIO 0x700 96 #define STM32H7_PA7_FUNC_TIM1_CH1N 0x702 97 #define STM32H7_PA7_FUNC_TIM3_CH2 0x703 98 #define STM32H7_PA7_FUNC_TIM8_CH1N 0x704 99 #define STM32H7_PA7_FUNC_SPI1_MOSI_I2S1_SDO 0x706 100 #define STM32H7_PA7_FUNC_SPI6_MOSI 0x709 101 #define STM32H7_PA7_FUNC_TIM14_CH1 0x70a 102 #define STM32H7_PA7_FUNC_ETH_MII_RX_DV_ETH_RMII_CRS_DV 0x70c 103 #define STM32H7_PA7_FUNC_FMC_SDNWE 0x70d 104 #define STM32H7_PA7_FUNC_EVENTOUT 0x710 105 #define STM32H7_PA7_FUNC_ANALOG 0x711 106 107 #define STM32H7_PA8_FUNC_GPIO 0x800 108 #define STM32H7_PA8_FUNC_MCO1 0x801 109 #define STM32H7_PA8_FUNC_TIM1_CH1 0x802 110 #define STM32H7_PA8_FUNC_HRTIM_CHB2 0x803 111 #define STM32H7_PA8_FUNC_TIM8_BKIN2 0x804 112 #define STM32H7_PA8_FUNC_I2C3_SCL 0x805 113 #define STM32H7_PA8_FUNC_USART1_CK 0x808 114 #define STM32H7_PA8_FUNC_OTG_FS_SOF 0x80b 115 #define STM32H7_PA8_FUNC_UART7_RX 0x80c 116 #define STM32H7_PA8_FUNC_TIM8_BKIN2_COMP12 0x80d 117 #define STM32H7_PA8_FUNC_LCD_B3 0x80e 118 #define STM32H7_PA8_FUNC_LCD_R6 0x80f 119 #define STM32H7_PA8_FUNC_EVENTOUT 0x810 120 #define STM32H7_PA8_FUNC_ANALOG 0x811 121 122 #define STM32H7_PA9_FUNC_GPIO 0x900 123 #define STM32H7_PA9_FUNC_TIM1_CH2 0x902 124 #define STM32H7_PA9_FUNC_HRTIM_CHC1 0x903 125 #define STM32H7_PA9_FUNC_LPUART1_TX 0x904 126 #define STM32H7_PA9_FUNC_I2C3_SMBA 0x905 127 #define STM32H7_PA9_FUNC_SPI2_SCK_I2S2_CK 0x906 128 #define STM32H7_PA9_FUNC_USART1_TX 0x908 129 #define STM32H7_PA9_FUNC_CAN1_RXFD 0x90a 130 #define STM32H7_PA9_FUNC_ETH_TX_ER 0x90c 131 #define STM32H7_PA9_FUNC_DCMI_D0 0x90e 132 #define STM32H7_PA9_FUNC_LCD_R5 0x90f 133 #define STM32H7_PA9_FUNC_EVENTOUT 0x910 134 #define STM32H7_PA9_FUNC_ANALOG 0x911 135 136 #define STM32H7_PA10_FUNC_GPIO 0xa00 137 #define STM32H7_PA10_FUNC_TIM1_CH3 0xa02 138 #define STM32H7_PA10_FUNC_HRTIM_CHC2 0xa03 139 #define STM32H7_PA10_FUNC_LPUART1_RX 0xa04 140 #define STM32H7_PA10_FUNC_USART1_RX 0xa08 141 #define STM32H7_PA10_FUNC_CAN1_TXFD 0xa0a 142 #define STM32H7_PA10_FUNC_OTG_FS_ID 0xa0b 143 #define STM32H7_PA10_FUNC_MDIOS_MDIO 0xa0c 144 #define STM32H7_PA10_FUNC_LCD_B4 0xa0d 145 #define STM32H7_PA10_FUNC_DCMI_D1 0xa0e 146 #define STM32H7_PA10_FUNC_LCD_B1 0xa0f 147 #define STM32H7_PA10_FUNC_EVENTOUT 0xa10 148 #define STM32H7_PA10_FUNC_ANALOG 0xa11 149 150 #define STM32H7_PA11_FUNC_GPIO 0xb00 151 #define STM32H7_PA11_FUNC_TIM1_CH4 0xb02 152 #define STM32H7_PA11_FUNC_HRTIM_CHD1 0xb03 153 #define STM32H7_PA11_FUNC_LPUART1_CTS 0xb04 154 #define STM32H7_PA11_FUNC_SPI2_NSS_I2S2_WS 0xb06 155 #define STM32H7_PA11_FUNC_UART4_RX 0xb07 156 #define STM32H7_PA11_FUNC_USART1_CTS_NSS 0xb08 157 #define STM32H7_PA11_FUNC_CAN1_RX 0xb0a 158 #define STM32H7_PA11_FUNC_OTG_FS_DM 0xb0b 159 #define STM32H7_PA11_FUNC_LCD_R4 0xb0f 160 #define STM32H7_PA11_FUNC_EVENTOUT 0xb10 161 #define STM32H7_PA11_FUNC_ANALOG 0xb11 162 163 #define STM32H7_PA12_FUNC_GPIO 0xc00 164 #define STM32H7_PA12_FUNC_TIM1_ETR 0xc02 165 #define STM32H7_PA12_FUNC_HRTIM_CHD2 0xc03 166 #define STM32H7_PA12_FUNC_LPUART1_RTS 0xc04 167 #define STM32H7_PA12_FUNC_SPI2_SCK_I2S2_CK 0xc06 168 #define STM32H7_PA12_FUNC_UART4_TX 0xc07 169 #define STM32H7_PA12_FUNC_USART1_RTS 0xc08 170 #define STM32H7_PA12_FUNC_SAI2_FS_B 0xc09 171 #define STM32H7_PA12_FUNC_CAN1_TX 0xc0a 172 #define STM32H7_PA12_FUNC_OTG_FS_DP 0xc0b 173 #define STM32H7_PA12_FUNC_LCD_R5 0xc0f 174 #define STM32H7_PA12_FUNC_EVENTOUT 0xc10 175 #define STM32H7_PA12_FUNC_ANALOG 0xc11 176 177 #define STM32H7_PA13_FUNC_GPIO 0xd00 178 #define STM32H7_PA13_FUNC_JTMS_SWDIO 0xd01 179 #define STM32H7_PA13_FUNC_EVENTOUT 0xd10 180 #define STM32H7_PA13_FUNC_ANALOG 0xd11 181 182 #define STM32H7_PA14_FUNC_GPIO 0xe00 183 #define STM32H7_PA14_FUNC_JTCK_SWCLK 0xe01 184 #define STM32H7_PA14_FUNC_EVENTOUT 0xe10 185 #define STM32H7_PA14_FUNC_ANALOG 0xe11 186 187 #define STM32H7_PA15_FUNC_GPIO 0xf00 188 #define STM32H7_PA15_FUNC_JTDI 0xf01 189 #define STM32H7_PA15_FUNC_TIM2_CH1_TIM2_ETR 0xf02 190 #define STM32H7_PA15_FUNC_HRTIM_FLT1 0xf03 191 #define STM32H7_PA15_FUNC_HDMI_CEC 0xf05 192 #define STM32H7_PA15_FUNC_SPI1_NSS_I2S1_WS 0xf06 193 #define STM32H7_PA15_FUNC_SPI3_NSS_I2S3_WS 0xf07 194 #define STM32H7_PA15_FUNC_SPI6_NSS 0xf08 195 #define STM32H7_PA15_FUNC_UART4_RTS 0xf09 196 #define STM32H7_PA15_FUNC_UART7_TX 0xf0c 197 #define STM32H7_PA15_FUNC_DSI_TE 0xf0e 198 #define STM32H7_PA15_FUNC_EVENTOUT 0xf10 199 #define STM32H7_PA15_FUNC_ANALOG 0xf11 200 201 #define STM32H7_PB0_FUNC_GPIO 0x1000 202 #define STM32H7_PB0_FUNC_TIM1_CH2N 0x1002 203 #define STM32H7_PB0_FUNC_TIM3_CH3 0x1003 204 #define STM32H7_PB0_FUNC_TIM8_CH2N 0x1004 205 #define STM32H7_PB0_FUNC_DFSDM_CKOUT 0x1007 206 #define STM32H7_PB0_FUNC_UART4_CTS 0x1009 207 #define STM32H7_PB0_FUNC_LCD_R3 0x100a 208 #define STM32H7_PB0_FUNC_OTG_HS_ULPI_D1 0x100b 209 #define STM32H7_PB0_FUNC_ETH_MII_RXD2 0x100c 210 #define STM32H7_PB0_FUNC_LCD_G1 0x100f 211 #define STM32H7_PB0_FUNC_EVENTOUT 0x1010 212 #define STM32H7_PB0_FUNC_ANALOG 0x1011 213 214 #define STM32H7_PB1_FUNC_GPIO 0x1100 215 #define STM32H7_PB1_FUNC_TIM1_CH3N 0x1102 216 #define STM32H7_PB1_FUNC_TIM3_CH4 0x1103 217 #define STM32H7_PB1_FUNC_TIM8_CH3N 0x1104 218 #define STM32H7_PB1_FUNC_DFSDM_DATIN1 0x1107 219 #define STM32H7_PB1_FUNC_LCD_R6 0x110a 220 #define STM32H7_PB1_FUNC_OTG_HS_ULPI_D2 0x110b 221 #define STM32H7_PB1_FUNC_ETH_MII_RXD3 0x110c 222 #define STM32H7_PB1_FUNC_LCD_G0 0x110f 223 #define STM32H7_PB1_FUNC_EVENTOUT 0x1110 224 #define STM32H7_PB1_FUNC_ANALOG 0x1111 225 226 #define STM32H7_PB2_FUNC_GPIO 0x1200 227 #define STM32H7_PB2_FUNC_SAI1_D1 0x1203 228 #define STM32H7_PB2_FUNC_DFSDM_CKIN1 0x1205 229 #define STM32H7_PB2_FUNC_SAI1_SD_A 0x1207 230 #define STM32H7_PB2_FUNC_SPI3_MOSI_I2S3_SDO 0x1208 231 #define STM32H7_PB2_FUNC_SAI4_SD_A 0x1209 232 #define STM32H7_PB2_FUNC_QUADSPI_CLK 0x120a 233 #define STM32H7_PB2_FUNC_SAI4_D1 0x120b 234 #define STM32H7_PB2_FUNC_ETH_TX_ER 0x120c 235 #define STM32H7_PB2_FUNC_EVENTOUT 0x1210 236 #define STM32H7_PB2_FUNC_ANALOG 0x1211 237 238 #define STM32H7_PB3_FUNC_GPIO 0x1300 239 #define STM32H7_PB3_FUNC_JTDO_TRACESWO 0x1301 240 #define STM32H7_PB3_FUNC_TIM2_CH2 0x1302 241 #define STM32H7_PB3_FUNC_HRTIM_FLT4 0x1303 242 #define STM32H7_PB3_FUNC_SPI1_SCK_I2S1_CK 0x1306 243 #define STM32H7_PB3_FUNC_SPI3_SCK_I2S3_CK 0x1307 244 #define STM32H7_PB3_FUNC_SPI6_SCK 0x1309 245 #define STM32H7_PB3_FUNC_SDMMC2_D2 0x130a 246 #define STM32H7_PB3_FUNC_UART7_RX 0x130c 247 #define STM32H7_PB3_FUNC_EVENTOUT 0x1310 248 #define STM32H7_PB3_FUNC_ANALOG 0x1311 249 250 #define STM32H7_PB4_FUNC_GPIO 0x1400 251 #define STM32H7_PB4_FUNC_NJTRST 0x1401 252 #define STM32H7_PB4_FUNC_TIM16_BKIN 0x1402 253 #define STM32H7_PB4_FUNC_TIM3_CH1 0x1403 254 #define STM32H7_PB4_FUNC_HRTIM_EEV6 0x1404 255 #define STM32H7_PB4_FUNC_SPI1_MISO_I2S1_SDI 0x1406 256 #define STM32H7_PB4_FUNC_SPI3_MISO_I2S3_SDI 0x1407 257 #define STM32H7_PB4_FUNC_SPI2_NSS_I2S2_WS 0x1408 258 #define STM32H7_PB4_FUNC_SPI6_MISO 0x1409 259 #define STM32H7_PB4_FUNC_SDMMC2_D3 0x140a 260 #define STM32H7_PB4_FUNC_UART7_TX 0x140c 261 #define STM32H7_PB4_FUNC_EVENTOUT 0x1410 262 #define STM32H7_PB4_FUNC_ANALOG 0x1411 263 264 #define STM32H7_PB5_FUNC_GPIO 0x1500 265 #define STM32H7_PB5_FUNC_TIM17_BKIN 0x1502 266 #define STM32H7_PB5_FUNC_TIM3_CH2 0x1503 267 #define STM32H7_PB5_FUNC_HRTIM_EEV7 0x1504 268 #define STM32H7_PB5_FUNC_I2C1_SMBA 0x1505 269 #define STM32H7_PB5_FUNC_SPI1_MOSI_I2S1_SDO 0x1506 270 #define STM32H7_PB5_FUNC_I2C4_SMBA 0x1507 271 #define STM32H7_PB5_FUNC_SPI3_MOSI_I2S3_SDO 0x1508 272 #define STM32H7_PB5_FUNC_SPI6_MOSI 0x1509 273 #define STM32H7_PB5_FUNC_CAN2_RX 0x150a 274 #define STM32H7_PB5_FUNC_OTG_HS_ULPI_D7 0x150b 275 #define STM32H7_PB5_FUNC_ETH_PPS_OUT 0x150c 276 #define STM32H7_PB5_FUNC_FMC_SDCKE1 0x150d 277 #define STM32H7_PB5_FUNC_DCMI_D10 0x150e 278 #define STM32H7_PB5_FUNC_UART5_RX 0x150f 279 #define STM32H7_PB5_FUNC_EVENTOUT 0x1510 280 #define STM32H7_PB5_FUNC_ANALOG 0x1511 281 282 #define STM32H7_PB6_FUNC_GPIO 0x1600 283 #define STM32H7_PB6_FUNC_TIM16_CH1N 0x1602 284 #define STM32H7_PB6_FUNC_TIM4_CH1 0x1603 285 #define STM32H7_PB6_FUNC_HRTIM_EEV8 0x1604 286 #define STM32H7_PB6_FUNC_I2C1_SCL 0x1605 287 #define STM32H7_PB6_FUNC_HDMI_CEC 0x1606 288 #define STM32H7_PB6_FUNC_I2C4_SCL 0x1607 289 #define STM32H7_PB6_FUNC_USART1_TX 0x1608 290 #define STM32H7_PB6_FUNC_LPUART1_TX 0x1609 291 #define STM32H7_PB6_FUNC_CAN2_TX 0x160a 292 #define STM32H7_PB6_FUNC_QUADSPI_BK1_NCS 0x160b 293 #define STM32H7_PB6_FUNC_DFSDM_DATIN5 0x160c 294 #define STM32H7_PB6_FUNC_FMC_SDNE1 0x160d 295 #define STM32H7_PB6_FUNC_DCMI_D5 0x160e 296 #define STM32H7_PB6_FUNC_UART5_TX 0x160f 297 #define STM32H7_PB6_FUNC_EVENTOUT 0x1610 298 #define STM32H7_PB6_FUNC_ANALOG 0x1611 299 300 #define STM32H7_PB7_FUNC_GPIO 0x1700 301 #define STM32H7_PB7_FUNC_TIM17_CH1N 0x1702 302 #define STM32H7_PB7_FUNC_TIM4_CH2 0x1703 303 #define STM32H7_PB7_FUNC_HRTIM_EEV9 0x1704 304 #define STM32H7_PB7_FUNC_I2C1_SDA 0x1705 305 #define STM32H7_PB7_FUNC_I2C4_SDA 0x1707 306 #define STM32H7_PB7_FUNC_USART1_RX 0x1708 307 #define STM32H7_PB7_FUNC_LPUART1_RX 0x1709 308 #define STM32H7_PB7_FUNC_CAN2_TXFD 0x170a 309 #define STM32H7_PB7_FUNC_DFSDM_CKIN5 0x170c 310 #define STM32H7_PB7_FUNC_FMC_NL 0x170d 311 #define STM32H7_PB7_FUNC_DCMI_VSYNC 0x170e 312 #define STM32H7_PB7_FUNC_EVENTOUT 0x1710 313 #define STM32H7_PB7_FUNC_ANALOG 0x1711 314 315 #define STM32H7_PB8_FUNC_GPIO 0x1800 316 #define STM32H7_PB8_FUNC_TIM16_CH1 0x1802 317 #define STM32H7_PB8_FUNC_TIM4_CH3 0x1803 318 #define STM32H7_PB8_FUNC_DFSDM_CKIN7 0x1804 319 #define STM32H7_PB8_FUNC_I2C1_SCL 0x1805 320 #define STM32H7_PB8_FUNC_I2C4_SCL 0x1807 321 #define STM32H7_PB8_FUNC_SDMMC1_CKIN 0x1808 322 #define STM32H7_PB8_FUNC_UART4_RX 0x1809 323 #define STM32H7_PB8_FUNC_CAN1_RX 0x180a 324 #define STM32H7_PB8_FUNC_SDMMC2_D4 0x180b 325 #define STM32H7_PB8_FUNC_ETH_MII_TXD3 0x180c 326 #define STM32H7_PB8_FUNC_SDMMC1_D4 0x180d 327 #define STM32H7_PB8_FUNC_DCMI_D6 0x180e 328 #define STM32H7_PB8_FUNC_LCD_B6 0x180f 329 #define STM32H7_PB8_FUNC_EVENTOUT 0x1810 330 #define STM32H7_PB8_FUNC_ANALOG 0x1811 331 332 #define STM32H7_PB9_FUNC_GPIO 0x1900 333 #define STM32H7_PB9_FUNC_TIM17_CH1 0x1902 334 #define STM32H7_PB9_FUNC_TIM4_CH4 0x1903 335 #define STM32H7_PB9_FUNC_DFSDM_DATIN7 0x1904 336 #define STM32H7_PB9_FUNC_I2C1_SDA 0x1905 337 #define STM32H7_PB9_FUNC_SPI2_NSS_I2S2_WS 0x1906 338 #define STM32H7_PB9_FUNC_I2C4_SDA 0x1907 339 #define STM32H7_PB9_FUNC_SDMMC1_CDIR 0x1908 340 #define STM32H7_PB9_FUNC_UART4_TX 0x1909 341 #define STM32H7_PB9_FUNC_CAN1_TX 0x190a 342 #define STM32H7_PB9_FUNC_SDMMC2_D5 0x190b 343 #define STM32H7_PB9_FUNC_I2C4_SMBA 0x190c 344 #define STM32H7_PB9_FUNC_SDMMC1_D5 0x190d 345 #define STM32H7_PB9_FUNC_DCMI_D7 0x190e 346 #define STM32H7_PB9_FUNC_LCD_B7 0x190f 347 #define STM32H7_PB9_FUNC_EVENTOUT 0x1910 348 #define STM32H7_PB9_FUNC_ANALOG 0x1911 349 350 #define STM32H7_PB10_FUNC_GPIO 0x1a00 351 #define STM32H7_PB10_FUNC_TIM2_CH3 0x1a02 352 #define STM32H7_PB10_FUNC_HRTIM_SCOUT 0x1a03 353 #define STM32H7_PB10_FUNC_LPTIM2_IN1 0x1a04 354 #define STM32H7_PB10_FUNC_I2C2_SCL 0x1a05 355 #define STM32H7_PB10_FUNC_SPI2_SCK_I2S2_CK 0x1a06 356 #define STM32H7_PB10_FUNC_DFSDM_DATIN7 0x1a07 357 #define STM32H7_PB10_FUNC_USART3_TX 0x1a08 358 #define STM32H7_PB10_FUNC_QUADSPI_BK1_NCS 0x1a0a 359 #define STM32H7_PB10_FUNC_OTG_HS_ULPI_D3 0x1a0b 360 #define STM32H7_PB10_FUNC_ETH_MII_RX_ER 0x1a0c 361 #define STM32H7_PB10_FUNC_LCD_G4 0x1a0f 362 #define STM32H7_PB10_FUNC_EVENTOUT 0x1a10 363 #define STM32H7_PB10_FUNC_ANALOG 0x1a11 364 365 #define STM32H7_PB11_FUNC_GPIO 0x1b00 366 #define STM32H7_PB11_FUNC_TIM2_CH4 0x1b02 367 #define STM32H7_PB11_FUNC_HRTIM_SCIN 0x1b03 368 #define STM32H7_PB11_FUNC_LPTIM2_ETR 0x1b04 369 #define STM32H7_PB11_FUNC_I2C2_SDA 0x1b05 370 #define STM32H7_PB11_FUNC_DFSDM_CKIN7 0x1b07 371 #define STM32H7_PB11_FUNC_USART3_RX 0x1b08 372 #define STM32H7_PB11_FUNC_OTG_HS_ULPI_D4 0x1b0b 373 #define STM32H7_PB11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN 0x1b0c 374 #define STM32H7_PB11_FUNC_DSI_TE 0x1b0e 375 #define STM32H7_PB11_FUNC_LCD_G5 0x1b0f 376 #define STM32H7_PB11_FUNC_EVENTOUT 0x1b10 377 #define STM32H7_PB11_FUNC_ANALOG 0x1b11 378 379 #define STM32H7_PB12_FUNC_GPIO 0x1c00 380 #define STM32H7_PB12_FUNC_TIM1_BKIN 0x1c02 381 #define STM32H7_PB12_FUNC_I2C2_SMBA 0x1c05 382 #define STM32H7_PB12_FUNC_SPI2_NSS_I2S2_WS 0x1c06 383 #define STM32H7_PB12_FUNC_DFSDM_DATIN1 0x1c07 384 #define STM32H7_PB12_FUNC_USART3_CK 0x1c08 385 #define STM32H7_PB12_FUNC_CAN2_RX 0x1c0a 386 #define STM32H7_PB12_FUNC_OTG_HS_ULPI_D5 0x1c0b 387 #define STM32H7_PB12_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0 0x1c0c 388 #define STM32H7_PB12_FUNC_OTG_HS_ID 0x1c0d 389 #define STM32H7_PB12_FUNC_TIM1_BKIN_COMP12 0x1c0e 390 #define STM32H7_PB12_FUNC_UART5_RX 0x1c0f 391 #define STM32H7_PB12_FUNC_EVENTOUT 0x1c10 392 #define STM32H7_PB12_FUNC_ANALOG 0x1c11 393 394 #define STM32H7_PB13_FUNC_GPIO 0x1d00 395 #define STM32H7_PB13_FUNC_TIM1_CH1N 0x1d02 396 #define STM32H7_PB13_FUNC_LPTIM2_OUT 0x1d04 397 #define STM32H7_PB13_FUNC_SPI2_SCK_I2S2_CK 0x1d06 398 #define STM32H7_PB13_FUNC_DFSDM_CKIN1 0x1d07 399 #define STM32H7_PB13_FUNC_USART3_CTS_NSS 0x1d08 400 #define STM32H7_PB13_FUNC_CAN2_TX 0x1d0a 401 #define STM32H7_PB13_FUNC_OTG_HS_ULPI_D6 0x1d0b 402 #define STM32H7_PB13_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1 0x1d0c 403 #define STM32H7_PB13_FUNC_UART5_TX 0x1d0f 404 #define STM32H7_PB13_FUNC_EVENTOUT 0x1d10 405 #define STM32H7_PB13_FUNC_ANALOG 0x1d11 406 407 #define STM32H7_PB14_FUNC_GPIO 0x1e00 408 #define STM32H7_PB14_FUNC_TIM1_CH2N 0x1e02 409 #define STM32H7_PB14_FUNC_TIM8_CH2N 0x1e04 410 #define STM32H7_PB14_FUNC_USART1_TX 0x1e05 411 #define STM32H7_PB14_FUNC_SPI2_MISO_I2S2_SDI 0x1e06 412 #define STM32H7_PB14_FUNC_DFSDM_DATIN2 0x1e07 413 #define STM32H7_PB14_FUNC_USART3_RTS 0x1e08 414 #define STM32H7_PB14_FUNC_UART4_RTS 0x1e09 415 #define STM32H7_PB14_FUNC_SDMMC2_D0 0x1e0a 416 #define STM32H7_PB14_FUNC_OTG_HS_DM 0x1e0d 417 #define STM32H7_PB14_FUNC_EVENTOUT 0x1e10 418 #define STM32H7_PB14_FUNC_ANALOG 0x1e11 419 420 #define STM32H7_PB15_FUNC_GPIO 0x1f00 421 #define STM32H7_PB15_FUNC_RTC_REFIN 0x1f01 422 #define STM32H7_PB15_FUNC_TIM1_CH3N 0x1f02 423 #define STM32H7_PB15_FUNC_TIM8_CH3N 0x1f04 424 #define STM32H7_PB15_FUNC_USART1_RX 0x1f05 425 #define STM32H7_PB15_FUNC_SPI2_MOSI_I2S2_SDO 0x1f06 426 #define STM32H7_PB15_FUNC_DFSDM_CKIN2 0x1f07 427 #define STM32H7_PB15_FUNC_UART4_CTS 0x1f09 428 #define STM32H7_PB15_FUNC_SDMMC2_D1 0x1f0a 429 #define STM32H7_PB15_FUNC_OTG_HS_DP 0x1f0d 430 #define STM32H7_PB15_FUNC_EVENTOUT 0x1f10 431 #define STM32H7_PB15_FUNC_ANALOG 0x1f11 432 433 #define STM32H7_PC0_FUNC_GPIO 0x2000 434 #define STM32H7_PC0_FUNC_DFSDM_CKIN0 0x2004 435 #define STM32H7_PC0_FUNC_DFSDM_DATIN4 0x2007 436 #define STM32H7_PC0_FUNC_SAI2_FS_B 0x2009 437 #define STM32H7_PC0_FUNC_OTG_HS_ULPI_STP 0x200b 438 #define STM32H7_PC0_FUNC_FMC_SDNWE 0x200d 439 #define STM32H7_PC0_FUNC_LCD_R5 0x200f 440 #define STM32H7_PC0_FUNC_EVENTOUT 0x2010 441 #define STM32H7_PC0_FUNC_ANALOG 0x2011 442 443 #define STM32H7_PC1_FUNC_GPIO 0x2100 444 #define STM32H7_PC1_FUNC_TRACED0 0x2101 445 #define STM32H7_PC1_FUNC_SAI1_D1 0x2103 446 #define STM32H7_PC1_FUNC_DFSDM_DATIN0 0x2104 447 #define STM32H7_PC1_FUNC_DFSDM_CKIN4 0x2105 448 #define STM32H7_PC1_FUNC_SPI2_MOSI_I2S2_SDO 0x2106 449 #define STM32H7_PC1_FUNC_SAI1_SD_A 0x2107 450 #define STM32H7_PC1_FUNC_SAI4_SD_A 0x2109 451 #define STM32H7_PC1_FUNC_SDMMC2_CK 0x210a 452 #define STM32H7_PC1_FUNC_SAI4_D1 0x210b 453 #define STM32H7_PC1_FUNC_ETH_MDC 0x210c 454 #define STM32H7_PC1_FUNC_MDIOS_MDC 0x210d 455 #define STM32H7_PC1_FUNC_EVENTOUT 0x2110 456 #define STM32H7_PC1_FUNC_ANALOG 0x2111 457 458 #define STM32H7_PC2_FUNC_GPIO 0x2200 459 #define STM32H7_PC2_FUNC_DFSDM_CKIN1 0x2204 460 #define STM32H7_PC2_FUNC_SPI2_MISO_I2S2_SDI 0x2206 461 #define STM32H7_PC2_FUNC_DFSDM_CKOUT 0x2207 462 #define STM32H7_PC2_FUNC_OTG_HS_ULPI_DIR 0x220b 463 #define STM32H7_PC2_FUNC_ETH_MII_TXD2 0x220c 464 #define STM32H7_PC2_FUNC_FMC_SDNE0 0x220d 465 #define STM32H7_PC2_FUNC_EVENTOUT 0x2210 466 #define STM32H7_PC2_FUNC_ANALOG 0x2211 467 468 #define STM32H7_PC3_FUNC_GPIO 0x2300 469 #define STM32H7_PC3_FUNC_DFSDM_DATIN1 0x2304 470 #define STM32H7_PC3_FUNC_SPI2_MOSI_I2S2_SDO 0x2306 471 #define STM32H7_PC3_FUNC_OTG_HS_ULPI_NXT 0x230b 472 #define STM32H7_PC3_FUNC_ETH_MII_TX_CLK 0x230c 473 #define STM32H7_PC3_FUNC_FMC_SDCKE0 0x230d 474 #define STM32H7_PC3_FUNC_EVENTOUT 0x2310 475 #define STM32H7_PC3_FUNC_ANALOG 0x2311 476 477 #define STM32H7_PC4_FUNC_GPIO 0x2400 478 #define STM32H7_PC4_FUNC_DFSDM_CKIN2 0x2404 479 #define STM32H7_PC4_FUNC_I2S1_MCK 0x2406 480 #define STM32H7_PC4_FUNC_SPDIFRX_IN2 0x240a 481 #define STM32H7_PC4_FUNC_ETH_MII_RXD0_ETH_RMII_RXD0 0x240c 482 #define STM32H7_PC4_FUNC_FMC_SDNE0 0x240d 483 #define STM32H7_PC4_FUNC_EVENTOUT 0x2410 484 #define STM32H7_PC4_FUNC_ANALOG 0x2411 485 486 #define STM32H7_PC5_FUNC_GPIO 0x2500 487 #define STM32H7_PC5_FUNC_SAI1_D3 0x2503 488 #define STM32H7_PC5_FUNC_DFSDM_DATIN2 0x2504 489 #define STM32H7_PC5_FUNC_SPDIFRX_IN3 0x250a 490 #define STM32H7_PC5_FUNC_SAI4_D3 0x250b 491 #define STM32H7_PC5_FUNC_ETH_MII_RXD1_ETH_RMII_RXD1 0x250c 492 #define STM32H7_PC5_FUNC_FMC_SDCKE0 0x250d 493 #define STM32H7_PC5_FUNC_COMP_1_OUT 0x250e 494 #define STM32H7_PC5_FUNC_EVENTOUT 0x2510 495 #define STM32H7_PC5_FUNC_ANALOG 0x2511 496 497 #define STM32H7_PC6_FUNC_GPIO 0x2600 498 #define STM32H7_PC6_FUNC_HRTIM_CHA1 0x2602 499 #define STM32H7_PC6_FUNC_TIM3_CH1 0x2603 500 #define STM32H7_PC6_FUNC_TIM8_CH1 0x2604 501 #define STM32H7_PC6_FUNC_DFSDM_CKIN3 0x2605 502 #define STM32H7_PC6_FUNC_I2S2_MCK 0x2606 503 #define STM32H7_PC6_FUNC_USART6_TX 0x2608 504 #define STM32H7_PC6_FUNC_SDMMC1_D0DIR 0x2609 505 #define STM32H7_PC6_FUNC_FMC_NWAIT 0x260a 506 #define STM32H7_PC6_FUNC_SDMMC2_D6 0x260b 507 #define STM32H7_PC6_FUNC_SDMMC1_D6 0x260d 508 #define STM32H7_PC6_FUNC_DCMI_D0 0x260e 509 #define STM32H7_PC6_FUNC_LCD_HSYNC 0x260f 510 #define STM32H7_PC6_FUNC_EVENTOUT 0x2610 511 #define STM32H7_PC6_FUNC_ANALOG 0x2611 512 513 #define STM32H7_PC7_FUNC_GPIO 0x2700 514 #define STM32H7_PC7_FUNC_TRGIO 0x2701 515 #define STM32H7_PC7_FUNC_HRTIM_CHA2 0x2702 516 #define STM32H7_PC7_FUNC_TIM3_CH2 0x2703 517 #define STM32H7_PC7_FUNC_TIM8_CH2 0x2704 518 #define STM32H7_PC7_FUNC_DFSDM_DATIN3 0x2705 519 #define STM32H7_PC7_FUNC_I2S3_MCK 0x2707 520 #define STM32H7_PC7_FUNC_USART6_RX 0x2708 521 #define STM32H7_PC7_FUNC_SDMMC1_D123DIR 0x2709 522 #define STM32H7_PC7_FUNC_FMC_NE1 0x270a 523 #define STM32H7_PC7_FUNC_SDMMC2_D7 0x270b 524 #define STM32H7_PC7_FUNC_SWPMI_TX 0x270c 525 #define STM32H7_PC7_FUNC_SDMMC1_D7 0x270d 526 #define STM32H7_PC7_FUNC_DCMI_D1 0x270e 527 #define STM32H7_PC7_FUNC_LCD_G6 0x270f 528 #define STM32H7_PC7_FUNC_EVENTOUT 0x2710 529 #define STM32H7_PC7_FUNC_ANALOG 0x2711 530 531 #define STM32H7_PC8_FUNC_GPIO 0x2800 532 #define STM32H7_PC8_FUNC_TRACED1 0x2801 533 #define STM32H7_PC8_FUNC_HRTIM_CHB1 0x2802 534 #define STM32H7_PC8_FUNC_TIM3_CH3 0x2803 535 #define STM32H7_PC8_FUNC_TIM8_CH3 0x2804 536 #define STM32H7_PC8_FUNC_USART6_CK 0x2808 537 #define STM32H7_PC8_FUNC_UART5_RTS 0x2809 538 #define STM32H7_PC8_FUNC_FMC_NE2_FMC_NCE 0x280a 539 #define STM32H7_PC8_FUNC_SWPMI_RX 0x280c 540 #define STM32H7_PC8_FUNC_SDMMC1_D0 0x280d 541 #define STM32H7_PC8_FUNC_DCMI_D2 0x280e 542 #define STM32H7_PC8_FUNC_EVENTOUT 0x2810 543 #define STM32H7_PC8_FUNC_ANALOG 0x2811 544 545 #define STM32H7_PC9_FUNC_GPIO 0x2900 546 #define STM32H7_PC9_FUNC_MCO2 0x2901 547 #define STM32H7_PC9_FUNC_TIM3_CH4 0x2903 548 #define STM32H7_PC9_FUNC_TIM8_CH4 0x2904 549 #define STM32H7_PC9_FUNC_I2C3_SDA 0x2905 550 #define STM32H7_PC9_FUNC_I2S_CKIN 0x2906 551 #define STM32H7_PC9_FUNC_UART5_CTS 0x2909 552 #define STM32H7_PC9_FUNC_QUADSPI_BK1_IO0 0x290a 553 #define STM32H7_PC9_FUNC_LCD_G3 0x290b 554 #define STM32H7_PC9_FUNC_SWPMI_SUSPEND 0x290c 555 #define STM32H7_PC9_FUNC_SDMMC1_D1 0x290d 556 #define STM32H7_PC9_FUNC_DCMI_D3 0x290e 557 #define STM32H7_PC9_FUNC_LCD_B2 0x290f 558 #define STM32H7_PC9_FUNC_EVENTOUT 0x2910 559 #define STM32H7_PC9_FUNC_ANALOG 0x2911 560 561 #define STM32H7_PC10_FUNC_GPIO 0x2a00 562 #define STM32H7_PC10_FUNC_HRTIM_EEV1 0x2a03 563 #define STM32H7_PC10_FUNC_DFSDM_CKIN5 0x2a04 564 #define STM32H7_PC10_FUNC_SPI3_SCK_I2S3_CK 0x2a07 565 #define STM32H7_PC10_FUNC_USART3_TX 0x2a08 566 #define STM32H7_PC10_FUNC_UART4_TX 0x2a09 567 #define STM32H7_PC10_FUNC_QUADSPI_BK1_IO1 0x2a0a 568 #define STM32H7_PC10_FUNC_SDMMC1_D2 0x2a0d 569 #define STM32H7_PC10_FUNC_DCMI_D8 0x2a0e 570 #define STM32H7_PC10_FUNC_LCD_R2 0x2a0f 571 #define STM32H7_PC10_FUNC_EVENTOUT 0x2a10 572 #define STM32H7_PC10_FUNC_ANALOG 0x2a11 573 574 #define STM32H7_PC11_FUNC_GPIO 0x2b00 575 #define STM32H7_PC11_FUNC_HRTIM_FLT2 0x2b03 576 #define STM32H7_PC11_FUNC_DFSDM_DATIN5 0x2b04 577 #define STM32H7_PC11_FUNC_SPI3_MISO_I2S3_SDI 0x2b07 578 #define STM32H7_PC11_FUNC_USART3_RX 0x2b08 579 #define STM32H7_PC11_FUNC_UART4_RX 0x2b09 580 #define STM32H7_PC11_FUNC_QUADSPI_BK2_NCS 0x2b0a 581 #define STM32H7_PC11_FUNC_SDMMC1_D3 0x2b0d 582 #define STM32H7_PC11_FUNC_DCMI_D4 0x2b0e 583 #define STM32H7_PC11_FUNC_EVENTOUT 0x2b10 584 #define STM32H7_PC11_FUNC_ANALOG 0x2b11 585 586 #define STM32H7_PC12_FUNC_GPIO 0x2c00 587 #define STM32H7_PC12_FUNC_TRACED3 0x2c01 588 #define STM32H7_PC12_FUNC_HRTIM_EEV2 0x2c03 589 #define STM32H7_PC12_FUNC_SPI3_MOSI_I2S3_SDO 0x2c07 590 #define STM32H7_PC12_FUNC_USART3_CK 0x2c08 591 #define STM32H7_PC12_FUNC_UART5_TX 0x2c09 592 #define STM32H7_PC12_FUNC_SDMMC1_CK 0x2c0d 593 #define STM32H7_PC12_FUNC_DCMI_D9 0x2c0e 594 #define STM32H7_PC12_FUNC_EVENTOUT 0x2c10 595 #define STM32H7_PC12_FUNC_ANALOG 0x2c11 596 597 #define STM32H7_PC13_FUNC_GPIO 0x2d00 598 #define STM32H7_PC13_FUNC_EVENTOUT 0x2d10 599 #define STM32H7_PC13_FUNC_ANALOG 0x2d11 600 601 #define STM32H7_PC14_FUNC_GPIO 0x2e00 602 #define STM32H7_PC14_FUNC_EVENTOUT 0x2e10 603 #define STM32H7_PC14_FUNC_ANALOG 0x2e11 604 605 #define STM32H7_PC15_FUNC_GPIO 0x2f00 606 #define STM32H7_PC15_FUNC_EVENTOUT 0x2f10 607 #define STM32H7_PC15_FUNC_ANALOG 0x2f11 608 609 #define STM32H7_PD0_FUNC_GPIO 0x3000 610 #define STM32H7_PD0_FUNC_DFSDM_CKIN6 0x3004 611 #define STM32H7_PD0_FUNC_SAI3_SCK_A 0x3007 612 #define STM32H7_PD0_FUNC_UART4_RX 0x3009 613 #define STM32H7_PD0_FUNC_CAN1_RX 0x300a 614 #define STM32H7_PD0_FUNC_FMC_D2_FMC_DA2 0x300d 615 #define STM32H7_PD0_FUNC_EVENTOUT 0x3010 616 #define STM32H7_PD0_FUNC_ANALOG 0x3011 617 618 #define STM32H7_PD1_FUNC_GPIO 0x3100 619 #define STM32H7_PD1_FUNC_DFSDM_DATIN6 0x3104 620 #define STM32H7_PD1_FUNC_SAI3_SD_A 0x3107 621 #define STM32H7_PD1_FUNC_UART4_TX 0x3109 622 #define STM32H7_PD1_FUNC_CAN1_TX 0x310a 623 #define STM32H7_PD1_FUNC_FMC_D3_FMC_DA3 0x310d 624 #define STM32H7_PD1_FUNC_EVENTOUT 0x3110 625 #define STM32H7_PD1_FUNC_ANALOG 0x3111 626 627 #define STM32H7_PD2_FUNC_GPIO 0x3200 628 #define STM32H7_PD2_FUNC_TRACED2 0x3201 629 #define STM32H7_PD2_FUNC_TIM3_ETR 0x3203 630 #define STM32H7_PD2_FUNC_UART5_RX 0x3209 631 #define STM32H7_PD2_FUNC_SDMMC1_CMD 0x320d 632 #define STM32H7_PD2_FUNC_DCMI_D11 0x320e 633 #define STM32H7_PD2_FUNC_EVENTOUT 0x3210 634 #define STM32H7_PD2_FUNC_ANALOG 0x3211 635 636 #define STM32H7_PD3_FUNC_GPIO 0x3300 637 #define STM32H7_PD3_FUNC_DFSDM_CKOUT 0x3304 638 #define STM32H7_PD3_FUNC_SPI2_SCK_I2S2_CK 0x3306 639 #define STM32H7_PD3_FUNC_USART2_CTS_NSS 0x3308 640 #define STM32H7_PD3_FUNC_FMC_CLK 0x330d 641 #define STM32H7_PD3_FUNC_DCMI_D5 0x330e 642 #define STM32H7_PD3_FUNC_LCD_G7 0x330f 643 #define STM32H7_PD3_FUNC_EVENTOUT 0x3310 644 #define STM32H7_PD3_FUNC_ANALOG 0x3311 645 646 #define STM32H7_PD4_FUNC_GPIO 0x3400 647 #define STM32H7_PD4_FUNC_HRTIM_FLT3 0x3403 648 #define STM32H7_PD4_FUNC_SAI3_FS_A 0x3407 649 #define STM32H7_PD4_FUNC_USART2_RTS 0x3408 650 #define STM32H7_PD4_FUNC_CAN1_RXFD 0x340a 651 #define STM32H7_PD4_FUNC_FMC_NOE 0x340d 652 #define STM32H7_PD4_FUNC_EVENTOUT 0x3410 653 #define STM32H7_PD4_FUNC_ANALOG 0x3411 654 655 #define STM32H7_PD5_FUNC_GPIO 0x3500 656 #define STM32H7_PD5_FUNC_HRTIM_EEV3 0x3503 657 #define STM32H7_PD5_FUNC_USART2_TX 0x3508 658 #define STM32H7_PD5_FUNC_CAN1_TXFD 0x350a 659 #define STM32H7_PD5_FUNC_FMC_NWE 0x350d 660 #define STM32H7_PD5_FUNC_EVENTOUT 0x3510 661 #define STM32H7_PD5_FUNC_ANALOG 0x3511 662 663 #define STM32H7_PD6_FUNC_GPIO 0x3600 664 #define STM32H7_PD6_FUNC_SAI1_D1 0x3603 665 #define STM32H7_PD6_FUNC_DFSDM_CKIN4 0x3604 666 #define STM32H7_PD6_FUNC_DFSDM_DATIN1 0x3605 667 #define STM32H7_PD6_FUNC_SPI3_MOSI_I2S3_SDO 0x3606 668 #define STM32H7_PD6_FUNC_SAI1_SD_A 0x3607 669 #define STM32H7_PD6_FUNC_USART2_RX 0x3608 670 #define STM32H7_PD6_FUNC_SAI4_SD_A 0x3609 671 #define STM32H7_PD6_FUNC_CAN2_RXFD 0x360a 672 #define STM32H7_PD6_FUNC_SAI4_D1 0x360b 673 #define STM32H7_PD6_FUNC_SDMMC2_CK 0x360c 674 #define STM32H7_PD6_FUNC_FMC_NWAIT 0x360d 675 #define STM32H7_PD6_FUNC_DCMI_D10 0x360e 676 #define STM32H7_PD6_FUNC_LCD_B2 0x360f 677 #define STM32H7_PD6_FUNC_EVENTOUT 0x3610 678 #define STM32H7_PD6_FUNC_ANALOG 0x3611 679 680 #define STM32H7_PD7_FUNC_GPIO 0x3700 681 #define STM32H7_PD7_FUNC_DFSDM_DATIN4 0x3704 682 #define STM32H7_PD7_FUNC_SPI1_MOSI_I2S1_SDO 0x3706 683 #define STM32H7_PD7_FUNC_DFSDM_CKIN1 0x3707 684 #define STM32H7_PD7_FUNC_USART2_CK 0x3708 685 #define STM32H7_PD7_FUNC_SPDIFRX_IN0 0x370a 686 #define STM32H7_PD7_FUNC_SDMMC2_CMD 0x370c 687 #define STM32H7_PD7_FUNC_FMC_NE1 0x370d 688 #define STM32H7_PD7_FUNC_EVENTOUT 0x3710 689 #define STM32H7_PD7_FUNC_ANALOG 0x3711 690 691 #define STM32H7_PD8_FUNC_GPIO 0x3800 692 #define STM32H7_PD8_FUNC_DFSDM_CKIN3 0x3804 693 #define STM32H7_PD8_FUNC_SAI3_SCK_B 0x3807 694 #define STM32H7_PD8_FUNC_USART3_TX 0x3808 695 #define STM32H7_PD8_FUNC_SPDIFRX_IN1 0x380a 696 #define STM32H7_PD8_FUNC_FMC_D13_FMC_DA13 0x380d 697 #define STM32H7_PD8_FUNC_EVENTOUT 0x3810 698 #define STM32H7_PD8_FUNC_ANALOG 0x3811 699 700 #define STM32H7_PD9_FUNC_GPIO 0x3900 701 #define STM32H7_PD9_FUNC_DFSDM_DATIN3 0x3904 702 #define STM32H7_PD9_FUNC_SAI3_SD_B 0x3907 703 #define STM32H7_PD9_FUNC_USART3_RX 0x3908 704 #define STM32H7_PD9_FUNC_CAN2_RXFD 0x390a 705 #define STM32H7_PD9_FUNC_FMC_D14_FMC_DA14 0x390d 706 #define STM32H7_PD9_FUNC_EVENTOUT 0x3910 707 #define STM32H7_PD9_FUNC_ANALOG 0x3911 708 709 #define STM32H7_PD10_FUNC_GPIO 0x3a00 710 #define STM32H7_PD10_FUNC_DFSDM_CKOUT 0x3a04 711 #define STM32H7_PD10_FUNC_SAI3_FS_B 0x3a07 712 #define STM32H7_PD10_FUNC_USART3_CK 0x3a08 713 #define STM32H7_PD10_FUNC_CAN2_TXFD 0x3a0a 714 #define STM32H7_PD10_FUNC_FMC_D15_FMC_DA15 0x3a0d 715 #define STM32H7_PD10_FUNC_LCD_B3 0x3a0f 716 #define STM32H7_PD10_FUNC_EVENTOUT 0x3a10 717 #define STM32H7_PD10_FUNC_ANALOG 0x3a11 718 719 #define STM32H7_PD11_FUNC_GPIO 0x3b00 720 #define STM32H7_PD11_FUNC_LPTIM2_IN2 0x3b04 721 #define STM32H7_PD11_FUNC_I2C4_SMBA 0x3b05 722 #define STM32H7_PD11_FUNC_USART3_CTS_NSS 0x3b08 723 #define STM32H7_PD11_FUNC_QUADSPI_BK1_IO0 0x3b0a 724 #define STM32H7_PD11_FUNC_SAI2_SD_A 0x3b0b 725 #define STM32H7_PD11_FUNC_FMC_A16 0x3b0d 726 #define STM32H7_PD11_FUNC_EVENTOUT 0x3b10 727 #define STM32H7_PD11_FUNC_ANALOG 0x3b11 728 729 #define STM32H7_PD12_FUNC_GPIO 0x3c00 730 #define STM32H7_PD12_FUNC_LPTIM1_IN1 0x3c02 731 #define STM32H7_PD12_FUNC_TIM4_CH1 0x3c03 732 #define STM32H7_PD12_FUNC_LPTIM2_IN1 0x3c04 733 #define STM32H7_PD12_FUNC_I2C4_SCL 0x3c05 734 #define STM32H7_PD12_FUNC_USART3_RTS 0x3c08 735 #define STM32H7_PD12_FUNC_QUADSPI_BK1_IO1 0x3c0a 736 #define STM32H7_PD12_FUNC_SAI2_FS_A 0x3c0b 737 #define STM32H7_PD12_FUNC_FMC_A17 0x3c0d 738 #define STM32H7_PD12_FUNC_EVENTOUT 0x3c10 739 #define STM32H7_PD12_FUNC_ANALOG 0x3c11 740 741 #define STM32H7_PD13_FUNC_GPIO 0x3d00 742 #define STM32H7_PD13_FUNC_LPTIM1_OUT 0x3d02 743 #define STM32H7_PD13_FUNC_TIM4_CH2 0x3d03 744 #define STM32H7_PD13_FUNC_I2C4_SDA 0x3d05 745 #define STM32H7_PD13_FUNC_QUADSPI_BK1_IO3 0x3d0a 746 #define STM32H7_PD13_FUNC_SAI2_SCK_A 0x3d0b 747 #define STM32H7_PD13_FUNC_FMC_A18 0x3d0d 748 #define STM32H7_PD13_FUNC_EVENTOUT 0x3d10 749 #define STM32H7_PD13_FUNC_ANALOG 0x3d11 750 751 #define STM32H7_PD14_FUNC_GPIO 0x3e00 752 #define STM32H7_PD14_FUNC_TIM4_CH3 0x3e03 753 #define STM32H7_PD14_FUNC_SAI3_MCLK_B 0x3e07 754 #define STM32H7_PD14_FUNC_UART8_CTS 0x3e09 755 #define STM32H7_PD14_FUNC_FMC_D0_FMC_DA0 0x3e0d 756 #define STM32H7_PD14_FUNC_EVENTOUT 0x3e10 757 #define STM32H7_PD14_FUNC_ANALOG 0x3e11 758 759 #define STM32H7_PD15_FUNC_GPIO 0x3f00 760 #define STM32H7_PD15_FUNC_TIM4_CH4 0x3f03 761 #define STM32H7_PD15_FUNC_SAI3_MCLK_A 0x3f07 762 #define STM32H7_PD15_FUNC_UART8_RTS 0x3f09 763 #define STM32H7_PD15_FUNC_FMC_D1_FMC_DA1 0x3f0d 764 #define STM32H7_PD15_FUNC_EVENTOUT 0x3f10 765 #define STM32H7_PD15_FUNC_ANALOG 0x3f11 766 767 #define STM32H7_PE0_FUNC_GPIO 0x4000 768 #define STM32H7_PE0_FUNC_LPTIM1_ETR 0x4002 769 #define STM32H7_PE0_FUNC_TIM4_ETR 0x4003 770 #define STM32H7_PE0_FUNC_HRTIM_SCIN 0x4004 771 #define STM32H7_PE0_FUNC_LPTIM2_ETR 0x4005 772 #define STM32H7_PE0_FUNC_UART8_RX 0x4009 773 #define STM32H7_PE0_FUNC_CAN1_RXFD 0x400a 774 #define STM32H7_PE0_FUNC_SAI2_MCK_A 0x400b 775 #define STM32H7_PE0_FUNC_FMC_NBL0 0x400d 776 #define STM32H7_PE0_FUNC_DCMI_D2 0x400e 777 #define STM32H7_PE0_FUNC_EVENTOUT 0x4010 778 #define STM32H7_PE0_FUNC_ANALOG 0x4011 779 780 #define STM32H7_PE1_FUNC_GPIO 0x4100 781 #define STM32H7_PE1_FUNC_LPTIM1_IN2 0x4102 782 #define STM32H7_PE1_FUNC_HRTIM_SCOUT 0x4104 783 #define STM32H7_PE1_FUNC_UART8_TX 0x4109 784 #define STM32H7_PE1_FUNC_CAN1_TXFD 0x410a 785 #define STM32H7_PE1_FUNC_FMC_NBL1 0x410d 786 #define STM32H7_PE1_FUNC_DCMI_D3 0x410e 787 #define STM32H7_PE1_FUNC_EVENTOUT 0x4110 788 #define STM32H7_PE1_FUNC_ANALOG 0x4111 789 790 #define STM32H7_PE2_FUNC_GPIO 0x4200 791 #define STM32H7_PE2_FUNC_TRACECLK 0x4201 792 #define STM32H7_PE2_FUNC_SAI1_CK1 0x4203 793 #define STM32H7_PE2_FUNC_SPI4_SCK 0x4206 794 #define STM32H7_PE2_FUNC_SAI1_MCLK_A 0x4207 795 #define STM32H7_PE2_FUNC_SAI4_MCLK_A 0x4209 796 #define STM32H7_PE2_FUNC_QUADSPI_BK1_IO2 0x420a 797 #define STM32H7_PE2_FUNC_SAI4_CK1 0x420b 798 #define STM32H7_PE2_FUNC_ETH_MII_TXD3 0x420c 799 #define STM32H7_PE2_FUNC_FMC_A23 0x420d 800 #define STM32H7_PE2_FUNC_EVENTOUT 0x4210 801 #define STM32H7_PE2_FUNC_ANALOG 0x4211 802 803 #define STM32H7_PE3_FUNC_GPIO 0x4300 804 #define STM32H7_PE3_FUNC_TRACED0 0x4301 805 #define STM32H7_PE3_FUNC_TIM15_BKIN 0x4305 806 #define STM32H7_PE3_FUNC_SAI1_SD_B 0x4307 807 #define STM32H7_PE3_FUNC_SAI4_SD_B 0x4309 808 #define STM32H7_PE3_FUNC_FMC_A19 0x430d 809 #define STM32H7_PE3_FUNC_EVENTOUT 0x4310 810 #define STM32H7_PE3_FUNC_ANALOG 0x4311 811 812 #define STM32H7_PE4_FUNC_GPIO 0x4400 813 #define STM32H7_PE4_FUNC_TRACED1 0x4401 814 #define STM32H7_PE4_FUNC_SAI1_D2 0x4403 815 #define STM32H7_PE4_FUNC_DFSDM_DATIN3 0x4404 816 #define STM32H7_PE4_FUNC_TIM15_CH1N 0x4405 817 #define STM32H7_PE4_FUNC_SPI4_NSS 0x4406 818 #define STM32H7_PE4_FUNC_SAI1_FS_A 0x4407 819 #define STM32H7_PE4_FUNC_SAI4_FS_A 0x4409 820 #define STM32H7_PE4_FUNC_SAI4_D2 0x440b 821 #define STM32H7_PE4_FUNC_FMC_A20 0x440d 822 #define STM32H7_PE4_FUNC_DCMI_D4 0x440e 823 #define STM32H7_PE4_FUNC_LCD_B0 0x440f 824 #define STM32H7_PE4_FUNC_EVENTOUT 0x4410 825 #define STM32H7_PE4_FUNC_ANALOG 0x4411 826 827 #define STM32H7_PE5_FUNC_GPIO 0x4500 828 #define STM32H7_PE5_FUNC_TRACED2 0x4501 829 #define STM32H7_PE5_FUNC_SAI1_CK2 0x4503 830 #define STM32H7_PE5_FUNC_DFSDM_CKIN3 0x4504 831 #define STM32H7_PE5_FUNC_TIM15_CH1 0x4505 832 #define STM32H7_PE5_FUNC_SPI4_MISO 0x4506 833 #define STM32H7_PE5_FUNC_SAI1_SCK_A 0x4507 834 #define STM32H7_PE5_FUNC_SAI4_SCK_A 0x4509 835 #define STM32H7_PE5_FUNC_SAI4_CK2 0x450b 836 #define STM32H7_PE5_FUNC_FMC_A21 0x450d 837 #define STM32H7_PE5_FUNC_DCMI_D6 0x450e 838 #define STM32H7_PE5_FUNC_LCD_G0 0x450f 839 #define STM32H7_PE5_FUNC_EVENTOUT 0x4510 840 #define STM32H7_PE5_FUNC_ANALOG 0x4511 841 842 #define STM32H7_PE6_FUNC_GPIO 0x4600 843 #define STM32H7_PE6_FUNC_TRACED3 0x4601 844 #define STM32H7_PE6_FUNC_TIM1_BKIN2 0x4602 845 #define STM32H7_PE6_FUNC_SAI1_D1 0x4603 846 #define STM32H7_PE6_FUNC_TIM15_CH2 0x4605 847 #define STM32H7_PE6_FUNC_SPI4_MOSI 0x4606 848 #define STM32H7_PE6_FUNC_SAI1_SD_A 0x4607 849 #define STM32H7_PE6_FUNC_SAI4_SD_A 0x4609 850 #define STM32H7_PE6_FUNC_SAI4_D1 0x460a 851 #define STM32H7_PE6_FUNC_SAI2_MCK_B 0x460b 852 #define STM32H7_PE6_FUNC_TIM1_BKIN2_COMP12 0x460c 853 #define STM32H7_PE6_FUNC_FMC_A22 0x460d 854 #define STM32H7_PE6_FUNC_DCMI_D7 0x460e 855 #define STM32H7_PE6_FUNC_LCD_G1 0x460f 856 #define STM32H7_PE6_FUNC_EVENTOUT 0x4610 857 #define STM32H7_PE6_FUNC_ANALOG 0x4611 858 859 #define STM32H7_PE7_FUNC_GPIO 0x4700 860 #define STM32H7_PE7_FUNC_TIM1_ETR 0x4702 861 #define STM32H7_PE7_FUNC_DFSDM_DATIN2 0x4704 862 #define STM32H7_PE7_FUNC_UART7_RX 0x4708 863 #define STM32H7_PE7_FUNC_QUADSPI_BK2_IO0 0x470b 864 #define STM32H7_PE7_FUNC_FMC_D4_FMC_DA4 0x470d 865 #define STM32H7_PE7_FUNC_EVENTOUT 0x4710 866 #define STM32H7_PE7_FUNC_ANALOG 0x4711 867 868 #define STM32H7_PE8_FUNC_GPIO 0x4800 869 #define STM32H7_PE8_FUNC_TIM1_CH1N 0x4802 870 #define STM32H7_PE8_FUNC_DFSDM_CKIN2 0x4804 871 #define STM32H7_PE8_FUNC_UART7_TX 0x4808 872 #define STM32H7_PE8_FUNC_QUADSPI_BK2_IO1 0x480b 873 #define STM32H7_PE8_FUNC_FMC_D5_FMC_DA5 0x480d 874 #define STM32H7_PE8_FUNC_COMP_2_OUT 0x480e 875 #define STM32H7_PE8_FUNC_EVENTOUT 0x4810 876 #define STM32H7_PE8_FUNC_ANALOG 0x4811 877 878 #define STM32H7_PE9_FUNC_GPIO 0x4900 879 #define STM32H7_PE9_FUNC_TIM1_CH1 0x4902 880 #define STM32H7_PE9_FUNC_DFSDM_CKOUT 0x4904 881 #define STM32H7_PE9_FUNC_UART7_RTS 0x4908 882 #define STM32H7_PE9_FUNC_QUADSPI_BK2_IO2 0x490b 883 #define STM32H7_PE9_FUNC_FMC_D6_FMC_DA6 0x490d 884 #define STM32H7_PE9_FUNC_EVENTOUT 0x4910 885 #define STM32H7_PE9_FUNC_ANALOG 0x4911 886 887 #define STM32H7_PE10_FUNC_GPIO 0x4a00 888 #define STM32H7_PE10_FUNC_TIM1_CH2N 0x4a02 889 #define STM32H7_PE10_FUNC_DFSDM_DATIN4 0x4a04 890 #define STM32H7_PE10_FUNC_UART7_CTS 0x4a08 891 #define STM32H7_PE10_FUNC_QUADSPI_BK2_IO3 0x4a0b 892 #define STM32H7_PE10_FUNC_FMC_D7_FMC_DA7 0x4a0d 893 #define STM32H7_PE10_FUNC_EVENTOUT 0x4a10 894 #define STM32H7_PE10_FUNC_ANALOG 0x4a11 895 896 #define STM32H7_PE11_FUNC_GPIO 0x4b00 897 #define STM32H7_PE11_FUNC_TIM1_CH2 0x4b02 898 #define STM32H7_PE11_FUNC_DFSDM_CKIN4 0x4b04 899 #define STM32H7_PE11_FUNC_SPI4_NSS 0x4b06 900 #define STM32H7_PE11_FUNC_SAI2_SD_B 0x4b0b 901 #define STM32H7_PE11_FUNC_FMC_D8_FMC_DA8 0x4b0d 902 #define STM32H7_PE11_FUNC_LCD_G3 0x4b0f 903 #define STM32H7_PE11_FUNC_EVENTOUT 0x4b10 904 #define STM32H7_PE11_FUNC_ANALOG 0x4b11 905 906 #define STM32H7_PE12_FUNC_GPIO 0x4c00 907 #define STM32H7_PE12_FUNC_TIM1_CH3N 0x4c02 908 #define STM32H7_PE12_FUNC_DFSDM_DATIN5 0x4c04 909 #define STM32H7_PE12_FUNC_SPI4_SCK 0x4c06 910 #define STM32H7_PE12_FUNC_SAI2_SCK_B 0x4c0b 911 #define STM32H7_PE12_FUNC_FMC_D9_FMC_DA9 0x4c0d 912 #define STM32H7_PE12_FUNC_COMP_1_OUT 0x4c0e 913 #define STM32H7_PE12_FUNC_LCD_B4 0x4c0f 914 #define STM32H7_PE12_FUNC_EVENTOUT 0x4c10 915 #define STM32H7_PE12_FUNC_ANALOG 0x4c11 916 917 #define STM32H7_PE13_FUNC_GPIO 0x4d00 918 #define STM32H7_PE13_FUNC_TIM1_CH3 0x4d02 919 #define STM32H7_PE13_FUNC_DFSDM_CKIN5 0x4d04 920 #define STM32H7_PE13_FUNC_SPI4_MISO 0x4d06 921 #define STM32H7_PE13_FUNC_SAI2_FS_B 0x4d0b 922 #define STM32H7_PE13_FUNC_FMC_D10_FMC_DA10 0x4d0d 923 #define STM32H7_PE13_FUNC_COMP_2_OUT 0x4d0e 924 #define STM32H7_PE13_FUNC_LCD_DE 0x4d0f 925 #define STM32H7_PE13_FUNC_EVENTOUT 0x4d10 926 #define STM32H7_PE13_FUNC_ANALOG 0x4d11 927 928 #define STM32H7_PE14_FUNC_GPIO 0x4e00 929 #define STM32H7_PE14_FUNC_TIM1_CH4 0x4e02 930 #define STM32H7_PE14_FUNC_SPI4_MOSI 0x4e06 931 #define STM32H7_PE14_FUNC_SAI2_MCK_B 0x4e0b 932 #define STM32H7_PE14_FUNC_FMC_D11_FMC_DA11 0x4e0d 933 #define STM32H7_PE14_FUNC_LCD_CLK 0x4e0f 934 #define STM32H7_PE14_FUNC_EVENTOUT 0x4e10 935 #define STM32H7_PE14_FUNC_ANALOG 0x4e11 936 937 #define STM32H7_PE15_FUNC_GPIO 0x4f00 938 #define STM32H7_PE15_FUNC_TIM1_BKIN 0x4f02 939 #define STM32H7_PE15_FUNC_HDMI__TIM1_BKIN 0x4f06 940 #define STM32H7_PE15_FUNC_FMC_D12_FMC_DA12 0x4f0d 941 #define STM32H7_PE15_FUNC_TIM1_BKIN_COMP12 0x4f0e 942 #define STM32H7_PE15_FUNC_LCD_R7 0x4f0f 943 #define STM32H7_PE15_FUNC_EVENTOUT 0x4f10 944 #define STM32H7_PE15_FUNC_ANALOG 0x4f11 945 946 #define STM32H7_PF0_FUNC_GPIO 0x5000 947 #define STM32H7_PF0_FUNC_I2C2_SDA 0x5005 948 #define STM32H7_PF0_FUNC_FMC_A0 0x500d 949 #define STM32H7_PF0_FUNC_EVENTOUT 0x5010 950 #define STM32H7_PF0_FUNC_ANALOG 0x5011 951 952 #define STM32H7_PF1_FUNC_GPIO 0x5100 953 #define STM32H7_PF1_FUNC_I2C2_SCL 0x5105 954 #define STM32H7_PF1_FUNC_FMC_A1 0x510d 955 #define STM32H7_PF1_FUNC_EVENTOUT 0x5110 956 #define STM32H7_PF1_FUNC_ANALOG 0x5111 957 958 #define STM32H7_PF2_FUNC_GPIO 0x5200 959 #define STM32H7_PF2_FUNC_I2C2_SMBA 0x5205 960 #define STM32H7_PF2_FUNC_FMC_A2 0x520d 961 #define STM32H7_PF2_FUNC_EVENTOUT 0x5210 962 #define STM32H7_PF2_FUNC_ANALOG 0x5211 963 964 #define STM32H7_PF3_FUNC_GPIO 0x5300 965 #define STM32H7_PF3_FUNC_FMC_A3 0x530d 966 #define STM32H7_PF3_FUNC_EVENTOUT 0x5310 967 #define STM32H7_PF3_FUNC_ANALOG 0x5311 968 969 #define STM32H7_PF4_FUNC_GPIO 0x5400 970 #define STM32H7_PF4_FUNC_FMC_A4 0x540d 971 #define STM32H7_PF4_FUNC_EVENTOUT 0x5410 972 #define STM32H7_PF4_FUNC_ANALOG 0x5411 973 974 #define STM32H7_PF5_FUNC_GPIO 0x5500 975 #define STM32H7_PF5_FUNC_FMC_A5 0x550d 976 #define STM32H7_PF5_FUNC_EVENTOUT 0x5510 977 #define STM32H7_PF5_FUNC_ANALOG 0x5511 978 979 #define STM32H7_PF6_FUNC_GPIO 0x5600 980 #define STM32H7_PF6_FUNC_TIM16_CH1 0x5602 981 #define STM32H7_PF6_FUNC_SPI5_NSS 0x5606 982 #define STM32H7_PF6_FUNC_SAI1_SD_B 0x5607 983 #define STM32H7_PF6_FUNC_UART7_RX 0x5608 984 #define STM32H7_PF6_FUNC_SAI4_SD_B 0x5609 985 #define STM32H7_PF6_FUNC_QUADSPI_BK1_IO3 0x560a 986 #define STM32H7_PF6_FUNC_EVENTOUT 0x5610 987 #define STM32H7_PF6_FUNC_ANALOG 0x5611 988 989 #define STM32H7_PF7_FUNC_GPIO 0x5700 990 #define STM32H7_PF7_FUNC_TIM17_CH1 0x5702 991 #define STM32H7_PF7_FUNC_SPI5_SCK 0x5706 992 #define STM32H7_PF7_FUNC_SAI1_MCLK_B 0x5707 993 #define STM32H7_PF7_FUNC_UART7_TX 0x5708 994 #define STM32H7_PF7_FUNC_SAI4_MCLK_B 0x5709 995 #define STM32H7_PF7_FUNC_QUADSPI_BK1_IO2 0x570a 996 #define STM32H7_PF7_FUNC_EVENTOUT 0x5710 997 #define STM32H7_PF7_FUNC_ANALOG 0x5711 998 999 #define STM32H7_PF8_FUNC_GPIO 0x5800 1000 #define STM32H7_PF8_FUNC_TIM16_CH1N 0x5802 1001 #define STM32H7_PF8_FUNC_SPI5_MISO 0x5806 1002 #define STM32H7_PF8_FUNC_SAI1_SCK_B 0x5807 1003 #define STM32H7_PF8_FUNC_UART7_RTS 0x5808 1004 #define STM32H7_PF8_FUNC_SAI4_SCK_B 0x5809 1005 #define STM32H7_PF8_FUNC_TIM13_CH1 0x580a 1006 #define STM32H7_PF8_FUNC_QUADSPI_BK1_IO0 0x580b 1007 #define STM32H7_PF8_FUNC_EVENTOUT 0x5810 1008 #define STM32H7_PF8_FUNC_ANALOG 0x5811 1009 1010 #define STM32H7_PF9_FUNC_GPIO 0x5900 1011 #define STM32H7_PF9_FUNC_TIM17_CH1N 0x5902 1012 #define STM32H7_PF9_FUNC_SPI5_MOSI 0x5906 1013 #define STM32H7_PF9_FUNC_SAI1_FS_B 0x5907 1014 #define STM32H7_PF9_FUNC_UART7_CTS 0x5908 1015 #define STM32H7_PF9_FUNC_SAI4_FS_B 0x5909 1016 #define STM32H7_PF9_FUNC_TIM14_CH1 0x590a 1017 #define STM32H7_PF9_FUNC_QUADSPI_BK1_IO1 0x590b 1018 #define STM32H7_PF9_FUNC_EVENTOUT 0x5910 1019 #define STM32H7_PF9_FUNC_ANALOG 0x5911 1020 1021 #define STM32H7_PF10_FUNC_GPIO 0x5a00 1022 #define STM32H7_PF10_FUNC_TIM16_BKIN 0x5a02 1023 #define STM32H7_PF10_FUNC_SAI1_D3 0x5a03 1024 #define STM32H7_PF10_FUNC_QUADSPI_CLK 0x5a0a 1025 #define STM32H7_PF10_FUNC_SAI4_D3 0x5a0b 1026 #define STM32H7_PF10_FUNC_DCMI_D11 0x5a0e 1027 #define STM32H7_PF10_FUNC_LCD_DE 0x5a0f 1028 #define STM32H7_PF10_FUNC_EVENTOUT 0x5a10 1029 #define STM32H7_PF10_FUNC_ANALOG 0x5a11 1030 1031 #define STM32H7_PF11_FUNC_GPIO 0x5b00 1032 #define STM32H7_PF11_FUNC_SPI5_MOSI 0x5b06 1033 #define STM32H7_PF11_FUNC_SAI2_SD_B 0x5b0b 1034 #define STM32H7_PF11_FUNC_FMC_SDNRAS 0x5b0d 1035 #define STM32H7_PF11_FUNC_DCMI_D12 0x5b0e 1036 #define STM32H7_PF11_FUNC_EVENTOUT 0x5b10 1037 #define STM32H7_PF11_FUNC_ANALOG 0x5b11 1038 1039 #define STM32H7_PF12_FUNC_GPIO 0x5c00 1040 #define STM32H7_PF12_FUNC_FMC_A6 0x5c0d 1041 #define STM32H7_PF12_FUNC_EVENTOUT 0x5c10 1042 #define STM32H7_PF12_FUNC_ANALOG 0x5c11 1043 1044 #define STM32H7_PF13_FUNC_GPIO 0x5d00 1045 #define STM32H7_PF13_FUNC_DFSDM_DATIN6 0x5d04 1046 #define STM32H7_PF13_FUNC_I2C4_SMBA 0x5d05 1047 #define STM32H7_PF13_FUNC_FMC_A7 0x5d0d 1048 #define STM32H7_PF13_FUNC_EVENTOUT 0x5d10 1049 #define STM32H7_PF13_FUNC_ANALOG 0x5d11 1050 1051 #define STM32H7_PF14_FUNC_GPIO 0x5e00 1052 #define STM32H7_PF14_FUNC_DFSDM_CKIN6 0x5e04 1053 #define STM32H7_PF14_FUNC_I2C4_SCL 0x5e05 1054 #define STM32H7_PF14_FUNC_FMC_A8 0x5e0d 1055 #define STM32H7_PF14_FUNC_EVENTOUT 0x5e10 1056 #define STM32H7_PF14_FUNC_ANALOG 0x5e11 1057 1058 #define STM32H7_PF15_FUNC_GPIO 0x5f00 1059 #define STM32H7_PF15_FUNC_I2C4_SDA 0x5f05 1060 #define STM32H7_PF15_FUNC_FMC_A9 0x5f0d 1061 #define STM32H7_PF15_FUNC_EVENTOUT 0x5f10 1062 #define STM32H7_PF15_FUNC_ANALOG 0x5f11 1063 1064 #define STM32H7_PG0_FUNC_GPIO 0x6000 1065 #define STM32H7_PG0_FUNC_FMC_A10 0x600d 1066 #define STM32H7_PG0_FUNC_EVENTOUT 0x6010 1067 #define STM32H7_PG0_FUNC_ANALOG 0x6011 1068 1069 #define STM32H7_PG1_FUNC_GPIO 0x6100 1070 #define STM32H7_PG1_FUNC_FMC_A11 0x610d 1071 #define STM32H7_PG1_FUNC_EVENTOUT 0x6110 1072 #define STM32H7_PG1_FUNC_ANALOG 0x6111 1073 1074 #define STM32H7_PG2_FUNC_GPIO 0x6200 1075 #define STM32H7_PG2_FUNC_TIM8_BKIN 0x6204 1076 #define STM32H7_PG2_FUNC_TIM8_BKIN_COMP12 0x620c 1077 #define STM32H7_PG2_FUNC_FMC_A12 0x620d 1078 #define STM32H7_PG2_FUNC_EVENTOUT 0x6210 1079 #define STM32H7_PG2_FUNC_ANALOG 0x6211 1080 1081 #define STM32H7_PG3_FUNC_GPIO 0x6300 1082 #define STM32H7_PG3_FUNC_TIM8_BKIN2 0x6304 1083 #define STM32H7_PG3_FUNC_TIM8_BKIN2_COMP12 0x630c 1084 #define STM32H7_PG3_FUNC_FMC_A13 0x630d 1085 #define STM32H7_PG3_FUNC_EVENTOUT 0x6310 1086 #define STM32H7_PG3_FUNC_ANALOG 0x6311 1087 1088 #define STM32H7_PG4_FUNC_GPIO 0x6400 1089 #define STM32H7_PG4_FUNC_TIM1_BKIN2 0x6402 1090 #define STM32H7_PG4_FUNC_TIM1_BKIN2_COMP12 0x640c 1091 #define STM32H7_PG4_FUNC_FMC_A14_FMC_BA0 0x640d 1092 #define STM32H7_PG4_FUNC_EVENTOUT 0x6410 1093 #define STM32H7_PG4_FUNC_ANALOG 0x6411 1094 1095 #define STM32H7_PG5_FUNC_GPIO 0x6500 1096 #define STM32H7_PG5_FUNC_TIM1_ETR 0x6502 1097 #define STM32H7_PG5_FUNC_FMC_A15_FMC_BA1 0x650d 1098 #define STM32H7_PG5_FUNC_EVENTOUT 0x6510 1099 #define STM32H7_PG5_FUNC_ANALOG 0x6511 1100 1101 #define STM32H7_PG6_FUNC_GPIO 0x6600 1102 #define STM32H7_PG6_FUNC_TIM17_BKIN 0x6602 1103 #define STM32H7_PG6_FUNC_HRTIM_CHE1 0x6603 1104 #define STM32H7_PG6_FUNC_QUADSPI_BK1_NCS 0x660b 1105 #define STM32H7_PG6_FUNC_FMC_NE3 0x660d 1106 #define STM32H7_PG6_FUNC_DCMI_D12 0x660e 1107 #define STM32H7_PG6_FUNC_LCD_R7 0x660f 1108 #define STM32H7_PG6_FUNC_EVENTOUT 0x6610 1109 #define STM32H7_PG6_FUNC_ANALOG 0x6611 1110 1111 #define STM32H7_PG7_FUNC_GPIO 0x6700 1112 #define STM32H7_PG7_FUNC_HRTIM_CHE2 0x6703 1113 #define STM32H7_PG7_FUNC_SAI1_MCLK_A 0x6707 1114 #define STM32H7_PG7_FUNC_USART6_CK 0x6708 1115 #define STM32H7_PG7_FUNC_FMC_INT 0x670d 1116 #define STM32H7_PG7_FUNC_DCMI_D13 0x670e 1117 #define STM32H7_PG7_FUNC_LCD_CLK 0x670f 1118 #define STM32H7_PG7_FUNC_EVENTOUT 0x6710 1119 #define STM32H7_PG7_FUNC_ANALOG 0x6711 1120 1121 #define STM32H7_PG8_FUNC_GPIO 0x6800 1122 #define STM32H7_PG8_FUNC_TIM8_ETR 0x6804 1123 #define STM32H7_PG8_FUNC_SPI6_NSS 0x6806 1124 #define STM32H7_PG8_FUNC_USART6_RTS 0x6808 1125 #define STM32H7_PG8_FUNC_SPDIFRX_IN2 0x6809 1126 #define STM32H7_PG8_FUNC_ETH_PPS_OUT 0x680c 1127 #define STM32H7_PG8_FUNC_FMC_SDCLK 0x680d 1128 #define STM32H7_PG8_FUNC_LCD_G7 0x680f 1129 #define STM32H7_PG8_FUNC_EVENTOUT 0x6810 1130 #define STM32H7_PG8_FUNC_ANALOG 0x6811 1131 1132 #define STM32H7_PG9_FUNC_GPIO 0x6900 1133 #define STM32H7_PG9_FUNC_SPI1_MISO_I2S1_SDI 0x6906 1134 #define STM32H7_PG9_FUNC_USART6_RX 0x6908 1135 #define STM32H7_PG9_FUNC_SPDIFRX_IN3 0x6909 1136 #define STM32H7_PG9_FUNC_QUADSPI_BK2_IO2 0x690a 1137 #define STM32H7_PG9_FUNC_SAI2_FS_B 0x690b 1138 #define STM32H7_PG9_FUNC_FMC_NE2_FMC_NCE 0x690d 1139 #define STM32H7_PG9_FUNC_DCMI_VSYNC 0x690e 1140 #define STM32H7_PG9_FUNC_EVENTOUT 0x6910 1141 #define STM32H7_PG9_FUNC_ANALOG 0x6911 1142 1143 #define STM32H7_PG10_FUNC_GPIO 0x6a00 1144 #define STM32H7_PG10_FUNC_HRTIM_FLT5 0x6a03 1145 #define STM32H7_PG10_FUNC_SPI1_NSS_I2S1_WS 0x6a06 1146 #define STM32H7_PG10_FUNC_LCD_G3 0x6a0a 1147 #define STM32H7_PG10_FUNC_SAI2_SD_B 0x6a0b 1148 #define STM32H7_PG10_FUNC_FMC_NE3 0x6a0d 1149 #define STM32H7_PG10_FUNC_DCMI_D2 0x6a0e 1150 #define STM32H7_PG10_FUNC_LCD_B2 0x6a0f 1151 #define STM32H7_PG10_FUNC_EVENTOUT 0x6a10 1152 #define STM32H7_PG10_FUNC_ANALOG 0x6a11 1153 1154 #define STM32H7_PG11_FUNC_GPIO 0x6b00 1155 #define STM32H7_PG11_FUNC_HRTIM_EEV4 0x6b03 1156 #define STM32H7_PG11_FUNC_SPI1_SCK_I2S1_CK 0x6b06 1157 #define STM32H7_PG11_FUNC_SPDIFRX_IN0 0x6b09 1158 #define STM32H7_PG11_FUNC_SDMMC2_D2 0x6b0b 1159 #define STM32H7_PG11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN 0x6b0c 1160 #define STM32H7_PG11_FUNC_DCMI_D3 0x6b0e 1161 #define STM32H7_PG11_FUNC_LCD_B3 0x6b0f 1162 #define STM32H7_PG11_FUNC_EVENTOUT 0x6b10 1163 #define STM32H7_PG11_FUNC_ANALOG 0x6b11 1164 1165 #define STM32H7_PG12_FUNC_GPIO 0x6c00 1166 #define STM32H7_PG12_FUNC_LPTIM1_IN1 0x6c02 1167 #define STM32H7_PG12_FUNC_HRTIM_EEV5 0x6c03 1168 #define STM32H7_PG12_FUNC_SPI6_MISO 0x6c06 1169 #define STM32H7_PG12_FUNC_USART6_RTS 0x6c08 1170 #define STM32H7_PG12_FUNC_SPDIFRX_IN1 0x6c09 1171 #define STM32H7_PG12_FUNC_LCD_B4 0x6c0a 1172 #define STM32H7_PG12_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1 0x6c0c 1173 #define STM32H7_PG12_FUNC_FMC_NE4 0x6c0d 1174 #define STM32H7_PG12_FUNC_LCD_B1 0x6c0f 1175 #define STM32H7_PG12_FUNC_EVENTOUT 0x6c10 1176 #define STM32H7_PG12_FUNC_ANALOG 0x6c11 1177 1178 #define STM32H7_PG13_FUNC_GPIO 0x6d00 1179 #define STM32H7_PG13_FUNC_TRACED0 0x6d01 1180 #define STM32H7_PG13_FUNC_LPTIM1_OUT 0x6d02 1181 #define STM32H7_PG13_FUNC_HRTIM_EEV10 0x6d03 1182 #define STM32H7_PG13_FUNC_SPI6_SCK 0x6d06 1183 #define STM32H7_PG13_FUNC_USART6_CTS_NSS 0x6d08 1184 #define STM32H7_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0 0x6d0c 1185 #define STM32H7_PG13_FUNC_FMC_A24 0x6d0d 1186 #define STM32H7_PG13_FUNC_LCD_R0 0x6d0f 1187 #define STM32H7_PG13_FUNC_EVENTOUT 0x6d10 1188 #define STM32H7_PG13_FUNC_ANALOG 0x6d11 1189 1190 #define STM32H7_PG14_FUNC_GPIO 0x6e00 1191 #define STM32H7_PG14_FUNC_TRACED1 0x6e01 1192 #define STM32H7_PG14_FUNC_LPTIM1_ETR 0x6e02 1193 #define STM32H7_PG14_FUNC_SPI6_MOSI 0x6e06 1194 #define STM32H7_PG14_FUNC_USART6_TX 0x6e08 1195 #define STM32H7_PG14_FUNC_QUADSPI_BK2_IO3 0x6e0a 1196 #define STM32H7_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1 0x6e0c 1197 #define STM32H7_PG14_FUNC_FMC_A25 0x6e0d 1198 #define STM32H7_PG14_FUNC_LCD_B0 0x6e0f 1199 #define STM32H7_PG14_FUNC_EVENTOUT 0x6e10 1200 #define STM32H7_PG14_FUNC_ANALOG 0x6e11 1201 1202 #define STM32H7_PG15_FUNC_GPIO 0x6f00 1203 #define STM32H7_PG15_FUNC_USART6_CTS_NSS 0x6f08 1204 #define STM32H7_PG15_FUNC_FMC_SDNCAS 0x6f0d 1205 #define STM32H7_PG15_FUNC_DCMI_D13 0x6f0e 1206 #define STM32H7_PG15_FUNC_EVENTOUT 0x6f10 1207 #define STM32H7_PG15_FUNC_ANALOG 0x6f11 1208 1209 #define STM32H7_PH0_FUNC_GPIO 0x7000 1210 #define STM32H7_PH0_FUNC_EVENTOUT 0x7010 1211 #define STM32H7_PH0_FUNC_ANALOG 0x7011 1212 1213 #define STM32H7_PH1_FUNC_GPIO 0x7100 1214 #define STM32H7_PH1_FUNC_EVENTOUT 0x7110 1215 #define STM32H7_PH1_FUNC_ANALOG 0x7111 1216 1217 #define STM32H7_PH2_FUNC_GPIO 0x7200 1218 #define STM32H7_PH2_FUNC_LPTIM1_IN2 0x7202 1219 #define STM32H7_PH2_FUNC_QUADSPI_BK2_IO0 0x720a 1220 #define STM32H7_PH2_FUNC_SAI2_SCK_B 0x720b 1221 #define STM32H7_PH2_FUNC_ETH_MII_CRS 0x720c 1222 #define STM32H7_PH2_FUNC_FMC_SDCKE0 0x720d 1223 #define STM32H7_PH2_FUNC_LCD_R0 0x720f 1224 #define STM32H7_PH2_FUNC_EVENTOUT 0x7210 1225 #define STM32H7_PH2_FUNC_ANALOG 0x7211 1226 1227 #define STM32H7_PH3_FUNC_GPIO 0x7300 1228 #define STM32H7_PH3_FUNC_QUADSPI_BK2_IO1 0x730a 1229 #define STM32H7_PH3_FUNC_SAI2_MCK_B 0x730b 1230 #define STM32H7_PH3_FUNC_ETH_MII_COL 0x730c 1231 #define STM32H7_PH3_FUNC_FMC_SDNE0 0x730d 1232 #define STM32H7_PH3_FUNC_LCD_R1 0x730f 1233 #define STM32H7_PH3_FUNC_EVENTOUT 0x7310 1234 #define STM32H7_PH3_FUNC_ANALOG 0x7311 1235 1236 #define STM32H7_PH4_FUNC_GPIO 0x7400 1237 #define STM32H7_PH4_FUNC_I2C2_SCL 0x7405 1238 #define STM32H7_PH4_FUNC_LCD_G5 0x740a 1239 #define STM32H7_PH4_FUNC_OTG_HS_ULPI_NXT 0x740b 1240 #define STM32H7_PH4_FUNC_LCD_G4 0x740f 1241 #define STM32H7_PH4_FUNC_EVENTOUT 0x7410 1242 #define STM32H7_PH4_FUNC_ANALOG 0x7411 1243 1244 #define STM32H7_PH5_FUNC_GPIO 0x7500 1245 #define STM32H7_PH5_FUNC_I2C2_SDA 0x7505 1246 #define STM32H7_PH5_FUNC_SPI5_NSS 0x7506 1247 #define STM32H7_PH5_FUNC_FMC_SDNWE 0x750d 1248 #define STM32H7_PH5_FUNC_EVENTOUT 0x7510 1249 #define STM32H7_PH5_FUNC_ANALOG 0x7511 1250 1251 #define STM32H7_PH6_FUNC_GPIO 0x7600 1252 #define STM32H7_PH6_FUNC_I2C2_SMBA 0x7605 1253 #define STM32H7_PH6_FUNC_SPI5_SCK 0x7606 1254 #define STM32H7_PH6_FUNC_ETH_MII_RXD2 0x760c 1255 #define STM32H7_PH6_FUNC_FMC_SDNE1 0x760d 1256 #define STM32H7_PH6_FUNC_DCMI_D8 0x760e 1257 #define STM32H7_PH6_FUNC_EVENTOUT 0x7610 1258 #define STM32H7_PH6_FUNC_ANALOG 0x7611 1259 1260 #define STM32H7_PH7_FUNC_GPIO 0x7700 1261 #define STM32H7_PH7_FUNC_I2C3_SCL 0x7705 1262 #define STM32H7_PH7_FUNC_SPI5_MISO 0x7706 1263 #define STM32H7_PH7_FUNC_ETH_MII_RXD3 0x770c 1264 #define STM32H7_PH7_FUNC_FMC_SDCKE1 0x770d 1265 #define STM32H7_PH7_FUNC_DCMI_D9 0x770e 1266 #define STM32H7_PH7_FUNC_EVENTOUT 0x7710 1267 #define STM32H7_PH7_FUNC_ANALOG 0x7711 1268 1269 #define STM32H7_PH8_FUNC_GPIO 0x7800 1270 #define STM32H7_PH8_FUNC_TIM5_ETR 0x7803 1271 #define STM32H7_PH8_FUNC_I2C3_SDA 0x7805 1272 #define STM32H7_PH8_FUNC_FMC_D16 0x780d 1273 #define STM32H7_PH8_FUNC_DCMI_HSYNC 0x780e 1274 #define STM32H7_PH8_FUNC_LCD_R2 0x780f 1275 #define STM32H7_PH8_FUNC_EVENTOUT 0x7810 1276 #define STM32H7_PH8_FUNC_ANALOG 0x7811 1277 1278 #define STM32H7_PH9_FUNC_GPIO 0x7900 1279 #define STM32H7_PH9_FUNC_I2C3_SMBA 0x7905 1280 #define STM32H7_PH9_FUNC_FMC_D17 0x790d 1281 #define STM32H7_PH9_FUNC_DCMI_D0 0x790e 1282 #define STM32H7_PH9_FUNC_LCD_R3 0x790f 1283 #define STM32H7_PH9_FUNC_EVENTOUT 0x7910 1284 #define STM32H7_PH9_FUNC_ANALOG 0x7911 1285 1286 #define STM32H7_PH10_FUNC_GPIO 0x7a00 1287 #define STM32H7_PH10_FUNC_TIM5_CH1 0x7a03 1288 #define STM32H7_PH10_FUNC_I2C4_SMBA 0x7a05 1289 #define STM32H7_PH10_FUNC_FMC_D18 0x7a0d 1290 #define STM32H7_PH10_FUNC_DCMI_D1 0x7a0e 1291 #define STM32H7_PH10_FUNC_LCD_R4 0x7a0f 1292 #define STM32H7_PH10_FUNC_EVENTOUT 0x7a10 1293 #define STM32H7_PH10_FUNC_ANALOG 0x7a11 1294 1295 #define STM32H7_PH11_FUNC_GPIO 0x7b00 1296 #define STM32H7_PH11_FUNC_TIM5_CH2 0x7b03 1297 #define STM32H7_PH11_FUNC_I2C4_SCL 0x7b05 1298 #define STM32H7_PH11_FUNC_FMC_D19 0x7b0d 1299 #define STM32H7_PH11_FUNC_DCMI_D2 0x7b0e 1300 #define STM32H7_PH11_FUNC_LCD_R5 0x7b0f 1301 #define STM32H7_PH11_FUNC_EVENTOUT 0x7b10 1302 #define STM32H7_PH11_FUNC_ANALOG 0x7b11 1303 1304 #define STM32H7_PH12_FUNC_GPIO 0x7c00 1305 #define STM32H7_PH12_FUNC_TIM5_CH3 0x7c03 1306 #define STM32H7_PH12_FUNC_I2C4_SDA 0x7c05 1307 #define STM32H7_PH12_FUNC_FMC_D20 0x7c0d 1308 #define STM32H7_PH12_FUNC_DCMI_D3 0x7c0e 1309 #define STM32H7_PH12_FUNC_LCD_R6 0x7c0f 1310 #define STM32H7_PH12_FUNC_EVENTOUT 0x7c10 1311 #define STM32H7_PH12_FUNC_ANALOG 0x7c11 1312 1313 #define STM32H7_PH13_FUNC_GPIO 0x7d00 1314 #define STM32H7_PH13_FUNC_TIM8_CH1N 0x7d04 1315 #define STM32H7_PH13_FUNC_UART4_TX 0x7d09 1316 #define STM32H7_PH13_FUNC_CAN1_TX 0x7d0a 1317 #define STM32H7_PH13_FUNC_FMC_D21 0x7d0d 1318 #define STM32H7_PH13_FUNC_LCD_G2 0x7d0f 1319 #define STM32H7_PH13_FUNC_EVENTOUT 0x7d10 1320 #define STM32H7_PH13_FUNC_ANALOG 0x7d11 1321 1322 #define STM32H7_PH14_FUNC_GPIO 0x7e00 1323 #define STM32H7_PH14_FUNC_TIM8_CH2N 0x7e04 1324 #define STM32H7_PH14_FUNC_UART4_RX 0x7e09 1325 #define STM32H7_PH14_FUNC_CAN1_RX 0x7e0a 1326 #define STM32H7_PH14_FUNC_FMC_D22 0x7e0d 1327 #define STM32H7_PH14_FUNC_DCMI_D4 0x7e0e 1328 #define STM32H7_PH14_FUNC_LCD_G3 0x7e0f 1329 #define STM32H7_PH14_FUNC_EVENTOUT 0x7e10 1330 #define STM32H7_PH14_FUNC_ANALOG 0x7e11 1331 1332 #define STM32H7_PH15_FUNC_GPIO 0x7f00 1333 #define STM32H7_PH15_FUNC_TIM8_CH3N 0x7f04 1334 #define STM32H7_PH15_FUNC_CAN1_TXFD 0x7f0a 1335 #define STM32H7_PH15_FUNC_FMC_D23 0x7f0d 1336 #define STM32H7_PH15_FUNC_DCMI_D11 0x7f0e 1337 #define STM32H7_PH15_FUNC_LCD_G4 0x7f0f 1338 #define STM32H7_PH15_FUNC_EVENTOUT 0x7f10 1339 #define STM32H7_PH15_FUNC_ANALOG 0x7f11 1340 1341 #define STM32H7_PI0_FUNC_GPIO 0x8000 1342 #define STM32H7_PI0_FUNC_TIM5_CH4 0x8003 1343 #define STM32H7_PI0_FUNC_SPI2_NSS_I2S2_WS 0x8006 1344 #define STM32H7_PI0_FUNC_CAN1_RXFD 0x800a 1345 #define STM32H7_PI0_FUNC_FMC_D24 0x800d 1346 #define STM32H7_PI0_FUNC_DCMI_D13 0x800e 1347 #define STM32H7_PI0_FUNC_LCD_G5 0x800f 1348 #define STM32H7_PI0_FUNC_EVENTOUT 0x8010 1349 #define STM32H7_PI0_FUNC_ANALOG 0x8011 1350 1351 #define STM32H7_PI1_FUNC_GPIO 0x8100 1352 #define STM32H7_PI1_FUNC_TIM8_BKIN2 0x8104 1353 #define STM32H7_PI1_FUNC_SPI2_SCK_I2S2_CK 0x8106 1354 #define STM32H7_PI1_FUNC_TIM8_BKIN2_COMP12 0x810c 1355 #define STM32H7_PI1_FUNC_FMC_D25 0x810d 1356 #define STM32H7_PI1_FUNC_DCMI_D8 0x810e 1357 #define STM32H7_PI1_FUNC_LCD_G6 0x810f 1358 #define STM32H7_PI1_FUNC_EVENTOUT 0x8110 1359 #define STM32H7_PI1_FUNC_ANALOG 0x8111 1360 1361 #define STM32H7_PI2_FUNC_GPIO 0x8200 1362 #define STM32H7_PI2_FUNC_TIM8_CH4 0x8204 1363 #define STM32H7_PI2_FUNC_SPI2_MISO_I2S2_SDI 0x8206 1364 #define STM32H7_PI2_FUNC_FMC_D26 0x820d 1365 #define STM32H7_PI2_FUNC_DCMI_D9 0x820e 1366 #define STM32H7_PI2_FUNC_LCD_G7 0x820f 1367 #define STM32H7_PI2_FUNC_EVENTOUT 0x8210 1368 #define STM32H7_PI2_FUNC_ANALOG 0x8211 1369 1370 #define STM32H7_PI3_FUNC_GPIO 0x8300 1371 #define STM32H7_PI3_FUNC_TIM8_ETR 0x8304 1372 #define STM32H7_PI3_FUNC_SPI2_MOSI_I2S2_SDO 0x8306 1373 #define STM32H7_PI3_FUNC_FMC_D27 0x830d 1374 #define STM32H7_PI3_FUNC_DCMI_D10 0x830e 1375 #define STM32H7_PI3_FUNC_EVENTOUT 0x8310 1376 #define STM32H7_PI3_FUNC_ANALOG 0x8311 1377 1378 #define STM32H7_PI4_FUNC_GPIO 0x8400 1379 #define STM32H7_PI4_FUNC_TIM8_BKIN 0x8404 1380 #define STM32H7_PI4_FUNC_SAI2_MCK_A 0x840b 1381 #define STM32H7_PI4_FUNC_TIM8_BKIN_COMP12 0x840c 1382 #define STM32H7_PI4_FUNC_FMC_NBL2 0x840d 1383 #define STM32H7_PI4_FUNC_DCMI_D5 0x840e 1384 #define STM32H7_PI4_FUNC_LCD_B4 0x840f 1385 #define STM32H7_PI4_FUNC_EVENTOUT 0x8410 1386 #define STM32H7_PI4_FUNC_ANALOG 0x8411 1387 1388 #define STM32H7_PI5_FUNC_GPIO 0x8500 1389 #define STM32H7_PI5_FUNC_TIM8_CH1 0x8504 1390 #define STM32H7_PI5_FUNC_SAI2_SCK_A 0x850b 1391 #define STM32H7_PI5_FUNC_FMC_NBL3 0x850d 1392 #define STM32H7_PI5_FUNC_DCMI_VSYNC 0x850e 1393 #define STM32H7_PI5_FUNC_LCD_B5 0x850f 1394 #define STM32H7_PI5_FUNC_EVENTOUT 0x8510 1395 #define STM32H7_PI5_FUNC_ANALOG 0x8511 1396 1397 #define STM32H7_PI6_FUNC_GPIO 0x8600 1398 #define STM32H7_PI6_FUNC_TIM8_CH2 0x8604 1399 #define STM32H7_PI6_FUNC_SAI2_SD_A 0x860b 1400 #define STM32H7_PI6_FUNC_FMC_D28 0x860d 1401 #define STM32H7_PI6_FUNC_DCMI_D6 0x860e 1402 #define STM32H7_PI6_FUNC_LCD_B6 0x860f 1403 #define STM32H7_PI6_FUNC_EVENTOUT 0x8610 1404 #define STM32H7_PI6_FUNC_ANALOG 0x8611 1405 1406 #define STM32H7_PI7_FUNC_GPIO 0x8700 1407 #define STM32H7_PI7_FUNC_TIM8_CH3 0x8704 1408 #define STM32H7_PI7_FUNC_SAI2_FS_A 0x870b 1409 #define STM32H7_PI7_FUNC_FMC_D29 0x870d 1410 #define STM32H7_PI7_FUNC_DCMI_D7 0x870e 1411 #define STM32H7_PI7_FUNC_LCD_B7 0x870f 1412 #define STM32H7_PI7_FUNC_EVENTOUT 0x8710 1413 #define STM32H7_PI7_FUNC_ANALOG 0x8711 1414 1415 #define STM32H7_PI8_FUNC_GPIO 0x8800 1416 #define STM32H7_PI8_FUNC_EVENTOUT 0x8810 1417 #define STM32H7_PI8_FUNC_ANALOG 0x8811 1418 1419 #define STM32H7_PI9_FUNC_GPIO 0x8900 1420 #define STM32H7_PI9_FUNC_UART4_RX 0x8909 1421 #define STM32H7_PI9_FUNC_CAN1_RX 0x890a 1422 #define STM32H7_PI9_FUNC_FMC_D30 0x890d 1423 #define STM32H7_PI9_FUNC_LCD_VSYNC 0x890f 1424 #define STM32H7_PI9_FUNC_EVENTOUT 0x8910 1425 #define STM32H7_PI9_FUNC_ANALOG 0x8911 1426 1427 #define STM32H7_PI10_FUNC_GPIO 0x8a00 1428 #define STM32H7_PI10_FUNC_CAN1_RXFD 0x8a0a 1429 #define STM32H7_PI10_FUNC_ETH_MII_RX_ER 0x8a0c 1430 #define STM32H7_PI10_FUNC_FMC_D31 0x8a0d 1431 #define STM32H7_PI10_FUNC_LCD_HSYNC 0x8a0f 1432 #define STM32H7_PI10_FUNC_EVENTOUT 0x8a10 1433 #define STM32H7_PI10_FUNC_ANALOG 0x8a11 1434 1435 #define STM32H7_PI11_FUNC_GPIO 0x8b00 1436 #define STM32H7_PI11_FUNC_LCD_G6 0x8b0a 1437 #define STM32H7_PI11_FUNC_OTG_HS_ULPI_DIR 0x8b0b 1438 #define STM32H7_PI11_FUNC_EVENTOUT 0x8b10 1439 #define STM32H7_PI11_FUNC_ANALOG 0x8b11 1440 1441 #define STM32H7_PI12_FUNC_GPIO 0x8c00 1442 #define STM32H7_PI12_FUNC_ETH_TX_ER 0x8c0c 1443 #define STM32H7_PI12_FUNC_LCD_HSYNC 0x8c0f 1444 #define STM32H7_PI12_FUNC_EVENTOUT 0x8c10 1445 #define STM32H7_PI12_FUNC_ANALOG 0x8c11 1446 1447 #define STM32H7_PI13_FUNC_GPIO 0x8d00 1448 #define STM32H7_PI13_FUNC_LCD_VSYNC 0x8d0f 1449 #define STM32H7_PI13_FUNC_EVENTOUT 0x8d10 1450 #define STM32H7_PI13_FUNC_ANALOG 0x8d11 1451 1452 #define STM32H7_PI14_FUNC_GPIO 0x8e00 1453 #define STM32H7_PI14_FUNC_LCD_CLK 0x8e0f 1454 #define STM32H7_PI14_FUNC_EVENTOUT 0x8e10 1455 #define STM32H7_PI14_FUNC_ANALOG 0x8e11 1456 1457 #define STM32H7_PI15_FUNC_GPIO 0x8f00 1458 #define STM32H7_PI15_FUNC_LCD_G2 0x8f0a 1459 #define STM32H7_PI15_FUNC_LCD_R0 0x8f0f 1460 #define STM32H7_PI15_FUNC_EVENTOUT 0x8f10 1461 #define STM32H7_PI15_FUNC_ANALOG 0x8f11 1462 1463 #define STM32H7_PJ0_FUNC_GPIO 0x9000 1464 #define STM32H7_PJ0_FUNC_LCD_R7 0x900a 1465 #define STM32H7_PJ0_FUNC_LCD_R1 0x900f 1466 #define STM32H7_PJ0_FUNC_EVENTOUT 0x9010 1467 #define STM32H7_PJ0_FUNC_ANALOG 0x9011 1468 1469 #define STM32H7_PJ1_FUNC_GPIO 0x9100 1470 #define STM32H7_PJ1_FUNC_LCD_R2 0x910f 1471 #define STM32H7_PJ1_FUNC_EVENTOUT 0x9110 1472 #define STM32H7_PJ1_FUNC_ANALOG 0x9111 1473 1474 #define STM32H7_PJ2_FUNC_GPIO 0x9200 1475 #define STM32H7_PJ2_FUNC_DSI_TE 0x920e 1476 #define STM32H7_PJ2_FUNC_LCD_R3 0x920f 1477 #define STM32H7_PJ2_FUNC_EVENTOUT 0x9210 1478 #define STM32H7_PJ2_FUNC_ANALOG 0x9211 1479 1480 #define STM32H7_PJ3_FUNC_GPIO 0x9300 1481 #define STM32H7_PJ3_FUNC_LCD_R4 0x930f 1482 #define STM32H7_PJ3_FUNC_EVENTOUT 0x9310 1483 #define STM32H7_PJ3_FUNC_ANALOG 0x9311 1484 1485 #define STM32H7_PJ4_FUNC_GPIO 0x9400 1486 #define STM32H7_PJ4_FUNC_LCD_R5 0x940f 1487 #define STM32H7_PJ4_FUNC_EVENTOUT 0x9410 1488 #define STM32H7_PJ4_FUNC_ANALOG 0x9411 1489 1490 #define STM32H7_PJ5_FUNC_GPIO 0x9500 1491 #define STM32H7_PJ5_FUNC_LCD_R6 0x950f 1492 #define STM32H7_PJ5_FUNC_EVENTOUT 0x9510 1493 #define STM32H7_PJ5_FUNC_ANALOG 0x9511 1494 1495 #define STM32H7_PJ6_FUNC_GPIO 0x9600 1496 #define STM32H7_PJ6_FUNC_TIM8_CH2 0x9604 1497 #define STM32H7_PJ6_FUNC_LCD_R7 0x960f 1498 #define STM32H7_PJ6_FUNC_EVENTOUT 0x9610 1499 #define STM32H7_PJ6_FUNC_ANALOG 0x9611 1500 1501 #define STM32H7_PJ7_FUNC_GPIO 0x9700 1502 #define STM32H7_PJ7_FUNC_TRGIN 0x9701 1503 #define STM32H7_PJ7_FUNC_TIM8_CH2N 0x9704 1504 #define STM32H7_PJ7_FUNC_LCD_G0 0x970f 1505 #define STM32H7_PJ7_FUNC_EVENTOUT 0x9710 1506 #define STM32H7_PJ7_FUNC_ANALOG 0x9711 1507 1508 #define STM32H7_PJ8_FUNC_GPIO 0x9800 1509 #define STM32H7_PJ8_FUNC_TIM1_CH3N 0x9802 1510 #define STM32H7_PJ8_FUNC_TIM8_CH1 0x9804 1511 #define STM32H7_PJ8_FUNC_UART8_TX 0x9809 1512 #define STM32H7_PJ8_FUNC_LCD_G1 0x980f 1513 #define STM32H7_PJ8_FUNC_EVENTOUT 0x9810 1514 #define STM32H7_PJ8_FUNC_ANALOG 0x9811 1515 1516 #define STM32H7_PJ9_FUNC_GPIO 0x9900 1517 #define STM32H7_PJ9_FUNC_TIM1_CH3 0x9902 1518 #define STM32H7_PJ9_FUNC_TIM8_CH1N 0x9904 1519 #define STM32H7_PJ9_FUNC_UART8_RX 0x9909 1520 #define STM32H7_PJ9_FUNC_LCD_G2 0x990f 1521 #define STM32H7_PJ9_FUNC_EVENTOUT 0x9910 1522 #define STM32H7_PJ9_FUNC_ANALOG 0x9911 1523 1524 #define STM32H7_PJ10_FUNC_GPIO 0x9a00 1525 #define STM32H7_PJ10_FUNC_TIM1_CH2N 0x9a02 1526 #define STM32H7_PJ10_FUNC_TIM8_CH2 0x9a04 1527 #define STM32H7_PJ10_FUNC_SPI5_MOSI 0x9a06 1528 #define STM32H7_PJ10_FUNC_LCD_G3 0x9a0f 1529 #define STM32H7_PJ10_FUNC_EVENTOUT 0x9a10 1530 #define STM32H7_PJ10_FUNC_ANALOG 0x9a11 1531 1532 #define STM32H7_PJ11_FUNC_GPIO 0x9b00 1533 #define STM32H7_PJ11_FUNC_TIM1_CH2 0x9b02 1534 #define STM32H7_PJ11_FUNC_TIM8_CH2N 0x9b04 1535 #define STM32H7_PJ11_FUNC_SPI5_MISO 0x9b06 1536 #define STM32H7_PJ11_FUNC_LCD_G4 0x9b0f 1537 #define STM32H7_PJ11_FUNC_EVENTOUT 0x9b10 1538 #define STM32H7_PJ11_FUNC_ANALOG 0x9b11 1539 1540 #define STM32H7_PJ12_FUNC_GPIO 0x9c00 1541 #define STM32H7_PJ12_FUNC_TRGOUT 0x9c01 1542 #define STM32H7_PJ12_FUNC_LCD_G3 0x9c0a 1543 #define STM32H7_PJ12_FUNC_LCD_B0 0x9c0f 1544 #define STM32H7_PJ12_FUNC_EVENTOUT 0x9c10 1545 #define STM32H7_PJ12_FUNC_ANALOG 0x9c11 1546 1547 #define STM32H7_PJ13_FUNC_GPIO 0x9d00 1548 #define STM32H7_PJ13_FUNC_LCD_B4 0x9d0a 1549 #define STM32H7_PJ13_FUNC_LCD_B1 0x9d0f 1550 #define STM32H7_PJ13_FUNC_EVENTOUT 0x9d10 1551 #define STM32H7_PJ13_FUNC_ANALOG 0x9d11 1552 1553 #define STM32H7_PJ14_FUNC_GPIO 0x9e00 1554 #define STM32H7_PJ14_FUNC_LCD_B2 0x9e0f 1555 #define STM32H7_PJ14_FUNC_EVENTOUT 0x9e10 1556 #define STM32H7_PJ14_FUNC_ANALOG 0x9e11 1557 1558 #define STM32H7_PJ15_FUNC_GPIO 0x9f00 1559 #define STM32H7_PJ15_FUNC_LCD_B3 0x9f0f 1560 #define STM32H7_PJ15_FUNC_EVENTOUT 0x9f10 1561 #define STM32H7_PJ15_FUNC_ANALOG 0x9f11 1562 1563 #define STM32H7_PK0_FUNC_GPIO 0xa000 1564 #define STM32H7_PK0_FUNC_TIM1_CH1N 0xa002 1565 #define STM32H7_PK0_FUNC_TIM8_CH3 0xa004 1566 #define STM32H7_PK0_FUNC_SPI5_SCK 0xa006 1567 #define STM32H7_PK0_FUNC_LCD_G5 0xa00f 1568 #define STM32H7_PK0_FUNC_EVENTOUT 0xa010 1569 #define STM32H7_PK0_FUNC_ANALOG 0xa011 1570 1571 #define STM32H7_PK1_FUNC_GPIO 0xa100 1572 #define STM32H7_PK1_FUNC_TIM1_CH1 0xa102 1573 #define STM32H7_PK1_FUNC_TIM8_CH3N 0xa104 1574 #define STM32H7_PK1_FUNC_SPI5_NSS 0xa106 1575 #define STM32H7_PK1_FUNC_LCD_G6 0xa10f 1576 #define STM32H7_PK1_FUNC_EVENTOUT 0xa110 1577 #define STM32H7_PK1_FUNC_ANALOG 0xa111 1578 1579 #define STM32H7_PK2_FUNC_GPIO 0xa200 1580 #define STM32H7_PK2_FUNC_TIM1_BKIN 0xa202 1581 #define STM32H7_PK2_FUNC_TIM8_BKIN 0xa204 1582 #define STM32H7_PK2_FUNC_TIM8_BKIN_COMP12 0xa20b 1583 #define STM32H7_PK2_FUNC_TIM1_BKIN_COMP12 0xa20c 1584 #define STM32H7_PK2_FUNC_LCD_G7 0xa20f 1585 #define STM32H7_PK2_FUNC_EVENTOUT 0xa210 1586 #define STM32H7_PK2_FUNC_ANALOG 0xa211 1587 1588 #define STM32H7_PK3_FUNC_GPIO 0xa300 1589 #define STM32H7_PK3_FUNC_LCD_B4 0xa30f 1590 #define STM32H7_PK3_FUNC_EVENTOUT 0xa310 1591 #define STM32H7_PK3_FUNC_ANALOG 0xa311 1592 1593 #define STM32H7_PK4_FUNC_GPIO 0xa400 1594 #define STM32H7_PK4_FUNC_LCD_B5 0xa40f 1595 #define STM32H7_PK4_FUNC_EVENTOUT 0xa410 1596 #define STM32H7_PK4_FUNC_ANALOG 0xa411 1597 1598 #define STM32H7_PK5_FUNC_GPIO 0xa500 1599 #define STM32H7_PK5_FUNC_LCD_B6 0xa50f 1600 #define STM32H7_PK5_FUNC_EVENTOUT 0xa510 1601 #define STM32H7_PK5_FUNC_ANALOG 0xa511 1602 1603 #define STM32H7_PK6_FUNC_GPIO 0xa600 1604 #define STM32H7_PK6_FUNC_LCD_B7 0xa60f 1605 #define STM32H7_PK6_FUNC_EVENTOUT 0xa610 1606 #define STM32H7_PK6_FUNC_ANALOG 0xa611 1607 1608 #define STM32H7_PK7_FUNC_GPIO 0xa700 1609 #define STM32H7_PK7_FUNC_LCD_DE 0xa70f 1610 #define STM32H7_PK7_FUNC_EVENTOUT 0xa710 1611 #define STM32H7_PK7_FUNC_ANALOG 0xa711 1612 1613 #endif /* _DT_BINDINGS_STM32H7_PINFUNC_H */ 1614