203 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0xf) << 4));  in ast_get_vbios_mode_info()
204 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff);  in ast_get_vbios_mode_info()
205 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff);  in ast_get_vbios_mode_info()
207 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00);  in ast_get_vbios_mode_info()
209 			ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);  in ast_get_vbios_mode_info()
210 			ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92, crtc->primary->fb->bits_per_pixel);  in ast_get_vbios_mode_info()
211 			ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000);  in ast_get_vbios_mode_info()
212 			ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay);  in ast_get_vbios_mode_info()
213 			ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8);  in ast_get_vbios_mode_info()
215 			ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay);  in ast_get_vbios_mode_info()
216 			ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8);  in ast_get_vbios_mode_info()
238 	ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03);  in ast_set_std_reg()
243 		ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1) , jreg);  in ast_set_std_reg()
249 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);  in ast_set_std_reg()
266 		ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]);  in ast_set_std_reg()
376 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff));  in ast_set_offset_reg()
377 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f);  in ast_set_offset_reg()
425 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78);  in ast_set_ext_reg()
426 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60);  in ast_set_ext_reg()
431 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f);  in ast_set_ext_reg()
432 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f);  in ast_set_ext_reg()
434 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f);  in ast_set_ext_reg()
435 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f);  in ast_set_ext_reg()
470 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff));  in ast_set_start_address_crt1()
471 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff));  in ast_set_start_address_crt1()
472 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff));  in ast_set_start_address_crt1()
1226 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, gpu_addr & 0xff);  in ast_cursor_set()
1227 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, (gpu_addr >> 8) & 0xff);  in ast_cursor_set()
1228 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, (gpu_addr >> 16) & 0xff);  in ast_cursor_set()
1269 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset);  in ast_cursor_move()
1270 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset);  in ast_cursor_move()
1271 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, (x & 0xff));  in ast_cursor_move()
1272 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, ((x >> 8) & 0x0f));  in ast_cursor_move()
1273 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, (y & 0xff));  in ast_cursor_move()
1274 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, ((y >> 8) & 0x07));  in ast_cursor_move()