| /arch/blackfin/mach-common/ |
| D | dpmc_modes.S | 34 R2 = IWR_DISABLE_ALL; define
73 R2 = IWR_DISABLE_ALL; define
101 R2 = IWR_DISABLE_ALL; define
128 R2 = 0x0404(Z); define
131 R2 = DEPOSIT(R7, R1); define
156 R2 = IWR_DISABLE_ALL; define
196 R2 = [P0]; define
201 R2 = [P0]; define
210 R2 = [P0]; define
216 R2 = w[P1]; define
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| D | cache.S | 31 R2 = -L1_CACHE_BYTES; define
42 R2 = R1 - R0; define
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| D | interrupt.S | 165 R2 = 10; define
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| /arch/blackfin/lib/ |
| D | udivsi3.S | 23 R2 = R1 << 16; define
27 R2 = R0 >> 31; /* if X is a 31-bit number */ define
29 R2 = R2 | R3; /* then it's okay to use the DIVQ builtins (fallthrough to fast)*/ define
90 R2 = R0 >> 16; define
92 R2 = R3 - R2; /* shifted divisor < upper 16 bits of dividend */ define
112 R2 = R2.L (Z); define
129 R2 = R1 >> 1; define
136 R2 = R0 >> 1; define
137 R2 = R0 >> 1; define
151 R2 = R2 << 1; /* Shift 64 bit dividend up by 1 bit */ define
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| D | divsi3.S | 101 R2 = R2.L (Z); define
112 R2 = -R1; define
114 R2 = R0 << 1; /* R2 lsw of dividend */ define
119 R2 = R2 | R5; /* Shift quotient bit */ define
124 R2 = R2 << 1; /* Shift 64 bit dividend up by 1 bit */ define
149 R2 = -1 (X); define
154 R2 = 1 (Z); define
157 R2 = R0; /* assume divide by 1 => numerator */ define
162 R2 = -R2; define
180 R2 = R0 >> 31; define
[all …]
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| D | memset.S | 33 R2 = 3; define
34 R2 = R0 & R2; /* addr bottom two bits */ define
40 R2 = R1 << 8; /* create quad filler */ define
54 R2 = R3; /* end point */ define
56 R2 = R2 - R3; /* bytes left */ define
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| D | smulsi3_highpart.S | 18 R2 = R1.L * R0.L (FU); define
24 R2 = cc; define
32 R2 = cc; define
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| D | umulsi3_highpart.S | 18 R2 = R1.H * R0.H, R3 = R1.L * R0.H (FU); define
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| D | strncpy.S | 49 R2 = LC0; define
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| D | memcmp.S | 36 R2 = R2 & R3; /* remainder */ define
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| D | memmove.S | 45 R2 = R2 & R3; /* remainder */ define
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| /arch/sparc/net/ |
| D | bpf_jit_comp.c | 298 #define emit_cmp(R1, R2) \ argument
304 #define emit_btst(R1, R2) \ argument
310 #define emit_sub(R1, R2, R3) \ argument
316 #define emit_add(R1, R2, R3) \ argument
322 #define emit_and(R1, R2, R3) \ argument
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| /arch/x86/crypto/ |
| D | twofish-x86_64-asm_64.S | 52 #define R2 %rcx macro
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| D | aes-x86_64-asm_64.S | 26 #define R2 %rbx macro
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| /arch/m32r/kernel/ |
| D | entry.S | 90 #define R2(reg) @(0x18,reg) macro
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| /arch/parisc/kernel/ |
| D | unaligned.c | 120 #define R2(i) (((i)>>16)&0x1f) macro
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| /arch/cris/arch-v10/kernel/ |
| D | kgdb.c | 303 R0, R1, R2, R3, enumerator
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| /arch/cris/arch-v32/kernel/ |
| D | kgdb.c | 311 R0, R1, R2, R3, enumerator
|