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Searched refs:CM_REV_CM2_5 (Results 1 – 2 of 2) sorted by relevance

/arch/mips/mm/
Dsc-mips.c58 if (mips_cm_revision() < CM_REV_CM2_5) in mips_sc_prefetch_enable()
83 if (mips_cm_revision() < CM_REV_CM2_5) in mips_sc_prefetch_disable()
100 if (mips_cm_revision() < CM_REV_CM2_5) in mips_sc_prefetch_is_enabled()
/arch/mips/include/asm/
Dmips-cm.h262 #define CM_REV_CM2_5 CM_ENCODE_REV(7, 0) macro