| /arch/tile/include/asm/ |
| D | pgtable_32.h | 24 #define PGDIR_SIZE HPAGE_SIZE
58 # define _VMALLOC_END (PKMAP_BASE & ~(HPAGE_SIZE-1))
60 # define _VMALLOC_END (FIXADDR_START & ~(HPAGE_SIZE-1))
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| D | pci.h | 78 #define PCIE_HOST_BAR0_SIZE HPAGE_SIZE
92 #define MEM_MAP_INTR_REGIONS_BASE (HPAGE_MASK - HPAGE_SIZE)
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| D | page.h | 38 #define HPAGE_SIZE (_AC(1, UL) << HPAGE_SHIFT) macro
41 #define HPAGE_MASK (~(HPAGE_SIZE - 1))
252 ((kaddr & (HPAGE_SIZE - 1)) >> PAGE_SHIFT); in kaddr_to_pfn()
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| D | tlbflush.h | 92 local_flush_tlb_pages(NULL, r.start, HPAGE_SIZE, r.size); in local_flush_tlb_all()
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| D | pgtable_64.h | 32 #define PMD_SIZE HPAGE_SIZE
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| /arch/x86/include/asm/ |
| D | page_types.h | 29 #define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) macro
30 #define HPAGE_MASK (~(HPAGE_SIZE - 1))
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| /arch/mips/include/asm/ |
| D | page.h | 63 #define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) macro
64 #define HPAGE_MASK (~(HPAGE_SIZE - 1))
68 #define HPAGE_SIZE ({BUILD_BUG(); 0; }) macro
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| D | hugetlb.h | 109 flush_tlb_range(vma, addr, addr + HPAGE_SIZE); in huge_ptep_set_access_flags()
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| /arch/hexagon/include/asm/ |
| D | page.h | 60 #define HPAGE_SIZE (1UL << HPAGE_SHIFT) macro
61 #define HPAGE_MASK (~(HPAGE_SIZE-1))
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| /arch/mn10300/include/asm/ |
| D | page.h | 47 #define HPAGE_SIZE ((1UL) << HPAGE_SHIFT) macro
48 #define HPAGE_MASK (~(HPAGE_SIZE - 1))
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| /arch/s390/include/asm/ |
| D | kexec.h | 39 #define KEXEC_CRASH_MEM_ALIGN HPAGE_SIZE
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| D | page.h | 21 #define HPAGE_SIZE (1UL << HPAGE_SHIFT) macro
22 #define HPAGE_MASK (~(HPAGE_SIZE - 1))
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| /arch/metag/include/asm/ |
| D | page.h | 43 # define HPAGE_SIZE (1UL << HPAGE_SHIFT) macro
44 # define HPAGE_MASK (~(HPAGE_SIZE-1))
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| /arch/sparc/include/asm/ |
| D | page_64.h | 24 #define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) macro
25 #define HPAGE_MASK (~(HPAGE_SIZE - 1UL))
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| /arch/parisc/include/asm/ |
| D | page.h | 149 #define HPAGE_SIZE ((1UL) << HPAGE_SHIFT) macro
150 #define HPAGE_MASK (~(HPAGE_SIZE - 1))
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| /arch/ia64/mm/ |
| D | hugetlbpage.c | 155 if ((REGION_NUMBER(addr) != RGN_HPAGE) || (addr & (HPAGE_SIZE - 1))) in hugetlb_get_unmapped_area()
162 info.align_mask = PAGE_MASK & (HPAGE_SIZE - 1); in hugetlb_get_unmapped_area()
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| /arch/sh/include/asm/ |
| D | page.h | 42 #define HPAGE_SIZE (1UL << HPAGE_SHIFT) macro
43 #define HPAGE_MASK (~(HPAGE_SIZE-1))
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| /arch/ia64/include/asm/ |
| D | page.h | 52 # define HPAGE_SIZE (__IA64_UL_CONST(1) << HPAGE_SHIFT) macro
53 # define HPAGE_MASK (~(HPAGE_SIZE - 1))
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| /arch/x86/kernel/ |
| D | vmlinux.lds.S | 56 #define X64_ALIGN_RODATA_BEGIN . = ALIGN(HPAGE_SIZE);
59 . = ALIGN(HPAGE_SIZE); \
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| /arch/powerpc/include/asm/ |
| D | page.h | 46 #define HPAGE_SIZE ((1UL) << HPAGE_SHIFT) macro
47 #define HPAGE_MASK (~(HPAGE_SIZE - 1))
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| /arch/tile/kernel/ |
| D | tlb.c | 89 r.start, r.size, HPAGE_SIZE, cpu_online_mask, in flush_tlb_all()
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| D | head_64.S | 248 .set addr, addr + HPAGE_SIZE
263 .set addr, addr + HPAGE_SIZE
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| D | setup.c | 325 for (j = 0; vaddr < vaddr_end; vaddr += HPAGE_SIZE, ++j) { in setup_pa_va_mapping()
413 if ((range.start & (HPAGE_SIZE-1)) != 0 || in setup_memory()
414 (range.size & (HPAGE_SIZE-1)) != 0) { in setup_memory()
417 range.start = (start_pa + HPAGE_SIZE - 1) & HPAGE_MASK; in setup_memory()
734 BUG_ON(kdata_huge && size > HPAGE_SIZE); in percpu_size()
1194 if (hv_hpage_size != HPAGE_SIZE) in validate_hv()
1196 hv_hpage_size, HPAGE_SIZE); in validate_hv()
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| /arch/tile/mm/ |
| D | init.c | 451 end_huge_pfn = end_pfn - (HPAGE_SIZE >> PAGE_SHIFT); in kernel_physical_mapping_init()
460 BUG_ON(address & (HPAGE_SIZE-1)); in kernel_physical_mapping_init()
572 pfn += PFN_DOWN(HPAGE_SIZE), address += HPAGE_SIZE) in kernel_physical_mapping_init()
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| /arch/arm/include/asm/ |
| D | pgtable-3level.h | 68 #define HPAGE_SIZE (_AC(1, UL) << HPAGE_SHIFT) macro
69 #define HPAGE_MASK (~(HPAGE_SIZE - 1))
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