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Searched refs:IRQ_DMA0 (Results 1 – 10 of 10) sorted by relevance

/arch/arm/mach-rpc/include/mach/
Dirqs.h27 #define IRQ_DMA0 16 macro
/arch/arm/mach-sa1100/include/mach/
Dirqs.h31 #define IRQ_DMA0 21 /* DMA controller channel 0 */ macro
/arch/arm/mach-s3c64xx/include/mach/
Dirqs.h84 #define IRQ_DMA0 S3C64XX_IRQ_VIC1(9) macro
/arch/arm/mach-s3c64xx/
Dpl080.c139 0x75000000, {IRQ_DMA0}, &s3c64xx_dma0_plat_data);
/arch/arm/mach-s3c24xx/include/mach/
Dirqs.h44 #define IRQ_DMA0 S3C2410_IRQ(17) /* IRQ_DMA for s3c2443 */ macro
/arch/arm/mach-sa1100/
Dgeneric.c288 DEFINE_RES_IRQ(IRQ_DMA0),
/arch/arm/mach-rpc/
Ddma.c364 iomd_dma[DMA_0].irq = IRQ_DMA0; in rpc_dma_init()
/arch/arm/mach-s3c24xx/
Dcommon.c311 [1] = DEFINE_RES_IRQ(IRQ_DMA0),
/arch/blackfin/mach-bf518/include/mach/
DdefBF512.h610 #define IRQ_DMA0 0x00000010 /* DMA Channel 0 (PPI) Interrupt */
/arch/blackfin/mach-bf527/include/mach/
DdefBF522.h611 #define IRQ_DMA0 0x00000010 /* DMA Channel 0 (PPI) Interrupt */