Home
last modified time | relevance | path

Searched refs:MIPS_CACHE_SYNC_WAR (Results 1 – 15 of 15) sorted by relevance

/arch/mips/include/asm/
Dwar.h196 #ifndef MIPS_CACHE_SYNC_WAR
197 #error Check setting of MIPS_CACHE_SYNC_WAR for your platform
/arch/mips/include/asm/mach-malta/
Dwar.h18 #define MIPS_CACHE_SYNC_WAR 1 macro
/arch/mips/include/asm/mach-ip22/
Dwar.h22 #define MIPS_CACHE_SYNC_WAR 0 macro
/arch/mips/include/asm/mach-ip32/
Dwar.h18 #define MIPS_CACHE_SYNC_WAR 0 macro
/arch/mips/include/asm/mach-ip27/
Dwar.h18 #define MIPS_CACHE_SYNC_WAR 0 macro
/arch/mips/include/asm/mach-ip28/
Dwar.h18 #define MIPS_CACHE_SYNC_WAR 0 macro
/arch/mips/include/asm/mach-generic/
Dwar.h18 #define MIPS_CACHE_SYNC_WAR 0 macro
/arch/mips/include/asm/mach-rc32434/
Dwar.h18 #define MIPS_CACHE_SYNC_WAR 0 macro
/arch/mips/include/asm/mach-sead3/
Dwar.h18 #define MIPS_CACHE_SYNC_WAR 1 macro
/arch/mips/include/asm/mach-rm/
Dwar.h22 #define MIPS_CACHE_SYNC_WAR 0 macro
/arch/mips/include/asm/mach-tx49xx/
Dwar.h18 #define MIPS_CACHE_SYNC_WAR 0 macro
/arch/mips/include/asm/mach-cavium-octeon/
Dwar.h19 #define MIPS_CACHE_SYNC_WAR 0 macro
/arch/mips/include/asm/mach-pmcs-msp71xx/
Dwar.h18 #define MIPS_CACHE_SYNC_WAR 0 macro
/arch/mips/include/asm/mach-sibyte/
Dwar.h33 #define MIPS_CACHE_SYNC_WAR 0 macro
/arch/mips/mm/
Dc-r4k.c874 if (MIPS_CACHE_SYNC_WAR) in local_r4k_flush_cache_sigtramp()