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Searched refs:SRC (Results 1 – 14 of 14) sorted by relevance

/arch/xtensa/lib/
Dchecksum.S183 #define SRC(y...) \ macro
247 SRC( l32i a9, a2, 0 )
248 SRC( l32i a8, a2, 4 )
253 SRC( l32i a9, a2, 8 )
254 SRC( l32i a8, a2, 12 )
259 SRC( l32i a9, a2, 16 )
260 SRC( l32i a8, a2, 20 )
265 SRC( l32i a9, a2, 24 )
266 SRC( l32i a8, a2, 28 )
287 SRC( l32i a9, a2, 0 )
[all …]
/arch/sh/lib/
Dchecksum.S194 #define SRC(...) \ macro
207 ! r4: const char *SRC
249 SRC( mov.b @r4+,r1 )
250 SRC( mov.b @r4+,r0 )
282 SRC( mov.w @r4+,r0 )
298 SRC( mov.l @r4+,r0 )
299 SRC( mov.l @r4+,r1 )
305 SRC( mov.l @r4+,r0 )
306 SRC( mov.l @r4+,r1 )
312 SRC( mov.l @r4+,r0 )
[all …]
Dmemcpy-sh4.S164 ! r4 --> [ ... ] DST [ ... ] SRC
/arch/x86/lib/
Dchecksum_32.S272 #define SRC(y...) \ macro
301 SRC(1: movw (%esi), %bx )
312 SRC(1: movl (%esi), %ebx )
313 SRC( movl 4(%esi), %edx )
319 SRC( movl 8(%esi), %ebx )
320 SRC( movl 12(%esi), %edx )
326 SRC( movl 16(%esi), %ebx )
327 SRC( movl 20(%esi), %edx )
333 SRC( movl 24(%esi), %ebx )
334 SRC( movl 28(%esi), %edx )
[all …]
/arch/sh/kernel/cpu/sh2a/
Dsetup-sh7203.c40 SRC, IEBI, enumerator
127 INTC_IRQ(SRC, 244), INTC_IRQ(SRC, 245),
128 INTC_IRQ(SRC, 246),
163 { 0xfffe0c16, 0, 16, 4, /* IPR17 */ { RCAN1, SRC, IEBI, 0 } },
/arch/arc/lib/
Dmemcpy-archs.S31 # define STOREX(SRC,RX) std.ab SRC, [RX, 8] argument
38 # define STOREX(SRC,RX) st.ab SRC, [RX, 4] argument
/arch/sh/kernel/cpu/sh4a/
Dsetup-sh7770.c366 TMU, DMAC, I2S, SRC, GFX3D, SPI, SCIF, BBDMAC, enumerator
423 INTC_GROUP(SRC, SRC_RX, SRC_TX, SRC_SPDIF),
436 GPS, CAN, ATAPI, USB, YUV, REMOTE, VIDEO_IN, DU, SRC, I2S,
443 { 0xffe00008, 0, 32, 8, /* INT2PRI2 */ { DMAC, I2S, SRC, DU } },
/arch/arm/crypto/
Dspeck-neon-core.S19 SRC .req r3 // const void *src
185 vld1.8 {\dst_reg}, [SRC]!
207 vld1.8 {\dst_reg}, [SRC]!
/arch/arm64/crypto/
Dspeck-neon-core.S19 SRC .req x3 // const void *src
257 ld1 {X_0.16b-Y_1.16b}, [SRC], #64
258 ld1 {X_2.16b-Y_3.16b}, [SRC], #64
/arch/x86/net/
Dbpf_jit_comp.c69 #define EMIT_mov(DST, SRC) \ argument
70 do {if (DST != SRC) \
71 EMIT3(add_2mod(0x48, DST, SRC), 0x89, add_2reg(0xC0, DST, SRC)); \
/arch/frv/kernel/
Dsetup.c577 #define CLOCK(SRC,RATIO) ((SRC) * (((RATIO) >> 4) & 0x0f) / ((RATIO) & 0x0f)) in determine_clocks() argument
/arch/sparc/net/
Dbpf_jit_comp.c247 #define emit_stmem(OFF, SRC) \ argument
248 do { *prog++ = ST32I | RS1(SP) | S13(BIAS - (OFF)) | RD(SRC); \
/arch/m68k/ifpsp060/src/
Dfpsp.S9598 fintrz.x SRC(%a0),%fp0 # calc int of src
12010 fmovm.x SRC(%a0),&0x80 # return INF result in fp0
12332 fmov.x SRC(%a0),%fp0 # do fmove in
13346 fintrz.x SRC(%a0),%fp0 # execute fintrz
13401 fmovm.x SRC(%a0),&0x80 # return result in fp0
13722 fabs.x SRC(%a0),%fp0 # force absolute value
13770 fcmp.x %fp0,SRC(%a0) # do compare
15034 fmovm.x SRC(%a0),&0x80 # return src INF
15483 fmovm.x SRC(%a0),&0x80 # return src INF
15832 fmovm.x SRC(%a0),&0x80 # return +INF in fp0
[all …]
Dfplsp.S390 set SRC, 0 # offsets within an