Searched refs:a1x (Results 1 – 7 of 7) sorted by relevance
/arch/blackfin/include/uapi/asm/ |
D | ptrace.h | 50 long a1x; member
|
/arch/arm/boot/dts/ |
D | stih415-clock.dtsi | 155 compatible = "st,plls-c32-a1x-0", "st,clkgen-plls-c32"; 167 compatible = "st,plls-c32-a1x-1", "st,clkgen-plls-c32"; 269 compatible = "st,plls-c32-a1x-0", "st,clkgen-plls-c32"; 281 compatible = "st,plls-c32-a1x-1", "st,clkgen-plls-c32"; 391 compatible = "st,plls-c32-a1x-0", "st,clkgen-plls-c32"; 403 compatible = "st,plls-c32-a1x-1", "st,clkgen-plls-c32";
|
D | stih416-clock.dtsi | 157 compatible = "st,plls-c32-a1x-0", "st,clkgen-plls-c32"; 169 compatible = "st,plls-c32-a1x-1", "st,clkgen-plls-c32"; 271 compatible = "st,plls-c32-a1x-0", "st,clkgen-plls-c32"; 283 compatible = "st,plls-c32-a1x-1", "st,clkgen-plls-c32"; 393 compatible = "st,plls-c32-a1x-0", "st,clkgen-plls-c32"; 405 compatible = "st,plls-c32-a1x-1", "st,clkgen-plls-c32";
|
/arch/blackfin/kernel/ |
D | signal.c | 59 RESTORE(a0x); RESTORE(a1x); in rt_restore_sigcontext() 120 SETUP(a0x); SETUP(a1x); in rt_setup_sigcontext()
|
D | kgdb.c | 50 gdb_regs[BFIN_A1_DOT_X] = regs->a1x; in pt_regs_to_gdb_regs() 126 regs->a1x = gdb_regs[BFIN_A1_DOT_X]; in gdb_regs_to_pt_regs()
|
D | asm-offsets.c | 91 DEFINE(PT_A1X, offsetof(struct pt_regs, a1x)); in main()
|
D | trace.c | 980 fp->a0w, fp->a0x, fp->a1w, fp->a1x); in show_regs()
|