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Searched refs:acr (Results 1 – 19 of 19) sorted by relevance

/arch/cris/arch-v32/kernel/
Dkgdb_asm.S21 move.d $acr, [$sp]
319 move.d sreg, $acr
326 move.d [$acr], $r0
328 addq 4, $acr
329 move.d [$acr], $r0
331 addq 4, $acr
332 move.d [$acr], $r0
334 addq 4, $acr
335 move.d [$acr], $r0
337 addq 4, $acr
[all …]
Dentry.S51 addoq +TI_preempt_count, $r0, $acr
52 move.d [$acr], $r10 ; Preemption disabled?
57 addoq +TI_flags, $r0, $acr
58 move.d [$acr], $r10
108 addoq +PT_ccs, $sp, $acr
109 move.d [$acr], $r0
234 addoq +TI_flags, $r0, $acr
235 move.d [$acr], $r1
244 addoq +PT_ccs, $sp, $acr
245 move.d [$acr], $r0
[all …]
Dtraps.c39 regs->r12, regs->r13, regs->orig_r10, regs->acr); in show_registers()
Dhead.S224 addoq +4, $r4, $acr
225 move.d [$acr], $r0
Dkgdb.c210 unsigned int acr; /* 0x3C; R15, Address calculation register. */ member
/arch/cris/arch-v32/mm/
Dmmu.S30 move.d $acr, [$sp]
96 move.d $acr, [$sp]
98 move.d 1b, $acr ; Point to refill_count
101 test.d [$acr] ; refill_count == 0 ?
103 move.d $acr, $r1
114 move.d $r2, [$acr] ; refill_count = 1
118 move.d current_pgd, $acr ; PGD
121 move.d [$acr], $acr ; PGD for the current process
122 addi $r0.d, $acr, $acr
124 move.d [$acr], $acr ; Get PMD
[all …]
/arch/cris/arch-v32/lib/
Dchecksum.S19 move.d $r11, $acr
29 addoq -10*4, $acr, $acr
43 ;; test $acr without trashing carry.
44 move.d $acr, $acr
46 ;; r11 <= acr is not really needed in the mloop, just using the dslot
48 move.d $acr, $r11
Dchecksumcopy.S23 move.d $r12, $acr
32 addoq -10*4, $acr, $acr ; loop counter in latency cycle
47 ;; test $acr, without trashing carry.
48 move.d $acr, $acr
50 ;; r12 <= acr is needed after mloop and in the exception handlers.
51 move.d $acr, $r12
Dcsumcpfruser.S46 move.d [$sp],$acr
49 move.d $r9,[$acr]
/arch/arm/mach-omap2/
Domap-secure.c147 u32 acr; in rx51_secure_update_aux_cr() local
150 asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr)); in rx51_secure_update_aux_cr()
151 acr &= ~clear_bits; in rx51_secure_update_aux_cr()
152 acr |= set_bits; in rx51_secure_update_aux_cr()
157 1, acr, 0, 0, 0); in rx51_secure_update_aux_cr()
/arch/avr32/lib/
Dcsum_partial.S23 acr r10
44 acr r10
Dcsum_partial_copy_generic.S46 acr r9
70 acr r9
/arch/cris/include/uapi/asm/
Delf_v32.h27 (_r)->acr = 0; \
58 pr_reg[15] = regs->acr; /* ACR */ \
Dptrace_v32.h73 unsigned long acr; member
/arch/cris/include/uapi/arch-v32/arch/
Duser.h22 unsigned long acr; /* R15, Address calculation register. */ member
/arch/powerpc/include/asm/
Dmpc52xx_psc.h177 u8 acr; member
180 #define mpc52xx_psc_acr ipcr_acr.acr
324 u8 acr; /* PSC + 0x1c */ member
/arch/cris/kernel/
Dasm-offsets.c25 ENTRY(acr); in main()
/arch/arm/kernel/
Dhead-nommu.S176 .macro setup_region bar, acr, sr, side = MPU_DATA_SIDE
178 mcr p15, 0, \acr, c6, c1, (4 + \side) @ I/DRACR
/arch/arm/mm/
Dcache-l2x0.c631 u32 acr = get_auxcr(); in l2c310_enable() local
633 pr_debug("Cortex-A9 ACR=0x%08x\n", acr); in l2c310_enable()
635 if (acr & BIT(3) && !(aux_cur & L310_AUX_CTRL_FULL_LINE_ZERO)) in l2c310_enable()
638 if (aux & L310_AUX_CTRL_FULL_LINE_ZERO && !(acr & BIT(3))) in l2c310_enable()