Searched refs:dz (Results 1 – 9 of 9) sorted by relevance
| /arch/m68k/fpsp040/ |
| D | kernel_ex.S | 49 | if dz trap disabled
51 | set FPSR exception status dz bit, condition code
52 | inf bit, and accrued dz bit
56 | else dz trap enabled
69 btstb #dz_bit,FPCR_ENABLE(%a6) |test FPCR for dz exc enabled
74 btstb #dz_bit,FPCR_ENABLE(%a6) |test FPCR for dz exc enabled
77 | dz disabled
92 | dz enabled
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| D | skeleton.S | 60 | All dz exceptions are 'real', hence no fpsp_dz entry point.
62 .global dz
64 dz: label
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| D | gen_except.S | 20 | dz
170 | operr, and dz. commonE3 does this for E3 exceptions, which
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| /arch/cris/include/uapi/arch-v32/arch/ |
| D | user.h | 31 unsigned long dz; /* P8, Constant zero (32-bits). */ member
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| /arch/m68k/ifpsp060/ |
| D | TEST.DOC | 145 0x10: FP enabled snan/operr/ovfl/unfl/dz/inex
159 FP enabled: tests enabled snan/operr/ovfl/unfl/dz/inex.
162 exercises _fpsp_{snan,operr,ovfl,unfl,dz,inex}() and
163 _real_{snan,operr,ovfl,unfl,dz,inex}(). the test expects
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| /arch/cris/arch-v32/kernel/ |
| D | kgdb.c | 220 unsigned int dz; /* 0x55; P8, 32-bit zero register */ member
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| /arch/m68k/ifpsp060/src/ |
| D | ftest.S | 207 ### dz
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| D | fplsp.S | 436 set adz_bit, 4 # accrued dz bit
457 set dz_mask, 0x00000400 # dz exception mask
516 set DZ_VEC, 0xc8 # dz vector offset
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| D | fpsp.S | 10126 # - Set FPSR exception status dz bit, ccode inf bit, and #
10127 # accrued dz bit. #
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