/arch/mips/include/asm/ |
D | switch_to.h | 84 unsigned long fcr31 = mask_fcr31_x(next->thread.fpu.fcr31); \ 87 if (unlikely(fcr31)) { \ 89 next->thread.fpu.fcr31 &= ~fcr31; \ 90 force_fcr31_sig(fcr31, pc, next); \
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D | fpu.h | 172 tsk->thread.fpu.fcr31 = in lose_fpu_inatomic() 196 unsigned int fcr31 = current->thread.fpu.fcr31; in init_fpu() local 207 _init_fpu(fcr31); in init_fpu() 221 _init_fpu(fcr31); in init_fpu()
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D | fpu_emulator.h | 182 void force_fcr31_sig(unsigned long fcr31, void __user *fault_addr, 185 unsigned long fcr31); 206 static inline unsigned long mask_fcr31_x(unsigned long fcr31) in mask_fcr31_x() argument 208 return fcr31 & (FPU_CSR_UNI_X | in mask_fcr31_x() 209 ((fcr31 & FPU_CSR_ALL_E) << in mask_fcr31_x()
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D | mips-r2-to-r6-emul.h | 88 unsigned long *fcr31) in mipsr2_decoder() argument 96 unsigned long *fcr31);
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D | fpregdef.h | 70 #define fcr31 $31 /* FPU status register */ macro 109 #define fcr31 $31 macro
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D | asmmacro-32.h | 18 cfc1 \tmp, fcr31 59 ctc1 \tmp, fcr31
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D | processor.h | 134 unsigned int fcr31; member 327 .fcr31 = 0, \
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/arch/mips/kernel/ |
D | traps.c | 716 void force_fcr31_sig(unsigned long fcr31, void __user *fault_addr, in force_fcr31_sig() argument 721 if (fcr31 & FPU_CSR_INV_X) in force_fcr31_sig() 723 else if (fcr31 & FPU_CSR_DIV_X) in force_fcr31_sig() 725 else if (fcr31 & FPU_CSR_OVF_X) in force_fcr31_sig() 727 else if (fcr31 & FPU_CSR_UDF_X) in force_fcr31_sig() 729 else if (fcr31 & FPU_CSR_INE_X) in force_fcr31_sig() 736 int process_fpemu_return(int sig, void __user *fault_addr, unsigned long fcr31) in process_fpemu_return() argument 745 force_fcr31_sig(fcr31, fault_addr, current); in process_fpemu_return() 778 unsigned long fcr31; in simulate_fp() local 813 fcr31 = mask_fcr31_x(current->thread.fpu.fcr31); in simulate_fp() [all …]
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D | branch.c | 62 unsigned int fcr31; in __mm_isBranchInstr() local 150 fcr31 = read_32bit_cp1_register(CP1_STATUS); in __mm_isBranchInstr() 152 fcr31 = current->thread.fpu.fcr31; in __mm_isBranchInstr() 156 fcr31 = ~fcr31; in __mm_isBranchInstr() 161 if (fcr31 & (1 << bit)) in __mm_isBranchInstr() 419 unsigned int bit, fcr31, dspcontrol, reg; in __compute_return_epc_for_insn() local 704 fcr31 = read_32bit_cp1_register(CP1_STATUS); in __compute_return_epc_for_insn() 706 fcr31 = current->thread.fpu.fcr31; in __compute_return_epc_for_insn() 715 if (~fcr31 & (1 << bit)) { in __compute_return_epc_for_insn() 727 if (fcr31 & (1 << bit)) { in __compute_return_epc_for_insn()
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D | ptrace32.c | 128 tmp = child->thread.fpu.fcr31; in compat_arch_ptrace() 204 child->thread.fpu.fcr31 = 0; in compat_arch_ptrace() 229 child->thread.fpu.fcr31 = data; in compat_arch_ptrace()
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D | r6000_fpu.S | 31 cfc1 t1,fcr31 87 ctc1 t0,fcr31
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D | ptrace.c | 88 u32 fcr31; in ptrace_setfcr31() local 91 fcr31 = child->thread.fpu.fcr31; in ptrace_setfcr31() 93 child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask); in ptrace_setfcr31() 166 __put_user(child->thread.fpu.fcr31, data + 64); in ptrace_getfpregs() 504 &target->thread.fpu.fcr31, in fpr_get() 576 u32 fcr31; in fpr_set() local 595 &fcr31, in fpr_set() 600 ptrace_setfcr31(target, fcr31); in fpr_set() 863 tmp = child->thread.fpu.fcr31; in arch_ptrace()
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D | elf.c | 318 t->thread.fpu.fcr31 = c->fpu_csr31; in mips_set_personality_nan() 324 t->thread.fpu.fcr31 |= FPU_CSR_NAN2008; in mips_set_personality_nan() 326 t->thread.fpu.fcr31 |= FPU_CSR_ABS2008; in mips_set_personality_nan()
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D | r2300_fpu.S | 34 cfc1 t1,fcr31 123 ctc1 t0,fcr31
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D | kgdb.c | 146 memcpy((void *)¤t->thread.fpu.fcr31, mem, in dbg_set_reg() 181 memcpy(mem, (void *)¤t->thread.fpu.fcr31, in dbg_get_reg()
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D | r2300_switch.S | 104 ctc1 a0, fcr31
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D | mips-r2-to-r6-emul.c | 202 csr = current->thread.fpu.fcr31; in movf_func() 225 csr = current->thread.fpu.fcr31; in movt_func() 904 int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31) in mipsr2_decoder() argument 1190 *fcr31 = res = mask_fcr31_x(current->thread.fpu.fcr31); in mipsr2_decoder() 1191 current->thread.fpu.fcr31 &= ~res; in mipsr2_decoder()
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D | r4k_fpu.S | 50 cfc1 t1, fcr31 169 ctc1 t1, fcr31
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D | r4k_switch.S | 142 ctc1 a0, fcr31
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D | asm-offsets.c | 172 OFFSET(THREAD_FCR31, task_struct, thread.fpu.fcr31); in output_thread_fpu_defines() 433 OFFSET(VCPU_FCR31, kvm_vcpu_arch, fpu.fcr31); in output_kvm_defines()
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/arch/mips/math-emu/ |
D | cp1emu.c | 441 unsigned int fcr31; in isBranchInstr() local 747 fcr31 = read_32bit_cp1_register(CP1_STATUS); in isBranchInstr() 749 fcr31 = current->thread.fpu.fcr31; in isBranchInstr() 758 if (~fcr31 & (1 << bit)) in isBranchInstr() 769 if (fcr31 & (1 << bit)) in isBranchInstr() 864 u32 fcr31 = ctx->fcr31; in cop1_cfc() local 869 value = fcr31; in cop1_cfc() 877 value = (fcr31 >> (FPU_CSR_FS_S - MIPS_FENR_FS_S)) & in cop1_cfc() 879 value |= fcr31 & (FPU_CSR_ALL_E | FPU_CSR_RM); in cop1_cfc() 887 value = fcr31 & (FPU_CSR_ALL_X | FPU_CSR_ALL_S); in cop1_cfc() [all …]
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D | ieee754.h | 166 #define ieee754_csr (*(struct _ieee754_csr *)(¤t->thread.fpu.fcr31))
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/arch/mips/loongson64/loongson-3/ |
D | cop2-ex.c | 46 _init_fpu(current->thread.fpu.fcr31); in loongson_cu2_call()
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/arch/mips/kvm/ |
D | fpu.S | 118 ctc1 t0, fcr31
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D | locore.S | 363 cfc1 t0, fcr31 365 ctc1 zero,fcr31
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