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Searched refs:gic (Results 1 – 25 of 151) sorted by relevance

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/arch/arm64/boot/dts/arm/
Drtsm_ve-aemv8a.dts17 interrupt-parent = <&gic>;
78 gic: interrupt-controller@2c001000 { label
79 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
121 interrupt-map = <0 0 0 &gic 0 0 4>,
122 <0 0 1 &gic 0 1 4>,
123 <0 0 2 &gic 0 2 4>,
124 <0 0 3 &gic 0 3 4>,
125 <0 0 4 &gic 0 4 4>,
126 <0 0 5 &gic 0 5 4>,
127 <0 0 6 &gic 0 6 4>,
[all …]
Dfoundation-v8.dts14 interrupt-parent = <&gic>;
75 gic: interrupt-controller@2c001000 { label
76 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
119 interrupt-map = <0 0 0 &gic 0 0 4>,
120 <0 0 1 &gic 0 1 4>,
121 <0 0 2 &gic 0 2 4>,
122 <0 0 3 &gic 0 3 4>,
123 <0 0 4 &gic 0 4 4>,
124 <0 0 5 &gic 0 5 4>,
125 <0 0 6 &gic 0 6 4>,
[all …]
Dvexpress-v2f-1xv7-ca53x2.dts14 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 interrupt-parent = <&gic>;
66 gic: interrupt-controller@2c001000 { label
67 compatible = "arm,gic-400";
145 interrupt-map = <0 0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
146 <0 0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
147 <0 0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
148 <0 0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
149 <0 0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
150 <0 0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
[all …]
Djuno-base.dtsi32 gic: interrupt-controller@2c010000 { label
33 compatible = "arm,gic-400", "arm,cortex-a15-gic";
45 compatible = "arm,gic-v2m-frame";
198 interrupt-map = <0 0 0 &gic 0 0 0 68 IRQ_TYPE_LEVEL_HIGH>,
199 <0 0 1 &gic 0 0 0 69 IRQ_TYPE_LEVEL_HIGH>,
200 <0 0 2 &gic 0 0 0 70 IRQ_TYPE_LEVEL_HIGH>,
201 <0 0 3 &gic 0 0 0 160 IRQ_TYPE_LEVEL_HIGH>,
202 <0 0 4 &gic 0 0 0 161 IRQ_TYPE_LEVEL_HIGH>,
203 <0 0 5 &gic 0 0 0 162 IRQ_TYPE_LEVEL_HIGH>,
204 <0 0 6 &gic 0 0 0 163 IRQ_TYPE_LEVEL_HIGH>,
[all …]
Djuno-r1.dts11 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 interrupt-parent = <&gic>;
190 interrupt-map = <0 0 0 1 &gic 0 0 0 136 4>,
191 <0 0 0 2 &gic 0 0 0 137 4>,
192 <0 0 0 3 &gic 0 0 0 138 4>,
193 <0 0 0 4 &gic 0 0 0 139 4>;
/arch/arm/boot/dts/
Dvexpress-v2p-ca5s.dts17 interrupt-parent = <&gic>;
105 gic: interrupt-controller@2c001000 { label
106 compatible = "arm,cortex-a5-gic", "arm,cortex-a9-gic";
207 interrupt-map = <0 0 0 &gic 0 0 4>,
208 <0 0 1 &gic 0 1 4>,
209 <0 0 2 &gic 0 2 4>,
210 <0 0 3 &gic 0 3 4>,
211 <0 0 4 &gic 0 4 4>,
212 <0 0 5 &gic 0 5 4>,
213 <0 0 6 &gic 0 6 4>,
[all …]
Dvexpress-v2p-ca15-tc1.dts17 interrupt-parent = <&gic>;
78 gic: interrupt-controller@2c001000 { label
79 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
237 interrupt-map = <0 0 0 &gic 0 0 4>,
238 <0 0 1 &gic 0 1 4>,
239 <0 0 2 &gic 0 2 4>,
240 <0 0 3 &gic 0 3 4>,
241 <0 0 4 &gic 0 4 4>,
242 <0 0 5 &gic 0 5 4>,
243 <0 0 6 &gic 0 6 4>,
[all …]
Dbcm5301x.dtsi14 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
68 gic: interrupt-controller@1000 { label
69 compatible = "arm,cortex-a9-gic";
119 <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
122 <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
123 <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
124 <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
125 <0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
126 <0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
[all …]
Dvexpress-v2p-ca9.dts17 interrupt-parent = <&gic>;
160 gic: interrupt-controller@1e001000 { label
161 compatible = "arm,cortex-a9-gic";
316 interrupt-map = <0 0 0 &gic 0 0 4>,
317 <0 0 1 &gic 0 1 4>,
318 <0 0 2 &gic 0 2 4>,
319 <0 0 3 &gic 0 3 4>,
320 <0 0 4 &gic 0 4 4>,
321 <0 0 5 &gic 0 5 4>,
322 <0 0 6 &gic 0 6 4>,
[all …]
Dvexpress-v2p-ca15_a7.dts17 interrupt-parent = <&gic>;
123 gic: interrupt-controller@2c001000 { label
124 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
595 interrupt-map = <0 0 0 &gic 0 0 4>,
596 <0 0 1 &gic 0 1 4>,
597 <0 0 2 &gic 0 2 4>,
598 <0 0 3 &gic 0 3 4>,
599 <0 0 4 &gic 0 4 4>,
600 <0 0 5 &gic 0 5 4>,
601 <0 0 6 &gic 0 6 4>,
[all …]
Dexynos5410.dtsi21 interrupt-parent = <&gic>;
84 gic: interrupt-controller@10481000 { label
85 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
123 <4 &gic 0 120 0>,
124 <5 &gic 0 121 0>,
125 <6 &gic 0 122 0>,
126 <7 &gic 0 123 0>,
127 <8 &gic 0 128 0>,
128 <9 &gic 0 129 0>,
129 <10 &gic 0 130 0>,
[all …]
Dxenvm-4.2.dts14 interrupt-parent = <&gic>;
53 gic: interrupt-controller@2c001000 { label
54 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
Dmt6580.dtsi16 #include <dt-bindings/interrupt-controller/arm-gic.h>
84 interrupt-parent = <&gic>;
88 gic: interrupt-controller@10211000 { label
89 compatible = "arm,cortex-a7-gic";
92 interrupt-parent = <&gic>;
Dalpine.dtsi27 #include <dt-bindings/interrupt-controller/arm-gic.h>
73 interrupt-parent = <&gic>;
88 gic: gic@fb001000 { label
89 compatible = "arm,cortex-a15-gic";
151 interrupt-map = <0x4000 0 0 1 &gic 0 43 4>,
152 <0x4800 0 0 1 &gic 0 44 4>;
Dmt8127.dtsi16 #include <dt-bindings/interrupt-controller/arm-gic.h>
89 interrupt-parent = <&gic>;
122 interrupt-parent = <&gic>;
126 gic: interrupt-controller@10211000 { label
127 compatible = "arm,cortex-a7-gic";
130 interrupt-parent = <&gic>;
Dmt6592.dtsi16 #include <dt-bindings/interrupt-controller/arm-gic.h>
99 interrupt-parent = <&gic>;
103 gic: interrupt-controller@10211000 { label
104 compatible = "arm,cortex-a7-gic";
107 interrupt-parent = <&gic>;
Dmt6589.dtsi17 #include <dt-bindings/interrupt-controller/arm-gic.h>
95 interrupt-parent = <&gic>;
99 gic: interrupt-controller@10211000 { label
100 compatible = "arm,cortex-a7-gic";
103 interrupt-parent = <&gic>;
Dhip01.dtsi17 interrupt-parent = <&gic>;
21 gic: interrupt-controller@1e001000 { label
22 compatible = "arm,cortex-a9-gic";
40 interrupt-parent = <&gic>;
Dexynos5.dtsi19 interrupt-parent = <&gic>;
49 gic: interrupt-controller@10481000 { label
50 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
Dbcm7445.dtsi1 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 interrupt-parent = <&gic>;
49 gic: interrupt-controller@ffd00000 { label
50 compatible = "brcm,brahma-b15-gic", "arm,cortex-a15-gic";
102 interrupt-parent = <&gic>;
115 interrupt-parent = <&gic>;
132 interrupt-parent = <&gic>;
142 interrupt-parent = <&gic>;
Daxm55xx.dtsi12 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
59 gic: interrupt-controller@2001001000 { label
60 compatible = "arm,cortex-a15-gic";
96 interrupt-parent = <&gic>;
/arch/arm64/boot/dts/xilinx/
Dzynqmp.dtsi67 interrupt-parent = <&gic>;
80 gic: interrupt-controller@f9010000 { label
81 compatible = "arm,gic-400", "arm,cortex-a15-gic";
88 interrupt-parent = <&gic>;
106 interrupt-parent = <&gic>;
118 interrupt-parent = <&gic>;
134 interrupt-parent = <&gic>;
142 interrupt-parent = <&gic>;
154 interrupt-parent = <&gic>;
166 interrupt-parent = <&gic>;
[all …]
/arch/arm64/boot/dts/freescale/
Dfsl-ls2080a.dtsi49 interrupt-parent = <&gic>;
135 gic: interrupt-controller@6000000 { label
136 compatible = "arm,gic-v3";
149 its: gic-its@6020000 {
150 compatible = "arm,gic-v3-its";
407 interrupt-map = <0000 0 0 1 &gic 0 0 0 109 4>,
408 <0000 0 0 2 &gic 0 0 0 110 4>,
409 <0000 0 0 3 &gic 0 0 0 111 4>,
410 <0000 0 0 4 &gic 0 0 0 112 4>;
430 interrupt-map = <0000 0 0 1 &gic 0 0 0 114 4>,
[all …]
/arch/arm64/boot/dts/mediatek/
Dmt6795.dtsi15 #include <dt-bindings/interrupt-controller/arm-gic.h>
109 interrupt-parent = <&gic>;
125 interrupt-parent = <&gic>;
129 gic: interrupt-controller@10221000 { label
130 compatible = "arm,gic-400";
132 interrupt-parent = <&gic>;
/arch/arm64/boot/dts/apm/
Dapm-storm.dtsi14 interrupt-parent = <&gic>;
80 gic: interrupt-controller@78010000 { label
81 compatible = "arm,cortex-a15-gic";
536 interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1
537 0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1
538 0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1
539 0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>;
561 interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc8 0x1
562 0x0 0x0 0x0 0x2 &gic 0x0 0xc9 0x1
563 0x0 0x0 0x0 0x3 &gic 0x0 0xca 0x1
[all …]

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