| /arch/sparc/lib/ |
| D | NGmemcpy.S | 178 or %o0, %i1, %i3
202 LOAD(prefetch, %i1, #one_read)
212 EX_LD(LOAD(ldub, %i1, %g1), NG_ret_i2_plus_i4_plus_1)
214 add %i1, 1, %i1
233 andcc %i1, (16 - 1), %i4
240 sub %i1, %i4, %i1
246 EX_LD(LOAD_TWIN(%i1, %g2, %g3), NG_ret_i2_plus_g1)
264 8: EX_LD(LOAD_TWIN(%i1 + %o4, %o2, %o3), NG_ret_i2_plus_g1)
266 LOAD(prefetch, %i1 + %i3, #one_read)
271 EX_LD(LOAD_TWIN(%i1 + %o5, %g2, %g3), NG_ret_i2_plus_g1_minus_16)
[all …]
|
| D | NGpage.S | 23 prefetch [%i1 + 0x00], #one_read
24 prefetch [%i1 + 0x40], #one_read
26 1: prefetch [%i1 + 0x80], #one_read
27 prefetch [%i1 + 0xc0], #one_read
28 ldda [%i1 + 0x00] %asi, %o2
29 ldda [%i1 + 0x10] %asi, %o4
30 ldda [%i1 + 0x20] %asi, %l2
31 ldda [%i1 + 0x30] %asi, %l4
40 ldda [%i1 + 0x40] %asi, %o2
41 ldda [%i1 + 0x50] %asi, %o4
[all …]
|
| D | memcpy.S | 382 ldub [%i1], %g5
383 add %i1, 1, %i1
389 ldub [%i1], %g3
390 add %i1, 2, %i1
393 ldub [%i1 - 1], %g3
397 and %i1, 3, %g2
399 and %i1, -4, %i1
412 ld [%i1], %i3
414 ld [%i1 + 4], %i4
418 ld [%i1], %i4
[all …]
|
| D | xor.S | 258 ldda [%i1] %asi, %f0
264 add %i1, 64, %i1
293 ldda [%i1] %asi, %f0
303 stda %f48, [%i1 - 64] %asi
343 stda %f48, [%i1] %asi
354 prefetch [%i1], #n_writes
359 mov %i1, %i0
360 mov %i2, %i1
361 1: ldda [%i1 + 0x00] %asi, %i2 /* %i2/%i3 = src + 0x00 */
362 ldda [%i1 + 0x10] %asi, %i4 /* %i4/%i5 = src + 0x10 */
[all …]
|
| D | muldi3.S | 25 wr %g0, %i1, %y
27 and %i1, %g2, %g2
65 mov %i1, %o0
|
| D | divdi3.S | 29 sub %g0,%i1,%o0
35 mov %o5,%i1
52 mov %i1,%i3
269 mov %l1,%i1
272 sub %g0,%i1,%o0
278 mov %l3,%i1
|
| /arch/arm64/crypto/ |
| D | aes-ce.S | 47 .macro do_enc_Nx, de, mc, k, i0, i1, i2, i3
50 .ifnb \i1
51 aes\de \i1\().16b, \k\().16b
52 aes\mc \i1\().16b, \i1\().16b
63 .macro round_Nx, enc, k, i0, i1, i2, i3
65 do_enc_Nx e, mc, \k, \i0, \i1, \i2, \i3
67 do_enc_Nx d, imc, \k, \i0, \i1, \i2, \i3
72 .macro fin_round_Nx, de, k, k2, i0, i1, i2, i3
74 .ifnb \i1
75 aes\de \i1\().16b, \k\().16b
[all …]
|
| /arch/arm64/kvm/ |
| D | sys_regs.h | 120 static inline int cmp_sys_reg(const struct sys_reg_desc *i1, in cmp_sys_reg() argument
123 BUG_ON(i1 == i2); in cmp_sys_reg()
124 if (!i1) in cmp_sys_reg()
128 if (i1->Op0 != i2->Op0) in cmp_sys_reg()
129 return i1->Op0 - i2->Op0; in cmp_sys_reg()
130 if (i1->Op1 != i2->Op1) in cmp_sys_reg()
131 return i1->Op1 - i2->Op1; in cmp_sys_reg()
132 if (i1->CRn != i2->CRn) in cmp_sys_reg()
133 return i1->CRn - i2->CRn; in cmp_sys_reg()
134 if (i1->CRm != i2->CRm) in cmp_sys_reg()
[all …]
|
| D | sys_regs.c | 1617 const struct sys_reg_desc *i1, *i2, *end1, *end2; in walk_sys_regs() local
1622 i1 = get_target_table(vcpu->arch.target, true, &num); in walk_sys_regs()
1623 end1 = i1 + num; in walk_sys_regs()
1627 BUG_ON(i1 == end1 || i2 == end2); in walk_sys_regs()
1630 while (i1 || i2) { in walk_sys_regs()
1631 int cmp = cmp_sys_reg(i1, i2); in walk_sys_regs()
1635 if (i1->reg) { in walk_sys_regs()
1636 if (!copy_reg_to_user(i1, &uind)) in walk_sys_regs()
1649 if (cmp <= 0 && ++i1 == end1) in walk_sys_regs()
1650 i1 = NULL; in walk_sys_regs()
|
| /arch/arm/kvm/ |
| D | coproc.h | 128 static inline int cmp_reg(const struct coproc_reg *i1, in cmp_reg() argument
131 BUG_ON(i1 == i2); in cmp_reg()
132 if (!i1) in cmp_reg()
136 if (i1->CRn != i2->CRn) in cmp_reg()
137 return i1->CRn - i2->CRn; in cmp_reg()
138 if (i1->CRm != i2->CRm) in cmp_reg()
139 return i1->CRm - i2->CRm; in cmp_reg()
140 if (i1->Op1 != i2->Op1) in cmp_reg()
141 return i1->Op1 - i2->Op1; in cmp_reg()
142 if (i1->Op2 != i2->Op2) in cmp_reg()
[all …]
|
| D | coproc.c | 1135 const struct coproc_reg *i1, *i2, *end1, *end2; in walk_cp15() local
1140 i1 = get_target_table(vcpu->arch.target, &num); in walk_cp15()
1141 end1 = i1 + num; in walk_cp15()
1145 BUG_ON(i1 == end1 || i2 == end2); in walk_cp15()
1148 while (i1 || i2) { in walk_cp15()
1149 int cmp = cmp_reg(i1, i2); in walk_cp15()
1153 if (i1->reg) { in walk_cp15()
1154 if (!copy_reg_to_user(i1, &uind)) in walk_cp15()
1167 if (cmp <= 0 && ++i1 == end1) in walk_cp15()
1168 i1 = NULL; in walk_cp15()
|
| /arch/arm/kernel/ |
| D | insn.c | 8 unsigned long s, j1, j2, i1, i2, imm10, imm11; in __arm_gen_branch_thumb2() local
19 i1 = (offset >> 23) & 0x1; in __arm_gen_branch_thumb2()
24 j1 = (!i1) ^ s; in __arm_gen_branch_thumb2()
|
| /arch/cris/arch-v10/kernel/ |
| D | time.c | 149 IO_STATE( R_TIMER_CTRL, i1, clr) | in timer_interrupt()
204 IO_STATE( R_TIMER_CTRL, i1, nop) | in time_init()
214 IO_STATE( R_TIMER_CTRL, i1, nop) | in time_init()
224 IO_STATE(R_TIMER_CTRL, i1, nop) | in time_init()
234 IO_STATE(R_TIMER_CTRL, i1, nop) | in time_init()
|
| /arch/parisc/math-emu/ |
| D | fpudispatch.c | 1129 struct { u_int i1; u_int i2; } ints; member
1156 &mtmp.ints.i1,&status))
1159 &atmp.ints.i1,&atmp.ints.i1,&status))
1164 if (dbl_fmpy(&fpregs[rm1],&fpregs[rm2],&mtmp.ints.i1,
1167 if (dbl_fadd(&fpregs[ta], &fpregs[ra], &atmp.ints.i1,
1179 if (dbl_fmpy(&fpregs[rm1],&fpregs[rm2],&mtmp.ints.i1,
1182 if (dbl_fadd(&fpregs[ta], &fpregs[ra], &atmp.ints.i1,
1192 fpregs[tm] = mtmp.ints.i1;
1194 fpregs[ta] = atmp.ints.i1;
1226 if (sgl_fmpy(&fpregs[rm1],&fpregs[rm2],&mtmp.ints.i1,
[all …]
|
| /arch/ia64/include/asm/ |
| D | kprobes.h | 35 #define BRL_INST(i1, i2) ((long)((0xcL << 37) | /* brl */ \ argument
37 (((i1) & 1) << 36) | ((i2) << 13))) /* imm */
|
| /arch/sparc/kernel/ |
| D | syscalls.S | 167 ldx [%sp + PTREGS_OFF + PT_V9_I1], %i1
181 srl %i1, 0, %o1
197 ldx [%sp + PTREGS_OFF + PT_V9_I1], %i1
210 mov %i1, %o1
228 srl %i1, 0, %o1 ! IEU0 Group
250 mov %i1, %o1 ! IEU1
|
| D | winfixup.S | 64 stx %i1, [%g3 + TI_REG_WINDOW + 0x48]
81 stw %i1, [%g3 + TI_REG_WINDOW + 0x24]
|
| D | rtrap_64.S | 165 LOAD_PER_CPU_BASE(%g5, %g6, %i0, %i1, %i2)
182 ldx [%sp + PTREGS_OFF + PT_V9_I1], %i1
|
| /arch/blackfin/include/asm/ |
| D | context.S | 28 [--sp] = i1;
100 [--sp] = i1;
159 [--sp] = i1;
268 i1 = [sp++]; define
338 i1 = [sp++]; define
|
| /arch/sparc/include/asm/ |
| D | ttable.h | 244 stx %i1, [%sp + STACK_BIAS + 0x48]; \
265 stx %i1, [%sp + STACK_BIAS + 0x48]; \
296 stxa %i1, [%g1 + %g3] ASI; \
323 stxa %i1, [%sp + STACK_BIAS + 0x48] %asi; \
357 stx %i1, [%g3 + TI_REG_WINDOW + 0x48]; \
392 stwa %i1, [%g1 + %g3] ASI; \
422 stwa %i1, [%sp + 0x24] %asi; \
456 stw %i1, [%g3 + TI_REG_WINDOW + 0x24]; \
500 ldx [%sp + STACK_BIAS + 0x48], %i1; \
524 ldx [%sp + STACK_BIAS + 0x48], %i1; \
[all …]
|
| /arch/sparc/prom/ |
| D | cif.S | 39 ldx [%i1 + 0x000], %l2
|
| /arch/blackfin/include/uapi/asm/ |
| D | ptrace.h | 67 long i1; member
|
| /arch/blackfin/kernel/ |
| D | signal.c | 65 RESTORE(i0); RESTORE(i1); RESTORE(i2); RESTORE(i3); in rt_restore_sigcontext()
126 SETUP(i0); SETUP(i1); SETUP(i2); SETUP(i3); in rt_setup_sigcontext()
|
| D | kgdb.c | 33 gdb_regs[BFIN_I1] = regs->i1; in pt_regs_to_gdb_regs()
109 regs->i1 = gdb_regs[BFIN_I1]; in gdb_regs_to_pt_regs()
|
| /arch/arm/crypto/ |
| D | aes-armv4.S | 279 and r8,lr,r2,lsr#16 @ i1
292 and r8,lr,r3,lsr#8 @ i1
341 and r8,lr,r2,lsr#16 @ i1
354 and r8,lr,r3,lsr#8 @ i1
974 and r8,lr,r2 @ i1
987 and r8,lr,r3,lsr#8 @ i1
1047 and r8,lr,r2 @ i1
1061 and r8,lr,r3,lsr#8 @ i1
|