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Searched refs:timer (Results 1 – 25 of 399) sorted by relevance

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/arch/arm/plat-omap/
Ddmtimer.c71 static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) in omap_dm_timer_read_reg() argument
74 return __omap_dm_timer_read(timer, reg, timer->posted); in omap_dm_timer_read_reg()
87 static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg, in omap_dm_timer_write_reg() argument
91 __omap_dm_timer_write(timer, reg, value, timer->posted); in omap_dm_timer_write_reg()
94 static void omap_timer_restore_context(struct omap_dm_timer *timer) in omap_timer_restore_context() argument
96 omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, in omap_timer_restore_context()
97 timer->context.twer); in omap_timer_restore_context()
98 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, in omap_timer_restore_context()
99 timer->context.tcrr); in omap_timer_restore_context()
100 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, in omap_timer_restore_context()
[all …]
/arch/arm/plat-omap/include/plat/
Ddmtimer.h132 int omap_dm_timer_free(struct omap_dm_timer *timer);
133 void omap_dm_timer_enable(struct omap_dm_timer *timer);
134 void omap_dm_timer_disable(struct omap_dm_timer *timer);
136 int omap_dm_timer_get_irq(struct omap_dm_timer *timer);
139 struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer);
141 int omap_dm_timer_trigger(struct omap_dm_timer *timer);
142 int omap_dm_timer_start(struct omap_dm_timer *timer);
143 int omap_dm_timer_stop(struct omap_dm_timer *timer);
145 int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source);
146 int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value);
[all …]
/arch/mips/include/asm/mach-jz4740/
Dtimer.h64 static inline void jz4740_timer_stop(unsigned int timer) in jz4740_timer_stop() argument
66 writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_SET); in jz4740_timer_stop()
69 static inline void jz4740_timer_start(unsigned int timer) in jz4740_timer_start() argument
71 writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR); in jz4740_timer_start()
74 static inline bool jz4740_timer_is_enabled(unsigned int timer) in jz4740_timer_is_enabled() argument
76 return readb(jz4740_timer_base + JZ_REG_TIMER_ENABLE) & BIT(timer); in jz4740_timer_is_enabled()
79 static inline void jz4740_timer_enable(unsigned int timer) in jz4740_timer_enable() argument
81 writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_SET); in jz4740_timer_enable()
84 static inline void jz4740_timer_disable(unsigned int timer) in jz4740_timer_disable() argument
86 writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_CLEAR); in jz4740_timer_disable()
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/arch/s390/kernel/
Dvtime.c35 u64 timer; in get_vtimer() local
37 asm volatile("stpt %0" : "=m" (timer)); in get_vtimer()
38 return timer; in get_vtimer()
43 u64 timer; in set_vtimer() local
48 : "=m" (timer) : "m" (expires)); in set_vtimer()
49 S390_lowcore.system_timer += S390_lowcore.last_update_timer - timer; in set_vtimer()
98 u64 timer, clock, user, system, steal; in do_account_vtime() local
101 timer = S390_lowcore.last_update_timer; in do_account_vtime()
112 S390_lowcore.system_timer += timer - S390_lowcore.last_update_timer; in do_account_vtime()
181 u64 timer, system, system_scaled; in vtime_account_irq_enter() local
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/arch/nios2/kernel/
Dtime.c42 struct nios2_timer timer; member
47 struct nios2_timer timer; member
63 static u16 timer_readw(struct nios2_timer *timer, u32 offs) in timer_readw() argument
65 return readw(timer->base + offs); in timer_readw()
68 static void timer_writew(struct nios2_timer *timer, u16 val, u32 offs) in timer_writew() argument
70 writew(val, timer->base + offs); in timer_writew()
73 static inline unsigned long read_timersnapshot(struct nios2_timer *timer) in read_timersnapshot() argument
77 timer_writew(timer, 0, ALTERA_TIMER_SNAPL_REG); in read_timersnapshot()
78 count = timer_readw(timer, ALTERA_TIMER_SNAPH_REG) << 16 | in read_timersnapshot()
79 timer_readw(timer, ALTERA_TIMER_SNAPL_REG); in read_timersnapshot()
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/arch/powerpc/sysdev/
Dfsl_mpic_timer_wakeup.c23 struct mpic_timer *timer; member
37 if (wakeup->timer) { in fsl_free_resource()
38 disable_irq_wake(wakeup->timer->irq); in fsl_free_resource()
39 mpic_free_timer(wakeup->timer); in fsl_free_resource()
42 wakeup->timer = NULL; in fsl_free_resource()
52 return wakeup->timer ? IRQ_HANDLED : IRQ_NONE; in fsl_mpic_timer_irq()
63 if (fsl_wakeup->timer) { in fsl_timer_wakeup_show()
64 mpic_get_remain_time(fsl_wakeup->timer, &interval); in fsl_timer_wakeup_show()
86 if (fsl_wakeup->timer) { in fsl_timer_wakeup_store()
87 disable_irq_wake(fsl_wakeup->timer->irq); in fsl_timer_wakeup_store()
[all …]
Dmpic_timer.c72 struct mpic_timer timer[TIMERS_PER_GROUP]; member
159 priv->timer[num].cascade_handle = casc_priv; in detect_idle_cascade_timer()
164 return &priv->timer[num]; in detect_idle_cascade_timer()
182 casc_priv = priv->timer[num].cascade_handle; in set_cascade_timer()
229 struct mpic_timer *timer; in get_timer() local
246 timer = get_cascade_timer(priv, ticks); in get_timer()
247 if (!timer) in get_timer()
250 return timer; in get_timer()
264 priv->timer[num].cascade_handle = NULL; in get_timer()
266 return &priv->timer[num]; in get_timer()
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/arch/c6x/platforms/
Dtimer64.c35 static struct timer_regs __iomem *timer; variable
69 ((soc_readl(&timer->emumgt) & (0xf << 16)) >> 16)
82 u32 tcr = soc_readl(&timer->tcr) & ~TCR_ENAMODELO_MASK; in timer64_config()
84 soc_writel(tcr, &timer->tcr); in timer64_config()
85 soc_writel(period - 1, &timer->prdlo); in timer64_config()
86 soc_writel(0, &timer->cntlo); in timer64_config()
88 soc_writel(tcr, &timer->tcr); in timer64_config()
99 soc_writel(soc_readl(&timer->tcr) & ~TCR_ENAMODELO_MASK, &timer->tcr); in timer64_enable()
100 soc_writel(0, &timer->prdlo); in timer64_enable()
103 val = soc_readl(&timer->tcr); in timer64_enable()
[all …]
/arch/arm/mach-omap1/
Dtime.c74 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); in omap_mpu_timer_read() local
75 return readl(&timer->read_tim); in omap_mpu_timer_read()
80 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); in omap_mpu_set_autoreset() local
82 writel(readl(&timer->cntl) | MPU_TIMER_AR, &timer->cntl); in omap_mpu_set_autoreset()
87 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); in omap_mpu_remove_autoreset() local
89 writel(readl(&timer->cntl) & ~MPU_TIMER_AR, &timer->cntl); in omap_mpu_remove_autoreset()
95 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); in omap_mpu_timer_start() local
101 writel(MPU_TIMER_CLOCK_ENABLE, &timer->cntl); in omap_mpu_timer_start()
103 writel(load_val, &timer->load_tim); in omap_mpu_timer_start()
105 writel(timerflags, &timer->cntl); in omap_mpu_timer_start()
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/arch/arm/boot/dts/
Domap2.dtsi182 timer2: timer@4802a000 {
183 compatible = "ti,omap2420-timer";
189 timer3: timer@48078000 {
190 compatible = "ti,omap2420-timer";
196 timer4: timer@4807a000 {
197 compatible = "ti,omap2420-timer";
203 timer5: timer@4807c000 {
204 compatible = "ti,omap2420-timer";
208 ti,timer-dsp;
211 timer6: timer@4807e000 {
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Dberlin2cd.dtsi117 local-timer@ad0600 {
118 compatible = "arm,cortex-a9-twd-timer";
256 timer0: timer@2c00 {
257 compatible = "snps,dw-apb-timer";
261 clock-names = "timer";
265 timer1: timer@2c14 {
266 compatible = "snps,dw-apb-timer";
270 clock-names = "timer";
274 timer2: timer@2c28 {
275 compatible = "snps,dw-apb-timer";
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/arch/s390/include/asm/
Dvtimer.h21 extern void init_virt_timer(struct vtimer_list *timer);
22 extern void add_virt_timer(struct vtimer_list *timer);
23 extern void add_virt_timer_periodic(struct vtimer_list *timer);
24 extern int mod_virt_timer(struct vtimer_list *timer, u64 expires);
25 extern int mod_virt_timer_periodic(struct vtimer_list *timer, u64 expires);
26 extern int del_virt_timer(struct vtimer_list *timer);
/arch/xtensa/kernel/
Dtime.c86 struct ccount_timer *timer = in ccount_timer_shutdown() local
89 if (timer->irq_enabled) { in ccount_timer_shutdown()
91 timer->irq_enabled = 0; in ccount_timer_shutdown()
98 struct ccount_timer *timer = in ccount_timer_set_oneshot() local
101 if (!timer->irq_enabled) { in ccount_timer_set_oneshot()
103 timer->irq_enabled = 1; in ccount_timer_set_oneshot()
117 struct ccount_timer *timer = &per_cpu(ccount_timer, cpu); in local_timer_setup() local
118 struct clock_event_device *clockevent = &timer->evt; in local_timer_setup()
120 timer->irq_enabled = 1; in local_timer_setup()
121 clockevent->name = timer->name; in local_timer_setup()
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/arch/cris/arch-v32/kernel/
Dtime.c64 data = REG_RD(timer, regi_timer0, r_tmr0_data); in get_ns_in_jiffie()
112 REG_WR(timer, regi_timer0, rw_wd_ctrl, wd_ctrl); in reset_watchdog()
127 REG_WR(timer, regi_timer0, rw_wd_ctrl, wd_ctrl); in stop_watchdog()
182 REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl); in crisv32_clkevt_switch_state()
194 REG_WR(timer, timer_base, rw_tmr0_div, evt); in crisv32_clkevt_next_event()
195 REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl); in crisv32_clkevt_next_event()
198 REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl); in crisv32_clkevt_next_event()
213 intr = REG_RD(timer, timer_base, r_masked_intr); in crisv32_timer_interrupt()
217 REG_WR(timer, timer_base, rw_tmr0_ctrl, ctrl); in crisv32_timer_interrupt()
218 REG_WR(timer, timer_base, rw_ack_intr, ack); in crisv32_timer_interrupt()
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/arch/c6x/boot/dts/
Devmc6678.dts39 timer8: timer@2280000 {
44 timer9: timer@2290000 {
49 timer10: timer@22A0000 {
54 timer11: timer@22B0000 {
59 timer12: timer@22C0000 {
64 timer13: timer@22D0000 {
69 timer14: timer@22E0000 {
74 timer15: timer@22F0000 {
Devmc6472.dts39 timer0: timer@25e0000 {
44 timer1: timer@25f0000 {
49 timer2: timer@2600000 {
54 timer3: timer@2610000 {
59 timer4: timer@2620000 {
64 timer5: timer@2630000 {
Dtms320c6678.dtsi78 timer8: timer@2280000 {
84 timer9: timer@2290000 {
90 timer10: timer@22A0000 {
96 timer11: timer@22B0000 {
102 timer12: timer@22C0000 {
108 timer13: timer@22D0000 {
114 timer14: timer@22E0000 {
120 timer15: timer@22F0000 {
/arch/powerpc/oprofile/cell/
Dspu_profiler.c137 static enum hrtimer_restart profile_spus(struct hrtimer *timer) in profile_spus() argument
186 hrtimer_forward(timer, timer->base->get_time(), kt); in profile_spus()
194 static struct hrtimer timer; variable
208 hrtimer_init(&timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); in start_spu_profiling_cycles()
209 hrtimer_set_expires(&timer, kt); in start_spu_profiling_cycles()
210 timer.function = profile_spus; in start_spu_profiling_cycles()
220 hrtimer_start(&timer, kt, HRTIMER_MODE_REL); in start_spu_profiling_cycles()
244 hrtimer_cancel(&timer); in stop_spu_profiling_cycles()
/arch/x86/kernel/
Dapb_timer.c62 struct dw_apb_clock_event_device *timer; member
151 adev->timer = dw_apb_clockevent_init(smp_processor_id(), "apbt0", in apbt_clockevent_register()
156 adev->timer->eoi = NULL; in apbt_clockevent_register()
159 global_clock_event = &adev->timer->ced; in apbt_clockevent_register()
164 dw_apb_clockevent_register(adev->timer); in apbt_clockevent_register()
190 if (!adev->timer) { in apbt_setup_secondary_clock()
191 adev->timer = dw_apb_clockevent_init(cpu, adev->name, in apbt_setup_secondary_clock()
194 adev->timer->eoi = NULL; in apbt_setup_secondary_clock()
196 dw_apb_clockevent_resume(adev->timer); in apbt_setup_secondary_clock()
203 dw_apb_clockevent_register(adev->timer); in apbt_setup_secondary_clock()
[all …]
/arch/arm/mach-footbridge/
DMakefile15 obj-$(CONFIG_ARCH_CATS) += cats-hw.o isa-timer.o
16 obj-$(CONFIG_ARCH_EBSA285) += ebsa285.o dc21285-timer.o
17 obj-$(CONFIG_ARCH_NETWINDER) += netwinder-hw.o isa-timer.o
18 obj-$(CONFIG_ARCH_PERSONAL_SERVER) += personal.o dc21285-timer.o
/arch/arm/lib/
Ddelay.c77 void __init register_current_timer_delay(const struct delay_timer *timer) in register_current_timer_delay() argument
82 clocks_calc_mult_shift(&new_mult, &new_shift, timer->freq, in register_current_timer_delay()
88 timer, res); in register_current_timer_delay()
94 delay_timer = timer; in register_current_timer_delay()
95 lpj_fine = timer->freq / HZ; in register_current_timer_delay()
/arch/arm/mach-omap2/
Dtimer.c232 static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, in omap_dm_timer_init_one() argument
255 timer->irq = irq_of_parse_and_map(np, 0); in omap_dm_timer_init_one()
256 if (!timer->irq) in omap_dm_timer_init_one()
259 timer->io_base = of_iomap(np, 0); in omap_dm_timer_init_one()
263 if (omap_dm_timer_reserve_systimer(timer->id)) in omap_dm_timer_init_one()
266 sprintf(name, "timer%d", timer->id); in omap_dm_timer_init_one()
281 timer->irq = irq.start; in omap_dm_timer_init_one()
289 timer->io_base = ioremap(mem.start, mem.end - mem.start); in omap_dm_timer_init_one()
292 if (!timer->io_base) in omap_dm_timer_init_one()
296 timer->fclk = clk_get(NULL, omap_hwmod_get_main_clk(oh)); in omap_dm_timer_init_one()
[all …]
/arch/mips/include/asm/netlogic/xlr/
Dpic.h267 nlm_pic_read_timer(uint64_t base, int timer) in nlm_pic_read_timer() argument
271 up1 = nlm_read_reg(base, PIC_TIMER_COUNT_1(timer)); in nlm_pic_read_timer()
272 low = nlm_read_reg(base, PIC_TIMER_COUNT_0(timer)); in nlm_pic_read_timer()
273 up2 = nlm_read_reg(base, PIC_TIMER_COUNT_1(timer)); in nlm_pic_read_timer()
276 low = nlm_read_reg(base, PIC_TIMER_COUNT_0(timer)); in nlm_pic_read_timer()
282 nlm_pic_read_timer32(uint64_t base, int timer) in nlm_pic_read_timer32() argument
284 return nlm_read_reg(base, PIC_TIMER_COUNT_0(timer)); in nlm_pic_read_timer32()
288 nlm_pic_set_timer(uint64_t base, int timer, uint64_t value, int irq, int cpu) in nlm_pic_set_timer() argument
297 nlm_write_reg(base, PIC_TIMER_MAXVAL_0(timer), low); in nlm_pic_set_timer()
298 nlm_write_reg(base, PIC_TIMER_MAXVAL_1(timer), up); in nlm_pic_set_timer()
[all …]
/arch/mips/lasat/
Dpicvue_proc.c30 static struct timer_list timer; variable
116 del_timer(&timer); in pvc_scroll_proc_write()
129 add_timer(&timer); in pvc_scroll_proc_write()
166 timer.expires = jiffies + scroll_interval; in pvc_proc_timerfunc()
167 add_timer(&timer); in pvc_proc_timerfunc()
178 del_timer_sync(&timer); in pvc_proc_cleanup()
205 init_timer(&timer); in pvc_proc_init()
206 timer.function = pvc_proc_timerfunc; in pvc_proc_init()
/arch/um/os-Linux/
Dtime.c43 int os_timer_create(void* timer) { in os_timer_create() argument
45 timer_t* t = timer; in os_timer_create()
60 int os_timer_set_interval(void* timer, void* i) in os_timer_set_interval() argument
64 timer_t* t = timer; in os_timer_set_interval()
100 long os_timer_remain(void* timer) in os_timer_remain() argument
103 timer_t* t = timer; in os_timer_remain()

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