| /arch/powerpc/sysdev/ |
| D | fsl_gtm.c | 76 struct gtm_timer timers[4]; member
99 for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) { in gtm_get_timer16()
100 if (!gtm->timers[i].requested) { in gtm_get_timer16()
101 gtm->timers[i].requested = true; in gtm_get_timer16()
103 return >m->timers[i]; in gtm_get_timer16()
136 if (gtm->timers[timer].requested) in gtm_get_specific_timer16()
139 ret = >m->timers[timer]; in gtm_get_specific_timer16()
173 int num = tmr - >m->timers[0]; in gtm_set_ref_timer16()
309 int num = tmr - >m->timers[0]; in gtm_stop_timer16()
337 struct gtm_timer *timers, in gtm_set_shortcuts() argument
[all …]
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| /arch/arm/mach-davinci/ |
| D | time.c | 102 static struct timer_s timers[]; variable
127 soc_info->timer_info->timers; in timer32_config()
128 int event_timer = ID_TO_TIMER(timers[TID_CLOCKEVENT].id); in timer32_config()
179 static struct timer_s timers[] = { variable
202 struct davinci_timer_instance *dtip = soc_info->timer_info->timers; in timer_init()
236 for (i=0; i< ARRAY_SIZE(timers); i++) { in timer_init()
237 struct timer_s *t = &timers[i]; in timer_init()
273 struct timer_s *t = &timers[TID_CLOCKSOURCE]; in read_cycles()
290 return timer32_read(&timers[TID_CLOCKSOURCE]); in davinci_read_sched_clock()
299 struct timer_s *t = &timers[TID_CLOCKEVENT]; in davinci_set_next_event()
[all …]
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| /arch/m68k/coldfire/ |
| D | Makefile | 18 obj-$(CONFIG_M5206) += m5206.o timers.o intc.o reset.o
19 obj-$(CONFIG_M5206e) += m5206.o timers.o intc.o reset.o
22 obj-$(CONFIG_M5249) += m5249.o timers.o intc.o intc-5249.o reset.o
23 obj-$(CONFIG_M525x) += m525x.o timers.o intc.o intc-525x.o reset.o
25 obj-$(CONFIG_M5272) += m5272.o intc-5272.o timers.o
27 obj-$(CONFIG_M5307) += m5307.o timers.o intc.o reset.o
28 obj-$(CONFIG_M53xx) += m53xx.o timers.o intc-simr.o reset.o
29 obj-$(CONFIG_M5407) += m5407.o timers.o intc.o reset.o
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| /arch/x86/platform/intel-mid/ |
| D | intel-mid.c | 99 x86_init.timers.setup_percpu_clockev = intel_mid_setup_bp_timer; in intel_mid_time_init()
106 x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock; in intel_mid_time_init()
111 x86_init.timers.setup_percpu_clockev = apbt_time_init; in intel_mid_time_init()
175 x86_init.timers.timer_init = intel_mid_time_init; in x86_intel_mid_early_setup()
176 x86_init.timers.setup_percpu_clockev = x86_init_noop; in x86_intel_mid_early_setup()
186 x86_init.timers.wallclock_init = intel_mid_rtc_init; in x86_intel_mid_early_setup()
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| /arch/arc/kernel/ |
| D | setup.c | 57 READ_BCR(ARC_REG_TIMERS_BCR, cpu->timers); in read_arc_build_cfg_regs()
212 IS_AVAIL1(cpu->timers.t0, "Timer0 "), in arc_cpu_mumbojumbo()
213 IS_AVAIL1(cpu->timers.t1, "Timer1 "), in arc_cpu_mumbojumbo()
214 IS_AVAIL2(cpu->timers.rtc, "64-bit RTC ", in arc_cpu_mumbojumbo()
295 if (!cpu->timers.t0) in arc_chk_core_config()
298 if (!cpu->timers.t1) in arc_chk_core_config()
301 if (IS_ENABLED(CONFIG_ARC_HAS_RTC) && !cpu->timers.rtc) in arc_chk_core_config()
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| /arch/m68k/68000/ |
| D | Makefile | 12 obj-y += entry.o ints.o timers.o
|
| /arch/x86/kernel/ |
| D | time.c | 82 x86_init.timers.timer_init(); in x86_late_time_init()
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| D | x86_init.c | 69 .timers = {
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| D | hpet.c | 141 u32 i, timers, l, h; in _hpet_print_config() local
145 timers = ((l & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1; in _hpet_print_config()
154 for (i = 0; i < timers; i++) { in _hpet_print_config()
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| /arch/arm/mach-davinci/include/mach/ |
| D | common.h | 34 struct davinci_timer_instance *timers; member
|
| /arch/x86/xen/ |
| D | time.c | 495 x86_init.timers.timer_init = xen_time_init; in xen_init_time_ops()
496 x86_init.timers.setup_percpu_clockev = x86_init_noop; in xen_init_time_ops()
533 x86_init.timers.setup_percpu_clockev = xen_time_init; in xen_hvm_init_time_ops()
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| /arch/x86/include/asm/ |
| D | x86_init.h | 128 struct x86_init_timers timers; member
|
| /arch/powerpc/kvm/ |
| D | mpic.c | 230 } timers[MAX_TMR]; member
555 opp->timers[i].tccr = 0; in openpic_reset()
556 opp->timers[i].tbcr = TBCR_CI; in openpic_reset()
831 if ((opp->timers[idx].tccr & TCCR_TOG) != 0 && in openpic_tmr_write()
833 (opp->timers[idx].tbcr & TBCR_CI) != 0) in openpic_tmr_write()
834 opp->timers[idx].tccr &= ~TCCR_TOG; in openpic_tmr_write()
836 opp->timers[idx].tbcr = val; in openpic_tmr_write()
868 retval = opp->timers[idx].tccr; in openpic_tmr_read()
871 retval = opp->timers[idx].tbcr; in openpic_tmr_read()
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| /arch/arm/boot/dts/ |
| D | s3c2416.dtsi | 48 clock-names = "timers";
|
| D | stih407-clock.dtsi | 25 * ARM Peripheral clock for timers
68 * ARM Peripheral clock for timers
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| D | stih410-clock.dtsi | 28 * ARM Peripheral clock for timers
70 * ARM Peripheral clock for timers
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| D | stih418-clock.dtsi | 28 * ARM Peripheral clock for timers
70 * ARM Peripheral clock for timers
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| D | kirkwood-netxbig.dtsi | 127 timers = <NETXBIG_LED_TIMER1 500 500
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| D | s3c64xx.dtsi | 171 clock-names = "timers";
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| /arch/mips/dec/ |
| D | int-handler.S | 235 FEXPORT(cpu_all_int) # HALT, timers, software junk
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| /arch/arc/include/asm/ |
| D | arcregs.h | 352 struct bcr_timer timers; member
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| /arch/mips/include/asm/ip32/ |
| D | mace.h | 301 struct mace_timers timers; member
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| /arch/mips/loongson64/ |
| D | Kconfig | 104 switched on you can not use high resolution timers.
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| /arch/frv/kernel/ |
| D | head-uc-fr451.S | 163 # turn on the timers as appropriate
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| /arch/powerpc/boot/dts/ |
| D | mucmc52.dts | 22 /* Disabled timers */
|