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Searched refs:uartclk (Results 1 – 25 of 93) sorted by relevance

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/arch/mips/loongson64/common/
Dserial.c25 .uartclk = clk, \
34 .uartclk = clk, \
76 if (loongson_sysconf.uarts[0].uartclk) in serial_init()
77 uart8250_data[mips_machtype][0].uartclk = in serial_init()
78 loongson_sysconf.uarts[0].uartclk; in serial_init()
99 uart8250_data[mips_machtype][i].uartclk = in serial_init()
100 loongson_sysconf.uarts[i].uartclk; in serial_init()
/arch/mips/pmcs-msp71xx/
Dmsp_serial.c96 unsigned int uartclk; in msp_serial_setup() local
102 if(!(s && *s && (uartclk = simple_strtoul(s, &endp, 10)) && *endp == 0)) in msp_serial_setup()
103 uartclk = MSP_BASE_BAUD; in msp_serial_setup()
104 ppfinit("UART clock set to %d\n", uartclk); in msp_serial_setup()
110 up.uartclk = uartclk; in msp_serial_setup()
/arch/arm/mach-pxa/
Dcapc7117.c89 .uartclk = TI16C752_UARTCLK
98 .uartclk = TI16C752_UARTCLK
107 .uartclk = TI16C752_UARTCLK
116 .uartclk = TI16C752_UARTCLK
Dzeus.c243 .uartclk = 14745600,
252 .uartclk = 14745600,
261 .uartclk = 14745600,
270 .uartclk = 14745600,
280 .uartclk = 921600 * 16,
289 .uartclk = 921600 * 16,
298 .uartclk = 921600 * 16,
/arch/arm/mach-omap1/
Dserial.c74 .uartclk = OMAP16XX_BASE_BAUD * 16,
82 .uartclk = OMAP16XX_BASE_BAUD * 16,
90 .uartclk = OMAP16XX_BASE_BAUD * 16,
120 serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16; in omap_serial_init()
121 serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16; in omap_serial_init()
122 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; in omap_serial_init()
/arch/mips/ath25/
Ddevices.c73 void __init ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk) in ath25_serial_setup() argument
84 s.uartclk = uartclk; in ath25_serial_setup()
Ddevices.h30 void ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk);
/arch/arm/boot/dts/
Dintegratorcp.dts46 uartclk: uartclk@14.74M { label
165 clocks = <&uartclk>, <&pclk>;
166 clock-names = "uartclk", "apb_pclk";
171 clocks = <&uartclk>, <&pclk>;
172 clock-names = "uartclk", "apb_pclk";
195 clocks = <&uartclk>, <&pclk>;
Dintegratorap.dts38 uartclk: uartclk@14.74M { label
128 clocks = <&uartclk>, <&pclk>;
129 clock-names = "uartclk", "apb_pclk";
135 clocks = <&uartclk>, <&pclk>;
136 clock-names = "uartclk", "apb_pclk";
Darm-realview-pb1176.dts94 uartclk: uartclk@24M { label
270 clocks = <&uartclk>, <&pclk>;
271 clock-names = "uartclk", "apb_pclk";
279 clocks = <&uartclk>, <&pclk>;
280 clock-names = "uartclk", "apb_pclk";
288 clocks = <&uartclk>, <&pclk>;
289 clock-names = "uartclk", "apb_pclk";
297 clocks = <&uartclk>, <&pclk>;
298 clock-names = "uartclk", "apb_pclk";
359 clocks = <&uartclk>, <&pclk>;
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/arch/arm/mach-ixp4xx/
Dvulcan-setup.c85 .uartclk = IXP4XX_UART_XTAL,
94 .uartclk = IXP4XX_UART_XTAL,
101 .uartclk = 1843200,
108 .uartclk = 1843200,
Davila-setup.c86 .uartclk = IXP4XX_UART_XTAL,
95 .uartclk = IXP4XX_UART_XTAL,
/arch/arm/mach-iop33x/
Duart.c37 .uartclk = IOP33X_UART_XTAL,
87 .uartclk = IOP33X_UART_XTAL,
/arch/arm/mach-footbridge/
Disa.c55 .uartclk = 1843200,
63 .uartclk = 1843200,
/arch/mips/emma/markeins/
Dplatform.c112 .uartclk = EMMA2RH_SERIAL_CLOCK,
120 .uartclk = EMMA2RH_SERIAL_CLOCK,
128 .uartclk = EMMA2RH_SERIAL_CLOCK,
/arch/arm64/boot/dts/hisilicon/
Dhi6220.dtsi170 clock-names = "uartclk", "apb_pclk";
179 clock-names = "uartclk", "apb_pclk";
189 clock-names = "uartclk", "apb_pclk";
199 clock-names = "uartclk", "apb_pclk";
208 clock-names = "uartclk", "apb_pclk";
/arch/mips/lasat/
Dserial.c58 lasat_serial8250_port[0].uartclk = LASAT_BASE_BAUD_100 * 16; in lasat_uart_add()
70 lasat_serial8250_port[0].uartclk = LASAT_BASE_BAUD_200 * 16; in lasat_uart_add()
/arch/arm/mach-s3c24xx/
Dmach-vr1000.c148 .uartclk = VR1000_BAUDBASE,
156 .uartclk = VR1000_BAUDBASE,
164 .uartclk = VR1000_BAUDBASE,
172 .uartclk = VR1000_BAUDBASE,
/arch/mips/mti-malta/
Dmalta-platform.c39 .uartclk = 1843200, \
54 .uartclk = 3686400, /* Twice the usual clk! */
/arch/mips/bcm47xx/
Dserial.c42 p->uartclk = ssb_port->baud_base; in uart8250_init_ssb()
68 p->uartclk = bcma_port->baud_base; in uart8250_init_bcma()
/arch/arm64/boot/dts/arm/
Dfoundation-v8.dts206 clock-names = "uartclk", "apb_pclk";
214 clock-names = "uartclk", "apb_pclk";
222 clock-names = "uartclk", "apb_pclk";
230 clock-names = "uartclk", "apb_pclk";
/arch/mips/rb532/
Dserial.c50 rb532_uart.uartclk = idt_cpu_freq; in setup_serial_port()
/arch/sh/boards/mach-se/7343/
Dsetup.c77 .uartclk = 7372800,
84 .uartclk = 7372800,
/arch/mips/kernel/
D8250-platform.c15 .uartclk = 1843200, \
/arch/mn10300/kernel/
Dmn10300-serial.c162 .uart.uartclk = 0, /* MN10300_IOCLK, */
224 .uart.uartclk = 0, /* MN10300_IOCLK, */
286 .uart.uartclk = 0, /* MN10300_IOCLK, */
1184 port->uart.uartclk = ioclk; in mn10300_serial_change_speed()
1191 port->uart.uartclk = ioclk / 8; in mn10300_serial_change_speed()
1198 port->uart.uartclk = ioclk / 32; in mn10300_serial_change_speed()
1206 port->uart.uartclk = ioclk; in mn10300_serial_change_speed()
1213 port->uart.uartclk = ioclk / 8; in mn10300_serial_change_speed()
1220 port->uart.uartclk = ioclk / 32; in mn10300_serial_change_speed()
1228 port->uart.uartclk = ioclk; in mn10300_serial_change_speed()
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