Searched refs:uncached (Results 1 – 13 of 13) sorted by relevance
148 unsigned long uncached = 0; in xtensa_dma_alloc() local166 uncached = ret + XCHAL_KSEG_BYPASS_VADDR - XCHAL_KSEG_CACHED_VADDR; in xtensa_dma_alloc()170 return (void *)uncached; in xtensa_dma_alloc()
7 strnlen_user.o uncached.o
56 EFFFFFFF| | => uncached | | 65 BFFFFFFF| | uncached | |97 The kernel needs access to both cached and uncached flash. Uncached is110 ( seg_e, seg ) | // Flash uncached127 ( base_e, 0x8 ) | // flash/sram/periph uncached130 ( base_b, 0xb ) | // uncached on-chip registers
42 obj-$(CONFIG_UNCACHED_MAPPING) += uncached.o
31 obj-$(CONFIG_IA64_UNCACHED_ALLOCATOR) += uncached.o
303 #define uncached(addr) P2SEGADDR(addr) macro
159 # - the PTD must be accessed uncached
151 bool "Are you using uncached shadow for RAM ?"
337 Many PCI drivers require access to uncached memory for DMA device
1240 unsigned long size, bool uncached) in coherent_cache_guest_page() argument1242 __coherent_cache_guest_page(vcpu, pfn, size, uncached); in coherent_cache_guest_page()
231 at 0xd0000000 (cached) and 0xd8000000 (uncached).
707 NOTE: when accessing uncached shared regions, LDREX/STREX rely711 perform SWP operations to uncached memory to deadlock.
706 NOTE: when accessing uncached shared regions, LDXR/STXR rely710 perform SWP operations to uncached memory to deadlock.